mirror of https://github.com/bsnes-emu/bsnes.git
1a889ae232
byuu says: I started working on the Toshiba TLCS900H CPU core today. It's basically, "what if we took the Z80, added in 32-bit support, added in SPARC register windows, added a ton of additional addressing modes, added control registers, and added a bunch of additional instructions?" -- or in other words, it's basically hell for me. It took several hours just to wrap my head around the way the opcode decoder needed to function, but I think I have a decent strategy for implementing it now. I should have all of the first-byte register/memory address decoding in place, although I'm sure there's lots of bugs. I don't have anything in the way of a disassembler yet. |
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| .. | ||
| arm7tdmi | ||
| gsu | ||
| hg51b | ||
| huc6280 | ||
| lr35902 | ||
| m68k | ||
| mos6502 | ||
| spc700 | ||
| tlcs900h | ||
| upd96050 | ||
| v30mz | ||
| wdc65816 | ||
| z80 | ||
| GNUmakefile | ||
| processor.hpp | ||