mirror of https://github.com/bsnes-emu/bsnes.git
Update to v104r15 release.
byuu says:
Changelog:
- processor/huc6280,mos6502,wdc65816: replaced abbreviated opcode
names with descriptive names
- nall: replaced `PLATFORM_MACOSX` define with `PLATFORM_MACOS`
- icarus: added `Icarus::missing() -> string_vector` to list missing
appended firmware files by name
- ruby, hiro: fix macosx→macos references
The processor instruction renaming was really about consistency with the
other processor cores. I may still need to do this for one or two more
processors.
The icarus change should allow a future release of the icarus
application to import games with external SNES coprocessor firmware once
again. It will also allow this to be possible when used in library mode.
This commit is contained in:
Tim Allen
parent
fbc58c70ae
commit
6524a7181d
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@ -12,7 +12,7 @@ using namespace nall;
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namespace Emulator {
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static const string Name = "higan";
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static const string Version = "104.14";
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static const string Version = "104.15";
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static const string Author = "byuu";
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static const string License = "GPLv3";
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static const string Website = "https://byuu.org/";
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@ -65,6 +65,13 @@ struct HuC6280 {
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auto instructionAbsoluteWrite(uint8, uint8 = 0) -> void;
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auto instructionBlockMove(bp) -> void;
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auto instructionBranch(bool) -> void;
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auto instructionBranchIfBitReset(uint3) -> void;
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auto instructionBranchIfBitSet(uint3) -> void;
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auto instructionBranchSubroutine() -> void;
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auto instructionBreak() -> void;
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auto instructionCallAbsolute() -> void;
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auto instructionChangeSpeedLow() -> void;
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auto instructionChangeSpeedHigh() -> void;
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auto instructionClear(uint8&) -> void;
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auto instructionClear(bool&) -> void;
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auto instructionImmediate(fp, uint8&) -> void;
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@ -73,38 +80,30 @@ struct HuC6280 {
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auto instructionIndirectWrite(uint8, uint8 = 0) -> void;
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auto instructionIndirectYRead(fp, uint8&) -> void;
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auto instructionIndirectYWrite(uint8) -> void;
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auto instructionJumpAbsolute() -> void;
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auto instructionJumpIndirect(uint8 = 0) -> void;
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auto instructionMemory(fp) -> void;
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auto instructionNoOperation() -> void;
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auto instructionPull(uint8&) -> void;
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auto instructionPullP() -> void;
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auto instructionPush(uint8) -> void;
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auto instructionResetMemoryBit(uint3) -> void;
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auto instructionReturnInterrupt() -> void;
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auto instructionReturnSubroutine() -> void;
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auto instructionSet(bool&) -> void;
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auto instructionSetMemoryBit(uint3) -> void;
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auto instructionStoreImplied(uint2) -> void;
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auto instructionSwap(uint8&, uint8&) -> void;
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auto instructionTestAbsolute(uint8 = 0) -> void;
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auto instructionTestZeroPage(uint8 = 0) -> void;
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auto instructionTransfer(uint8&, uint8&) -> void;
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auto instructionTransferAccumulatorToMPR() -> void;
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auto instructionTransferMPRToAccumulator() -> void;
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auto instructionTransferXS() -> void;
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auto instructionZeroPageModify(fp, uint8 = 0) -> void;
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auto instructionZeroPageRead(fp, uint8&, uint8 = 0) -> void;
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auto instructionZeroPageWrite(uint8, uint8 = 0) -> void;
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auto instructionBBR(uint3) -> void;
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auto instructionBBS(uint3) -> void;
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auto instructionBRK() -> void;
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auto instructionBSR() -> void;
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auto instructionCSL() -> void;
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auto instructionCSH() -> void;
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auto instructionJMPAbsolute() -> void;
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auto instructionJMPIndirect(uint8 = 0) -> void;
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auto instructionJSR() -> void;
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auto instructionNOP() -> void;
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auto instructionPLP() -> void;
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auto instructionRMB(uint3) -> void;
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auto instructionRTI() -> void;
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auto instructionRTS() -> void;
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auto instructionSMB(uint3) -> void;
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auto instructionST(uint2) -> void;
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auto instructionTAM() -> void;
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auto instructionTMA() -> void;
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auto instructionTSTAbsolute(uint8 = 0) -> void;
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auto instructionTSTZeroPage(uint8 = 0) -> void;
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auto instructionTXS() -> void;
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//disassembler.cpp
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auto disassemble(uint16 pc) -> string;
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@ -28,118 +28,118 @@ auto HuC6280::instruction() -> void {
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#define U
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switch(code) {
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op(0x00, BRK)
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op(0x00, Break)
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op(0x01, IndirectRead, fp(ORA), A, X)
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op(0x02, Swap, X, Y)
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op(0x03, ST, 0)
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op(0x03, StoreImplied, 0)
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op(0x04, ZeroPageModify, fp(TSB))
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op(0x05, ZeroPageRead, fp(ORA), A)
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op(0x06, ZeroPageModify, fp(ASL))
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op(0x07, RMB, 0)
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op(0x07, ResetMemoryBit, 0)
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op(0x08, Push, P)
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op(0x09, Immediate, fp(ORA), A)
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op(0x0a, Implied, fp(ASL), A)
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U op(0x0b, NOP)
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U op(0x0b, NoOperation)
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op(0x0c, AbsoluteModify, fp(TSB))
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op(0x0d, AbsoluteRead, fp(ORA), A)
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op(0x0e, AbsoluteModify, fp(ASL))
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op(0x0f, BBR, 0)
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op(0x0f, BranchIfBitReset, 0)
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op(0x10, Branch, N == 0)
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op(0x11, IndirectYRead, fp(ORA), A)
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op(0x12, IndirectRead, fp(ORA), A)
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op(0x13, ST, 1)
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op(0x13, StoreImplied, 1)
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op(0x14, ZeroPageModify, fp(TRB))
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op(0x15, ZeroPageRead, fp(ORA), A, X)
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op(0x16, ZeroPageModify, fp(ASL), X)
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op(0x17, RMB, 1)
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op(0x17, ResetMemoryBit, 1)
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op(0x18, Clear, C)
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op(0x19, AbsoluteRead, fp(ORA), A, Y)
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op(0x1a, Implied, fp(INC), A)
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U op(0x1b, NOP)
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U op(0x1b, NoOperation)
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op(0x1c, AbsoluteModify, fp(TRB))
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op(0x1d, AbsoluteRead, fp(ORA), A, X)
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op(0x1e, AbsoluteModify, fp(ASL), X)
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op(0x1f, BBR, 1)
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op(0x20, JSR)
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op(0x1f, BranchIfBitReset, 1)
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op(0x20, CallAbsolute)
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op(0x21, IndirectRead, fp(AND), A, X)
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op(0x22, Swap, A, X)
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op(0x23, ST, 2)
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op(0x23, StoreImplied, 2)
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op(0x24, ZeroPageRead, fp(BIT), A)
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op(0x25, ZeroPageRead, fp(AND), A)
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op(0x26, ZeroPageModify, fp(ROL))
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op(0x27, RMB, 2)
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op(0x28, PLP)
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op(0x27, ResetMemoryBit, 2)
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op(0x28, PullP)
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op(0x29, Immediate, fp(AND), A)
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op(0x2a, Implied, fp(ROL), A)
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U op(0x2b, NOP)
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U op(0x2b, NoOperation)
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op(0x2c, AbsoluteRead, fp(BIT), A)
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op(0x2d, AbsoluteRead, fp(AND), A)
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op(0x2e, AbsoluteModify, fp(ROL))
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op(0x2f, BBR, 2)
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op(0x2f, BranchIfBitReset, 2)
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op(0x30, Branch, N == 1)
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op(0x31, IndirectYRead, fp(AND), A)
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op(0x32, IndirectRead, fp(AND), A)
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U op(0x33, NOP)
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U op(0x33, NoOperation)
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op(0x34, ZeroPageRead, fp(BIT), A, X)
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op(0x35, ZeroPageRead, fp(AND), A, X)
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op(0x36, ZeroPageModify, fp(ROL), X)
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op(0x37, RMB, 3)
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op(0x37, ResetMemoryBit, 3)
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op(0x38, Set, C)
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op(0x39, AbsoluteRead, fp(AND), A, Y)
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op(0x3a, Implied, fp(DEC), A)
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U op(0x3b, NOP)
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U op(0x3b, NoOperation)
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op(0x3c, AbsoluteRead, fp(BIT), A, X)
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op(0x3d, AbsoluteRead, fp(AND), A, X)
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op(0x3e, AbsoluteModify, fp(ROL), X)
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op(0x3f, BBR, 3)
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op(0x40, RTI)
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op(0x3f, BranchIfBitReset, 3)
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op(0x40, ReturnInterrupt)
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op(0x41, IndirectRead, fp(EOR), A, X)
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op(0x42, Swap, A, Y)
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op(0x43, TMA)
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op(0x44, BSR)
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op(0x43, TransferMPRToAccumulator)
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op(0x44, BranchSubroutine)
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op(0x45, ZeroPageRead, fp(EOR), A)
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op(0x46, ZeroPageModify, fp(LSR))
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op(0x47, RMB, 4)
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op(0x47, ResetMemoryBit, 4)
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op(0x48, Push, A)
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op(0x49, Immediate, fp(EOR), A)
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op(0x4a, Implied, fp(LSR), A)
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U op(0x4b, NOP)
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op(0x4c, JMPAbsolute)
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U op(0x4b, NoOperation)
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op(0x4c, JumpAbsolute)
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op(0x4d, AbsoluteRead, fp(EOR), A)
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op(0x4e, AbsoluteModify, fp(LSR))
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op(0x4f, BBR, 4)
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op(0x4f, BranchIfBitReset, 4)
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op(0x50, Branch, V == 0)
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op(0x51, IndirectYRead, fp(EOR), A)
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op(0x52, IndirectRead, fp(EOR), A)
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op(0x53, TAM)
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op(0x54, CSL)
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op(0x53, TransferAccumulatorToMPR)
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op(0x54, ChangeSpeedLow)
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op(0x55, ZeroPageRead, fp(EOR), A, X)
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op(0x56, ZeroPageModify, fp(LSR), X)
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op(0x57, RMB, 5)
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op(0x57, ResetMemoryBit, 5)
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op(0x58, Clear, I)
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op(0x59, AbsoluteRead, fp(EOR), A, Y)
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op(0x5a, Push, Y)
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U op(0x5b, NOP)
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U op(0x5c, NOP)
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U op(0x5b, NoOperation)
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U op(0x5c, NoOperation)
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op(0x5d, AbsoluteRead, fp(EOR), A, X)
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op(0x5e, AbsoluteModify, fp(LSR), X)
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op(0x5f, BBR, 5)
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op(0x60, RTS)
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op(0x5f, BranchIfBitReset, 5)
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op(0x60, ReturnSubroutine)
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op(0x61, IndirectRead, fp(ADC), A, X)
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op(0x62, Clear, A)
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U op(0x63, NOP)
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U op(0x63, NoOperation)
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op(0x64, ZeroPageWrite, 0)
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op(0x65, ZeroPageRead, fp(ADC), A)
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op(0x66, ZeroPageModify, fp(ROR))
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op(0x67, RMB, 6)
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op(0x67, ResetMemoryBit, 6)
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op(0x68, Pull, A)
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op(0x69, Immediate, fp(ADC), A)
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op(0x6a, Implied, fp(ROR), A)
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U op(0x6b, NOP)
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op(0x6c, JMPIndirect)
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U op(0x6b, NoOperation)
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op(0x6c, JumpIndirect)
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op(0x6d, AbsoluteRead, fp(ADC), A)
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op(0x6e, AbsoluteModify, fp(ROR))
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op(0x6f, BBR, 6)
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op(0x6f, BranchIfBitReset, 6)
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op(0x70, Branch, V == 1)
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op(0x71, IndirectYRead, fp(ADC), A)
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op(0x72, IndirectRead, fp(ADC), A)
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@ -147,79 +147,79 @@ U op(0x6b, NOP)
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op(0x74, ZeroPageWrite, 0, X)
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op(0x75, ZeroPageRead, fp(ADC), A, X)
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op(0x76, ZeroPageModify, fp(ROR), X)
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op(0x77, RMB, 7)
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op(0x77, ResetMemoryBit, 7)
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op(0x78, Set, I)
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op(0x79, AbsoluteRead, fp(ADC), A, Y)
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op(0x7a, Pull, Y)
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U op(0x7b, NOP)
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op(0x7c, JMPIndirect, X)
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U op(0x7b, NoOperation)
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op(0x7c, JumpIndirect, X)
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op(0x7d, AbsoluteRead, fp(ADC), A, X)
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op(0x7e, AbsoluteModify, fp(ROR), X)
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op(0x7f, BBR, 7)
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op(0x7f, BranchIfBitReset, 7)
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op(0x80, Branch, 1)
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op(0x81, IndirectWrite, A, X)
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op(0x82, Clear, X)
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op(0x83, TSTZeroPage)
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op(0x83, TestZeroPage)
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op(0x84, ZeroPageWrite, Y)
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op(0x85, ZeroPageWrite, A)
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op(0x86, ZeroPageWrite, X)
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op(0x87, SMB, 0)
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op(0x87, SetMemoryBit, 0)
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op(0x88, Implied, fp(DEC), Y)
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op(0x89, Immediate, fp(BIT), A)
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op(0x8a, Transfer, X, A)
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U op(0x8b, NOP)
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U op(0x8b, NoOperation)
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op(0x8c, AbsoluteWrite, Y)
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op(0x8d, AbsoluteWrite, A)
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op(0x8e, AbsoluteWrite, X)
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op(0x8f, BBS, 0)
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op(0x8f, BranchIfBitSet, 0)
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op(0x90, Branch, C == 0)
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op(0x91, IndirectYWrite, A)
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op(0x92, IndirectWrite, A)
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op(0x93, TSTAbsolute)
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op(0x93, TestAbsolute)
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op(0x94, ZeroPageWrite, Y, X)
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op(0x95, ZeroPageWrite, A, X)
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op(0x96, ZeroPageWrite, X, Y)
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op(0x97, SMB, 1)
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op(0x97, SetMemoryBit, 1)
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op(0x98, Transfer, Y, A)
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op(0x99, AbsoluteWrite, A, Y)
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op(0x9a, TXS)
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U op(0x9b, NOP)
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op(0x9a, TransferXS)
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U op(0x9b, NoOperation)
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op(0x9c, AbsoluteWrite, 0)
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op(0x9d, AbsoluteWrite, A, X)
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op(0x9e, AbsoluteWrite, 0, X)
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op(0x9f, BBS, 1)
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op(0x9f, BranchIfBitSet, 1)
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op(0xa0, Immediate, fp(LD), Y)
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op(0xa1, IndirectRead, fp(LD), A, X)
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op(0xa2, Immediate, fp(LD), X)
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op(0xa3, TSTZeroPage, X)
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op(0xa3, TestZeroPage, X)
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op(0xa4, ZeroPageRead, fp(LD), Y)
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op(0xa5, ZeroPageRead, fp(LD), A)
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op(0xa6, ZeroPageRead, fp(LD), X)
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op(0xa7, SMB, 2)
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op(0xa7, SetMemoryBit, 2)
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op(0xa8, Transfer, A, Y)
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op(0xa9, Immediate, fp(LD), A)
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op(0xaa, Transfer, A, X)
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U op(0xab, NOP)
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U op(0xab, NoOperation)
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op(0xac, AbsoluteRead, fp(LD), Y)
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op(0xad, AbsoluteRead, fp(LD), A)
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op(0xae, AbsoluteRead, fp(LD), X)
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op(0xaf, BBS, 2)
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op(0xaf, BranchIfBitSet, 2)
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op(0xb0, Branch, C == 1)
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op(0xb1, IndirectYRead, fp(LD), A)
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op(0xb2, IndirectRead, fp(LD), A)
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op(0xb3, TSTAbsolute, X)
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op(0xb3, TestAbsolute, X)
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op(0xb4, ZeroPageRead, fp(LD), Y, X)
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op(0xb5, ZeroPageRead, fp(LD), A, X)
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op(0xb6, ZeroPageRead, fp(LD), X, Y)
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op(0xb7, SMB, 3)
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op(0xb7, SetMemoryBit, 3)
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op(0xb8, Clear, V)
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op(0xb9, AbsoluteRead, fp(LD), A, Y)
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op(0xba, Transfer, S, X)
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U op(0xbb, NOP)
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U op(0xbb, NoOperation)
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op(0xbc, AbsoluteRead, fp(LD), Y, X)
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op(0xbd, AbsoluteRead, fp(LD), A, X)
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op(0xbe, AbsoluteRead, fp(LD), X, Y)
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op(0xbf, BBS, 3)
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op(0xbf, BranchIfBitSet, 3)
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op(0xc0, Immediate, fp(CPY), Y)
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op(0xc1, IndirectRead, fp(CMP), A, X)
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op(0xc2, Clear, Y)
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@ -227,47 +227,47 @@ U op(0xbb, NOP)
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op(0xc4, ZeroPageRead, fp(CPY), Y)
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op(0xc5, ZeroPageRead, fp(CMP), A)
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op(0xc6, ZeroPageModify, fp(DEC))
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op(0xc7, SMB, 4)
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op(0xc7, SetMemoryBit, 4)
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op(0xc8, Implied, fp(INC), Y)
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op(0xc9, Immediate, fp(CMP), A)
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op(0xca, Implied, fp(DEC), X)
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U op(0xcb, NOP)
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U op(0xcb, NoOperation)
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op(0xcc, AbsoluteRead, fp(CPY), Y)
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op(0xcd, AbsoluteRead, fp(CMP), A)
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op(0xce, AbsoluteModify, fp(DEC))
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op(0xcf, BBS, 4)
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op(0xcf, BranchIfBitSet, 4)
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op(0xd0, Branch, Z == 0)
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op(0xd1, IndirectYRead, fp(CMP), A)
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op(0xd2, IndirectRead, fp(CMP), A)
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op(0xd3, BlockMove, fp(TIN))
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op(0xd4, CSH)
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op(0xd4, ChangeSpeedHigh)
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op(0xd5, ZeroPageRead, fp(CMP), A, X)
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op(0xd6, ZeroPageModify, fp(DEC), X)
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op(0xd7, SMB, 5)
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op(0xd7, SetMemoryBit, 5)
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op(0xd8, Clear, D)
|
||||
op(0xd9, AbsoluteRead, fp(CMP), A, Y)
|
||||
op(0xda, Push, X)
|
||||
U op(0xdb, NOP)
|
||||
U op(0xdc, NOP)
|
||||
U op(0xdb, NoOperation)
|
||||
U op(0xdc, NoOperation)
|
||||
op(0xdd, AbsoluteRead, fp(CMP), A, X)
|
||||
op(0xde, AbsoluteModify, fp(DEC), X)
|
||||
op(0xdf, BBS, 5)
|
||||
op(0xdf, BranchIfBitSet, 5)
|
||||
op(0xe0, Immediate, fp(CPX), X)
|
||||
op(0xe1, IndirectRead, fp(SBC), A, X)
|
||||
U op(0xe2, NOP)
|
||||
U op(0xe2, NoOperation)
|
||||
op(0xe3, BlockMove, fp(TIA))
|
||||
op(0xe4, ZeroPageRead, fp(CPX), X)
|
||||
op(0xe5, ZeroPageRead, fp(SBC), A)
|
||||
op(0xe6, ZeroPageModify, fp(INC))
|
||||
op(0xe7, SMB, 6)
|
||||
op(0xe7, SetMemoryBit, 6)
|
||||
op(0xe8, Implied, fp(INC), X)
|
||||
op(0xe9, Immediate, fp(SBC), A)
|
||||
op(0xea, NOP)
|
||||
U op(0xeb, NOP)
|
||||
op(0xea, NoOperation)
|
||||
U op(0xeb, NoOperation)
|
||||
op(0xec, AbsoluteRead, fp(CPX), X)
|
||||
op(0xed, AbsoluteRead, fp(SBC), A)
|
||||
op(0xee, AbsoluteModify, fp(INC))
|
||||
op(0xef, BBS, 6)
|
||||
op(0xef, BranchIfBitSet, 6)
|
||||
op(0xf0, Branch, Z == 1)
|
||||
op(0xf1, IndirectYRead, fp(SBC), A)
|
||||
op(0xf2, IndirectRead, fp(SBC), A)
|
||||
|
|
@ -275,15 +275,15 @@ U op(0xeb, NOP)
|
|||
op(0xf4, Set, T)
|
||||
op(0xf5, ZeroPageRead, fp(SBC), A, X)
|
||||
op(0xf6, ZeroPageModify, fp(INC), X)
|
||||
op(0xf7, SMB, 7)
|
||||
op(0xf7, SetMemoryBit, 7)
|
||||
op(0xf8, Set, D)
|
||||
op(0xf9, AbsoluteRead, fp(SBC), A, Y)
|
||||
op(0xfa, Pull, X)
|
||||
U op(0xfb, NOP)
|
||||
U op(0xfc, NOP)
|
||||
U op(0xfb, NoOperation)
|
||||
U op(0xfc, NoOperation)
|
||||
op(0xfd, AbsoluteRead, fp(SBC), A, X)
|
||||
op(0xfe, AbsoluteModify, fp(INC), X)
|
||||
op(0xff, BBS, 7)
|
||||
op(0xff, BranchIfBitSet, 7)
|
||||
}
|
||||
#undef U
|
||||
}
|
||||
|
|
|
|||
|
|
@ -62,6 +62,72 @@ auto HuC6280::instructionBranch(bool take) -> void {
|
|||
}
|
||||
}
|
||||
|
||||
auto HuC6280::instructionBranchIfBitReset(uint3 index) -> void {
|
||||
auto zeropage = operand();
|
||||
auto displacement = operand();
|
||||
io();
|
||||
io();
|
||||
L auto data = load8(zeropage);
|
||||
if(data.bit(index) == 0) {
|
||||
PC += (int8)displacement;
|
||||
}
|
||||
}
|
||||
|
||||
auto HuC6280::instructionBranchIfBitSet(uint3 index) -> void {
|
||||
auto zeropage = operand();
|
||||
auto displacement = operand();
|
||||
io();
|
||||
io();
|
||||
L auto data = load8(zeropage);
|
||||
if(data.bit(index) == 1) {
|
||||
PC += (int8)displacement;
|
||||
}
|
||||
}
|
||||
|
||||
auto HuC6280::instructionBranchSubroutine() -> void {
|
||||
auto displacement = operand();
|
||||
io();
|
||||
io();
|
||||
io();
|
||||
io();
|
||||
push((PC - 1) >> 8);
|
||||
L push((PC - 1) >> 0);
|
||||
PC += (int8)displacement;
|
||||
}
|
||||
|
||||
auto HuC6280::instructionBreak() -> void {
|
||||
operand();
|
||||
io();
|
||||
push(PC >> 8);
|
||||
push(PC >> 0);
|
||||
uint8 p = P;
|
||||
push(p | 0x10); //B flag set on push
|
||||
D = 0;
|
||||
I = 1;
|
||||
PC.byte(0) = load16(0xfff6);
|
||||
L PC.byte(1) = load16(0xfff7);
|
||||
}
|
||||
|
||||
auto HuC6280::instructionCallAbsolute() -> void {
|
||||
uint16 address = operand();
|
||||
address |= operand() << 8;
|
||||
io();
|
||||
io();
|
||||
push((PC - 1) >> 8);
|
||||
L push((PC - 1) >> 0);
|
||||
PC = address;
|
||||
}
|
||||
|
||||
auto HuC6280::instructionChangeSpeedLow() -> void {
|
||||
L io();
|
||||
r.cs = 4;
|
||||
}
|
||||
|
||||
auto HuC6280::instructionChangeSpeedHigh() -> void {
|
||||
L io();
|
||||
r.cs = 1;
|
||||
}
|
||||
|
||||
auto HuC6280::instructionClear(uint8& data) -> void {
|
||||
L io();
|
||||
data = 0;
|
||||
|
|
@ -115,6 +181,22 @@ auto HuC6280::instructionIndirectYWrite(uint8 data) -> void {
|
|||
L store16(absolute + Y, data);
|
||||
}
|
||||
|
||||
auto HuC6280::instructionJumpAbsolute() -> void {
|
||||
uint16 address = operand();
|
||||
address |= operand() << 8;
|
||||
L io();
|
||||
PC = address;
|
||||
}
|
||||
|
||||
auto HuC6280::instructionJumpIndirect(uint8 index) -> void {
|
||||
uint16 address = operand();
|
||||
address |= operand() << 8;
|
||||
io();
|
||||
io();
|
||||
PC.byte(0) = load16(address + index + 0);
|
||||
L PC.byte(1) = load16(address + index + 1);
|
||||
}
|
||||
|
||||
auto HuC6280::instructionMemory(fp alu) -> void {
|
||||
auto a = A;
|
||||
A = ALU(load8(X));
|
||||
|
|
@ -122,6 +204,10 @@ L store8(X, A);
|
|||
A = a;
|
||||
}
|
||||
|
||||
auto HuC6280::instructionNoOperation() -> void {
|
||||
L io();
|
||||
}
|
||||
|
||||
auto HuC6280::instructionPull(uint8& data) -> void {
|
||||
io();
|
||||
io();
|
||||
|
|
@ -130,22 +216,99 @@ L data = pull();
|
|||
N = data.bit(7);
|
||||
}
|
||||
|
||||
auto HuC6280::instructionPullP() -> void {
|
||||
io();
|
||||
io();
|
||||
L P = pull();
|
||||
}
|
||||
|
||||
auto HuC6280::instructionPush(uint8 data) -> void {
|
||||
io();
|
||||
L push(data);
|
||||
}
|
||||
|
||||
auto HuC6280::instructionResetMemoryBit(uint3 index) -> void {
|
||||
auto zeropage = operand();
|
||||
io();
|
||||
io();
|
||||
io();
|
||||
auto data = load8(zeropage);
|
||||
data.bit(index) = 0;
|
||||
L store8(zeropage, data);
|
||||
}
|
||||
|
||||
auto HuC6280::instructionReturnInterrupt() -> void {
|
||||
io();
|
||||
io();
|
||||
io();
|
||||
P = pull();
|
||||
PC.byte(0) = pull();
|
||||
L PC.byte(1) = pull();
|
||||
}
|
||||
|
||||
auto HuC6280::instructionReturnSubroutine() -> void {
|
||||
io();
|
||||
io();
|
||||
io();
|
||||
PC.byte(0) = pull();
|
||||
PC.byte(1) = pull();
|
||||
L io();
|
||||
PC++;
|
||||
}
|
||||
|
||||
auto HuC6280::instructionSet(bool& flag) -> void {
|
||||
L io();
|
||||
flag = 1;
|
||||
}
|
||||
|
||||
auto HuC6280::instructionSetMemoryBit(uint3 index) -> void {
|
||||
auto zeropage = operand();
|
||||
io();
|
||||
io();
|
||||
io();
|
||||
auto data = load8(zeropage);
|
||||
data.bit(index) = 1;
|
||||
L store8(zeropage, data);
|
||||
}
|
||||
|
||||
auto HuC6280::instructionStoreImplied(uint2 index) -> void {
|
||||
auto data = operand();
|
||||
io();
|
||||
io();
|
||||
L store(index, data);
|
||||
}
|
||||
|
||||
auto HuC6280::instructionSwap(uint8& lhs, uint8& rhs) -> void {
|
||||
io();
|
||||
L io();
|
||||
swap(lhs, rhs);
|
||||
}
|
||||
|
||||
auto HuC6280::instructionTestAbsolute(uint8 index) -> void {
|
||||
auto mask = operand();
|
||||
uint16 absolute = operand();
|
||||
absolute |= operand() << 8;
|
||||
io();
|
||||
io();
|
||||
io();
|
||||
L uint8 data = load16(absolute + index);
|
||||
Z = (data & mask) == 0;
|
||||
V = data.bit(6);
|
||||
N = data.bit(7);
|
||||
}
|
||||
|
||||
auto HuC6280::instructionTestZeroPage(uint8 index) -> void {
|
||||
auto mask = operand();
|
||||
auto zeropage = operand();
|
||||
io();
|
||||
io();
|
||||
io();
|
||||
L uint8 data = load8(zeropage + index);
|
||||
Z = (data & mask) == 0;
|
||||
V = data.bit(6);
|
||||
N = data.bit(7);
|
||||
}
|
||||
|
||||
auto HuC6280::instructionTransfer(uint8& source, uint8& target) -> void {
|
||||
L io();
|
||||
target = source;
|
||||
|
|
@ -153,6 +316,30 @@ L io();
|
|||
N = target.bit(7);
|
||||
}
|
||||
|
||||
auto HuC6280::instructionTransferAccumulatorToMPR() -> void {
|
||||
auto mask = operand();
|
||||
io();
|
||||
io();
|
||||
L io();
|
||||
for(uint index : range(8)) {
|
||||
if(mask.bit(index)) r.mpr[index] = A;
|
||||
}
|
||||
}
|
||||
|
||||
auto HuC6280::instructionTransferMPRToAccumulator() -> void {
|
||||
auto mask = operand();
|
||||
io();
|
||||
L io();
|
||||
for(uint index : range(8)) {
|
||||
if(mask.bit(index)) { A = r.mpr[index]; break; }
|
||||
}
|
||||
}
|
||||
|
||||
auto HuC6280::instructionTransferXS() -> void {
|
||||
L io();
|
||||
S = X;
|
||||
}
|
||||
|
||||
auto HuC6280::instructionZeroPageModify(fp alu, uint8 index) -> void {
|
||||
auto zeropage = operand();
|
||||
io();
|
||||
|
|
@ -172,192 +359,3 @@ auto HuC6280::instructionZeroPageWrite(uint8 data, uint8 index) -> void {
|
|||
io();
|
||||
L store8(zeropage + index, data);
|
||||
}
|
||||
|
||||
//
|
||||
|
||||
auto HuC6280::instructionBBR(uint3 index) -> void {
|
||||
auto zeropage = operand();
|
||||
auto displacement = operand();
|
||||
io();
|
||||
io();
|
||||
L auto data = load8(zeropage);
|
||||
if(data.bit(index) == 0) {
|
||||
PC += (int8)displacement;
|
||||
}
|
||||
}
|
||||
|
||||
auto HuC6280::instructionBBS(uint3 index) -> void {
|
||||
auto zeropage = operand();
|
||||
auto displacement = operand();
|
||||
io();
|
||||
io();
|
||||
L auto data = load8(zeropage);
|
||||
if(data.bit(index) == 1) {
|
||||
PC += (int8)displacement;
|
||||
}
|
||||
}
|
||||
|
||||
auto HuC6280::instructionBRK() -> void {
|
||||
operand();
|
||||
io();
|
||||
push(PC >> 8);
|
||||
push(PC >> 0);
|
||||
uint8 p = P;
|
||||
push(p | 0x10); //B flag set on push
|
||||
D = 0;
|
||||
I = 1;
|
||||
PC.byte(0) = load16(0xfff6);
|
||||
L PC.byte(1) = load16(0xfff7);
|
||||
}
|
||||
|
||||
auto HuC6280::instructionBSR() -> void {
|
||||
auto displacement = operand();
|
||||
io();
|
||||
io();
|
||||
io();
|
||||
io();
|
||||
push((PC - 1) >> 8);
|
||||
L push((PC - 1) >> 0);
|
||||
PC += (int8)displacement;
|
||||
}
|
||||
|
||||
auto HuC6280::instructionCSL() -> void {
|
||||
L io();
|
||||
r.cs = 4;
|
||||
}
|
||||
|
||||
auto HuC6280::instructionCSH() -> void {
|
||||
L io();
|
||||
r.cs = 1;
|
||||
}
|
||||
|
||||
auto HuC6280::instructionJMPAbsolute() -> void {
|
||||
uint16 address = operand();
|
||||
address |= operand() << 8;
|
||||
L io();
|
||||
PC = address;
|
||||
}
|
||||
|
||||
auto HuC6280::instructionJMPIndirect(uint8 index) -> void {
|
||||
uint16 address = operand();
|
||||
address |= operand() << 8;
|
||||
io();
|
||||
io();
|
||||
PC.byte(0) = load16(address + index + 0);
|
||||
L PC.byte(1) = load16(address + index + 1);
|
||||
}
|
||||
|
||||
auto HuC6280::instructionJSR() -> void {
|
||||
uint16 address = operand();
|
||||
address |= operand() << 8;
|
||||
io();
|
||||
io();
|
||||
push((PC - 1) >> 8);
|
||||
L push((PC - 1) >> 0);
|
||||
PC = address;
|
||||
}
|
||||
|
||||
auto HuC6280::instructionNOP() -> void {
|
||||
L io();
|
||||
}
|
||||
|
||||
auto HuC6280::instructionPLP() -> void {
|
||||
io();
|
||||
io();
|
||||
L P = pull();
|
||||
}
|
||||
|
||||
auto HuC6280::instructionRMB(uint3 index) -> void {
|
||||
auto zeropage = operand();
|
||||
io();
|
||||
io();
|
||||
io();
|
||||
auto data = load8(zeropage);
|
||||
data.bit(index) = 0;
|
||||
L store8(zeropage, data);
|
||||
}
|
||||
|
||||
auto HuC6280::instructionRTI() -> void {
|
||||
io();
|
||||
io();
|
||||
io();
|
||||
P = pull();
|
||||
PC.byte(0) = pull();
|
||||
L PC.byte(1) = pull();
|
||||
}
|
||||
|
||||
auto HuC6280::instructionRTS() -> void {
|
||||
io();
|
||||
io();
|
||||
io();
|
||||
PC.byte(0) = pull();
|
||||
PC.byte(1) = pull();
|
||||
L io();
|
||||
PC++;
|
||||
}
|
||||
|
||||
auto HuC6280::instructionSMB(uint3 index) -> void {
|
||||
auto zeropage = operand();
|
||||
io();
|
||||
io();
|
||||
io();
|
||||
auto data = load8(zeropage);
|
||||
data.bit(index) = 1;
|
||||
L store8(zeropage, data);
|
||||
}
|
||||
|
||||
auto HuC6280::instructionST(uint2 index) -> void {
|
||||
auto data = operand();
|
||||
io();
|
||||
io();
|
||||
L store(index, data);
|
||||
}
|
||||
|
||||
auto HuC6280::instructionTAM() -> void {
|
||||
auto mask = operand();
|
||||
io();
|
||||
io();
|
||||
L io();
|
||||
for(uint index : range(8)) {
|
||||
if(mask.bit(index)) r.mpr[index] = A;
|
||||
}
|
||||
}
|
||||
|
||||
auto HuC6280::instructionTMA() -> void {
|
||||
auto mask = operand();
|
||||
io();
|
||||
L io();
|
||||
for(uint index : range(8)) {
|
||||
if(mask.bit(index)) { A = r.mpr[index]; break; }
|
||||
}
|
||||
}
|
||||
|
||||
auto HuC6280::instructionTSTAbsolute(uint8 index) -> void {
|
||||
auto mask = operand();
|
||||
uint16 absolute = operand();
|
||||
absolute |= operand() << 8;
|
||||
io();
|
||||
io();
|
||||
io();
|
||||
L uint8 data = load16(absolute + index);
|
||||
Z = (data & mask) == 0;
|
||||
V = data.bit(6);
|
||||
N = data.bit(7);
|
||||
}
|
||||
|
||||
auto HuC6280::instructionTSTZeroPage(uint8 index) -> void {
|
||||
auto mask = operand();
|
||||
auto zeropage = operand();
|
||||
io();
|
||||
io();
|
||||
io();
|
||||
L uint8 data = load8(zeropage + index);
|
||||
Z = (data & mask) == 0;
|
||||
V = data.bit(6);
|
||||
N = data.bit(7);
|
||||
}
|
||||
|
||||
auto HuC6280::instructionTXS() -> void {
|
||||
L io();
|
||||
S = X;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -18,11 +18,11 @@ auto MOS6502::instruction() -> void {
|
|||
auto code = opcode();
|
||||
|
||||
switch(code) {
|
||||
op(0x00, BRK)
|
||||
op(0x00, Break)
|
||||
op(0x01, IndirectXRead, fp(ORA), A)
|
||||
op(0x05, ZeroPageRead, fp(ORA), A)
|
||||
op(0x06, ZeroPageModify, fp(ASL))
|
||||
op(0x08, PHP)
|
||||
op(0x08, PushP)
|
||||
op(0x09, Immediate, fp(ORA), A)
|
||||
op(0x0a, Implied, fp(ASL), A)
|
||||
op(0x0d, AbsoluteRead, fp(ORA), A)
|
||||
|
|
@ -35,12 +35,12 @@ auto MOS6502::instruction() -> void {
|
|||
op(0x19, AbsoluteRead, fp(ORA), A, Y)
|
||||
op(0x1d, AbsoluteRead, fp(ORA), A, X)
|
||||
op(0x1e, AbsoluteModify, fp(ASL), X)
|
||||
op(0x20, JSRAbsolute)
|
||||
op(0x20, CallAbsolute)
|
||||
op(0x21, IndirectXRead, fp(AND), A)
|
||||
op(0x24, ZeroPageRead, fp(BIT), A)
|
||||
op(0x25, ZeroPageRead, fp(AND), A)
|
||||
op(0x26, ZeroPageModify, fp(ROL))
|
||||
op(0x28, PLP)
|
||||
op(0x28, PullP)
|
||||
op(0x29, Immediate, fp(AND), A)
|
||||
op(0x2a, Implied, fp(ROL), A)
|
||||
op(0x2c, AbsoluteRead, fp(BIT), A)
|
||||
|
|
@ -54,14 +54,14 @@ auto MOS6502::instruction() -> void {
|
|||
op(0x39, AbsoluteRead, fp(AND), A, Y)
|
||||
op(0x3d, AbsoluteRead, fp(AND), A, X)
|
||||
op(0x3e, AbsoluteModify, fp(ROL), X)
|
||||
op(0x40, RTI)
|
||||
op(0x40, ReturnInterrupt)
|
||||
op(0x41, IndirectXRead, fp(EOR), A)
|
||||
op(0x45, ZeroPageRead, fp(EOR), A)
|
||||
op(0x46, ZeroPageModify, fp(LSR))
|
||||
op(0x48, Push, A)
|
||||
op(0x49, Immediate, fp(EOR), A)
|
||||
op(0x4a, Implied, fp(LSR), A)
|
||||
op(0x4c, JMPAbsolute)
|
||||
op(0x4c, JumpAbsolute)
|
||||
op(0x4d, AbsoluteRead, fp(EOR), A)
|
||||
op(0x4e, AbsoluteModify, fp(LSR))
|
||||
op(0x50, Branch, V == 0)
|
||||
|
|
@ -72,14 +72,14 @@ auto MOS6502::instruction() -> void {
|
|||
op(0x59, AbsoluteRead, fp(EOR), A, Y)
|
||||
op(0x5d, AbsoluteRead, fp(EOR), A, X)
|
||||
op(0x5e, AbsoluteModify, fp(LSR), X)
|
||||
op(0x60, RTS)
|
||||
op(0x60, ReturnSubroutine)
|
||||
op(0x61, IndirectXRead, fp(ADC), A)
|
||||
op(0x65, ZeroPageRead, fp(ADC), A)
|
||||
op(0x66, ZeroPageModify, fp(ROR))
|
||||
op(0x68, Pull, A)
|
||||
op(0x69, Immediate, fp(ADC), A)
|
||||
op(0x6a, Implied, fp(ROR), A)
|
||||
op(0x6c, JMPIndirect)
|
||||
op(0x6c, JumpIndirect)
|
||||
op(0x6d, AbsoluteRead, fp(ADC), A)
|
||||
op(0x6e, AbsoluteModify, fp(ROR))
|
||||
op(0x70, Branch, V == 1)
|
||||
|
|
@ -157,7 +157,7 @@ auto MOS6502::instruction() -> void {
|
|||
op(0xe6, ZeroPageModify, fp(INC))
|
||||
op(0xe8, Implied, fp(INC), X)
|
||||
op(0xe9, Immediate, fp(SBC), A)
|
||||
op(0xea, NOP)
|
||||
op(0xea, NoOperation)
|
||||
op(0xec, AbsoluteRead, fp(CPX), X)
|
||||
op(0xed, AbsoluteRead, fp(SBC), A)
|
||||
op(0xee, AbsoluteModify, fp(INC))
|
||||
|
|
@ -172,7 +172,7 @@ auto MOS6502::instruction() -> void {
|
|||
}
|
||||
|
||||
//unimplemented instruction
|
||||
return instructionNOP();
|
||||
return instructionNoOperation();
|
||||
}
|
||||
|
||||
#undef op
|
||||
|
|
|
|||
|
|
@ -52,6 +52,28 @@ auto MOS6502::instructionBranch(bool take) -> void {
|
|||
}
|
||||
}
|
||||
|
||||
auto MOS6502::instructionBreak() -> void {
|
||||
operand();
|
||||
push(PCH);
|
||||
push(PCL);
|
||||
uint16 vector = 0xfffe;
|
||||
nmi(vector);
|
||||
push(P | 0x30);
|
||||
I = 1;
|
||||
PCL = read(vector++);
|
||||
L PCH = read(vector++);
|
||||
}
|
||||
|
||||
auto MOS6502::instructionCallAbsolute() -> void {
|
||||
uint16 absolute = operand();
|
||||
absolute |= operand() << 8;
|
||||
idle();
|
||||
PC--;
|
||||
push(PCH);
|
||||
L push(PCL);
|
||||
PC = absolute;
|
||||
}
|
||||
|
||||
auto MOS6502::instructionClear(bool& flag) -> void {
|
||||
L idle();
|
||||
flag = 0;
|
||||
|
|
@ -98,6 +120,25 @@ auto MOS6502::instructionIndirectYWrite(uint8& data) -> void {
|
|||
L write(absolute + Y, data);
|
||||
}
|
||||
|
||||
auto MOS6502::instructionJumpAbsolute() -> void {
|
||||
uint16 absolute = operand();
|
||||
L absolute |= operand() << 8;
|
||||
PC = absolute;
|
||||
}
|
||||
|
||||
auto MOS6502::instructionJumpIndirect() -> void {
|
||||
uint16 absolute = operand();
|
||||
absolute |= operand() << 8;
|
||||
uint16 pc = read(absolute);
|
||||
absolute.byte(0)++; //MOS6502: $00ff wraps here to $0000; not $0100
|
||||
L pc |= read(absolute) << 8;
|
||||
PC = pc;
|
||||
}
|
||||
|
||||
auto MOS6502::instructionNoOperation() -> void {
|
||||
L idle();
|
||||
}
|
||||
|
||||
auto MOS6502::instructionPull(uint8& data) -> void {
|
||||
idle();
|
||||
idle();
|
||||
|
|
@ -106,11 +147,39 @@ L data = pull();
|
|||
N = data.bit(7);
|
||||
}
|
||||
|
||||
auto MOS6502::instructionPullP() -> void {
|
||||
idle();
|
||||
idle();
|
||||
L P = pull();
|
||||
}
|
||||
|
||||
auto MOS6502::instructionPush(uint8& data) -> void {
|
||||
idle();
|
||||
L push(data);
|
||||
}
|
||||
|
||||
auto MOS6502::instructionPushP() -> void {
|
||||
idle();
|
||||
L push(P | 0x30);
|
||||
}
|
||||
|
||||
auto MOS6502::instructionReturnInterrupt() -> void {
|
||||
idle();
|
||||
idle();
|
||||
P = pull();
|
||||
PCL = pull();
|
||||
L PCH = pull();
|
||||
}
|
||||
|
||||
auto MOS6502::instructionReturnSubroutine() -> void {
|
||||
idle();
|
||||
idle();
|
||||
PCL = pull();
|
||||
PCH = pull();
|
||||
L idle();
|
||||
PC++;
|
||||
}
|
||||
|
||||
auto MOS6502::instructionSet(bool& flag) -> void {
|
||||
L idle();
|
||||
flag = 1;
|
||||
|
|
@ -160,74 +229,3 @@ auto MOS6502::instructionZeroPageWrite(uint8& data, uint8 index) -> void {
|
|||
read(zeroPage);
|
||||
L store(zeroPage + index, data);
|
||||
}
|
||||
|
||||
//
|
||||
|
||||
auto MOS6502::instructionBRK() -> void {
|
||||
operand();
|
||||
push(PCH);
|
||||
push(PCL);
|
||||
uint16 vector = 0xfffe;
|
||||
nmi(vector);
|
||||
push(P | 0x30);
|
||||
I = 1;
|
||||
PCL = read(vector++);
|
||||
L PCH = read(vector++);
|
||||
}
|
||||
|
||||
auto MOS6502::instructionJMPAbsolute() -> void {
|
||||
uint16 absolute = operand();
|
||||
L absolute |= operand() << 8;
|
||||
PC = absolute;
|
||||
}
|
||||
|
||||
auto MOS6502::instructionJMPIndirect() -> void {
|
||||
uint16 absolute = operand();
|
||||
absolute |= operand() << 8;
|
||||
uint16 pc = read(absolute);
|
||||
absolute.byte(0)++; //MOS6502: $00ff wraps here to $0000; not $0100
|
||||
L pc |= read(absolute) << 8;
|
||||
PC = pc;
|
||||
}
|
||||
|
||||
auto MOS6502::instructionJSRAbsolute() -> void {
|
||||
uint16 absolute = operand();
|
||||
absolute |= operand() << 8;
|
||||
idle();
|
||||
PC--;
|
||||
push(PCH);
|
||||
L push(PCL);
|
||||
PC = absolute;
|
||||
}
|
||||
|
||||
auto MOS6502::instructionNOP() -> void {
|
||||
L idle();
|
||||
}
|
||||
|
||||
auto MOS6502::instructionPHP() -> void {
|
||||
idle();
|
||||
L push(P | 0x30);
|
||||
}
|
||||
|
||||
auto MOS6502::instructionPLP() -> void {
|
||||
idle();
|
||||
idle();
|
||||
L P = pull();
|
||||
}
|
||||
|
||||
auto MOS6502::instructionRTI() -> void {
|
||||
idle();
|
||||
idle();
|
||||
P = pull();
|
||||
PCL = pull();
|
||||
L PCH = pull();
|
||||
}
|
||||
|
||||
auto MOS6502::instructionRTS() -> void {
|
||||
idle();
|
||||
idle();
|
||||
PCL = pull();
|
||||
PCH = pull();
|
||||
L idle();
|
||||
PC++;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -57,6 +57,8 @@ struct MOS6502 {
|
|||
auto instructionAbsoluteWrite(uint8& data) -> void;
|
||||
auto instructionAbsoluteWrite(uint8& data, uint8 index) -> void;
|
||||
auto instructionBranch(bool take) -> void;
|
||||
auto instructionBreak() -> void;
|
||||
auto instructionCallAbsolute() -> void;
|
||||
auto instructionClear(bool& flag) -> void;
|
||||
auto instructionImmediate(fp alu, uint8& data) -> void;
|
||||
auto instructionImplied(fp alu, uint8& data) -> void;
|
||||
|
|
@ -64,8 +66,15 @@ struct MOS6502 {
|
|||
auto instructionIndirectXWrite(uint8& data) -> void;
|
||||
auto instructionIndirectYRead(fp alu, uint8& data) -> void;
|
||||
auto instructionIndirectYWrite(uint8& data) -> void;
|
||||
auto instructionJumpAbsolute() -> void;
|
||||
auto instructionJumpIndirect() -> void;
|
||||
auto instructionNoOperation() -> void;
|
||||
auto instructionPull(uint8& data) -> void;
|
||||
auto instructionPullP() -> void;
|
||||
auto instructionPush(uint8& data) -> void;
|
||||
auto instructionPushP() -> void;
|
||||
auto instructionReturnInterrupt() -> void;
|
||||
auto instructionReturnSubroutine() -> void;
|
||||
auto instructionSet(bool& flag) -> void;
|
||||
auto instructionTransfer(uint8& source, uint8& target, bool flag) -> void;
|
||||
auto instructionZeroPageModify(fp alu) -> void;
|
||||
|
|
@ -75,16 +84,6 @@ struct MOS6502 {
|
|||
auto instructionZeroPageWrite(uint8& data) -> void;
|
||||
auto instructionZeroPageWrite(uint8& data, uint8 index) -> void;
|
||||
|
||||
auto instructionBRK() -> void;
|
||||
auto instructionJMPAbsolute() -> void;
|
||||
auto instructionJMPIndirect() -> void;
|
||||
auto instructionJSRAbsolute() -> void;
|
||||
auto instructionNOP() -> void;
|
||||
auto instructionPHP() -> void;
|
||||
auto instructionPLP() -> void;
|
||||
auto instructionRTI() -> void;
|
||||
auto instructionRTS() -> void;
|
||||
|
||||
//serialization.cpp
|
||||
auto serialize(serializer&) -> void;
|
||||
|
||||
|
|
|
|||
|
|
@ -10,7 +10,7 @@
|
|||
opA(0x08, Push8, P)
|
||||
opM(0x09, ImmediateRead, m(ORA))
|
||||
opM(0x0a, ImpliedModify, m(ASL), A)
|
||||
opA(0x0b, PHD)
|
||||
opA(0x0b, PushD)
|
||||
opM(0x0c, BankModify, m(TSB))
|
||||
opM(0x0d, BankRead, m(ORA))
|
||||
opM(0x0e, BankModify, m(ASL))
|
||||
|
|
@ -26,23 +26,23 @@
|
|||
opA(0x18, ClearFlag, CF)
|
||||
opM(0x19, BankRead, m(ORA), Y)
|
||||
opM(0x1a, ImpliedModify, m(INC), A)
|
||||
opA(0x1b, TCS)
|
||||
opA(0x1b, TransferCS)
|
||||
opM(0x1c, BankModify, m(TRB))
|
||||
opM(0x1d, BankRead, m(ORA), X)
|
||||
opM(0x1e, BankIndexedModify, m(ASL))
|
||||
opM(0x1f, LongRead, m(ORA), X)
|
||||
opA(0x20, JSRShort)
|
||||
opA(0x20, CallShort)
|
||||
opM(0x21, IndexedIndirectRead, m(AND))
|
||||
opA(0x22, JSRLong)
|
||||
opA(0x22, CallLong)
|
||||
opM(0x23, StackRead, m(AND))
|
||||
opM(0x24, DirectRead, m(BIT))
|
||||
opM(0x25, DirectRead, m(AND))
|
||||
opM(0x26, DirectModify, m(ROL))
|
||||
opM(0x27, IndirectLongRead, m(AND))
|
||||
opA(0x28, PLP)
|
||||
opA(0x28, PullP)
|
||||
opM(0x29, ImmediateRead, m(AND))
|
||||
opM(0x2a, ImpliedModify, m(ROL), A)
|
||||
opA(0x2b, PLD)
|
||||
opA(0x2b, PullD)
|
||||
opM(0x2c, BankRead, m(BIT))
|
||||
opM(0x2d, BankRead, m(AND))
|
||||
opM(0x2e, BankModify, m(ROL))
|
||||
|
|
@ -63,9 +63,9 @@
|
|||
opM(0x3d, BankRead, m(AND), X)
|
||||
opM(0x3e, BankIndexedModify, m(ROL))
|
||||
opM(0x3f, LongRead, m(AND), X)
|
||||
opA(0x40, RTI)
|
||||
opA(0x40, ReturnInterrupt)
|
||||
opM(0x41, IndexedIndirectRead, m(EOR))
|
||||
opA(0x42, WDM)
|
||||
opA(0x42, Prefix)
|
||||
opM(0x43, StackRead, m(EOR))
|
||||
opX(0x44, BlockMove, -1)
|
||||
opM(0x45, DirectRead, m(EOR))
|
||||
|
|
@ -75,7 +75,7 @@
|
|||
opM(0x49, ImmediateRead, m(EOR))
|
||||
opM(0x4a, ImpliedModify, m(LSR), A)
|
||||
opA(0x4b, Push8, db(PC))
|
||||
opA(0x4c, JMPShort)
|
||||
opA(0x4c, JumpShort)
|
||||
opM(0x4d, BankRead, m(EOR))
|
||||
opM(0x4e, BankModify, m(LSR))
|
||||
opM(0x4f, LongRead, m(EOR))
|
||||
|
|
@ -91,13 +91,13 @@
|
|||
opM(0x59, BankRead, m(EOR), Y)
|
||||
opX(0x5a, Push, Y)
|
||||
opA(0x5b, Transfer16, A, D)
|
||||
opA(0x5c, JMPLong)
|
||||
opA(0x5c, JumpLong)
|
||||
opM(0x5d, BankRead, m(EOR), X)
|
||||
opM(0x5e, BankIndexedModify, m(LSR))
|
||||
opM(0x5f, LongRead, m(EOR), X)
|
||||
opA(0x60, RTS)
|
||||
opA(0x60, ReturnShort)
|
||||
opM(0x61, IndexedIndirectRead, m(ADC))
|
||||
opA(0x62, PER)
|
||||
opA(0x62, PushEffectiveRelativeAddress)
|
||||
opM(0x63, StackRead, m(ADC))
|
||||
opM(0x64, DirectWrite, Z)
|
||||
opM(0x65, DirectRead, m(ADC))
|
||||
|
|
@ -106,8 +106,8 @@
|
|||
opM(0x68, Pull, A)
|
||||
opM(0x69, ImmediateRead, m(ADC))
|
||||
opM(0x6a, ImpliedModify, m(ROR), A)
|
||||
opA(0x6b, RTL)
|
||||
opA(0x6c, JMPIndirect)
|
||||
opA(0x6b, ReturnLong)
|
||||
opA(0x6c, JumpIndirect)
|
||||
opM(0x6d, BankRead, m(ADC))
|
||||
opM(0x6e, BankModify, m(ROR))
|
||||
opM(0x6f, LongRead, m(ADC))
|
||||
|
|
@ -123,20 +123,20 @@
|
|||
opM(0x79, BankRead, m(ADC), Y)
|
||||
opX(0x7a, Pull, Y)
|
||||
opA(0x7b, Transfer16, D, A)
|
||||
opA(0x7c, JMPIndexedIndirect)
|
||||
opA(0x7c, JumpIndexedIndirect)
|
||||
opM(0x7d, BankRead, m(ADC), X)
|
||||
opM(0x7e, BankIndexedModify, m(ROR))
|
||||
opM(0x7f, LongRead, m(ADC), X)
|
||||
opA(0x80, Branch)
|
||||
opM(0x81, IndexedIndirectWrite)
|
||||
opA(0x82, BRL)
|
||||
opA(0x82, BranchLong)
|
||||
opM(0x83, StackWrite)
|
||||
opX(0x84, DirectWrite, Y)
|
||||
opM(0x85, DirectWrite, A)
|
||||
opX(0x86, DirectWrite, X)
|
||||
opM(0x87, IndirectLongWrite)
|
||||
opX(0x88, ImpliedModify, x(DEC), Y)
|
||||
opM(0x89, BITImmediate)
|
||||
opM(0x89, BitImmediate)
|
||||
opM(0x8a, Transfer, X, A)
|
||||
opA(0x8b, Push8, B)
|
||||
opX(0x8c, BankWrite, Y)
|
||||
|
|
@ -153,7 +153,7 @@
|
|||
opM(0x97, IndirectLongWrite, Y)
|
||||
opM(0x98, Transfer, Y, A)
|
||||
opM(0x99, BankWrite, A, Y)
|
||||
opA(0x9a, TXS)
|
||||
opA(0x9a, TransferXS)
|
||||
opX(0x9b, Transfer, X, Y)
|
||||
opM(0x9c, BankWrite, Z)
|
||||
opM(0x9d, BankWrite, A, X)
|
||||
|
|
@ -170,7 +170,7 @@
|
|||
opX(0xa8, Transfer, A, Y)
|
||||
opM(0xa9, ImmediateRead, m(LDA))
|
||||
opX(0xaa, Transfer, A, X)
|
||||
opA(0xab, PLB)
|
||||
opA(0xab, PullB)
|
||||
opX(0xac, BankRead, x(LDY))
|
||||
opM(0xad, BankRead, m(LDA))
|
||||
opX(0xae, BankRead, x(LDX))
|
||||
|
|
@ -185,7 +185,7 @@
|
|||
opM(0xb7, IndirectLongRead, m(LDA), Y)
|
||||
opA(0xb8, ClearFlag, VF)
|
||||
opM(0xb9, BankRead, m(LDA), Y)
|
||||
opX(0xba, TSX)
|
||||
opX(0xba, TransferSX)
|
||||
opX(0xbb, Transfer, Y, X)
|
||||
opX(0xbc, BankRead, x(LDY), X)
|
||||
opM(0xbd, BankRead, m(LDA), X)
|
||||
|
|
@ -193,7 +193,7 @@
|
|||
opM(0xbf, LongRead, m(LDA), X)
|
||||
opX(0xc0, ImmediateRead, x(CPY))
|
||||
opM(0xc1, IndexedIndirectRead, m(CMP))
|
||||
opA(0xc2, REP)
|
||||
opA(0xc2, ResetP)
|
||||
opM(0xc3, StackRead, m(CMP))
|
||||
opX(0xc4, DirectRead, x(CPY))
|
||||
opM(0xc5, DirectRead, m(CMP))
|
||||
|
|
@ -202,7 +202,7 @@
|
|||
opX(0xc8, ImpliedModify, x(INC), Y)
|
||||
opM(0xc9, ImmediateRead, m(CMP))
|
||||
opX(0xca, ImpliedModify, x(DEC), X)
|
||||
opA(0xcb, WAI)
|
||||
opA(0xcb, Wait)
|
||||
opX(0xcc, BankRead, x(CPY))
|
||||
opM(0xcd, BankRead, m(CMP))
|
||||
opM(0xce, BankModify, m(DEC))
|
||||
|
|
@ -211,21 +211,21 @@
|
|||
opM(0xd1, IndirectIndexedRead, m(CMP))
|
||||
opM(0xd2, IndirectRead, m(CMP))
|
||||
opM(0xd3, IndirectStackRead, m(CMP))
|
||||
opA(0xd4, PEI)
|
||||
opA(0xd4, PushEffectiveIndirectAddress)
|
||||
opM(0xd5, DirectRead, m(CMP), X)
|
||||
opM(0xd6, DirectIndexedModify, m(DEC))
|
||||
opM(0xd7, IndirectLongRead, m(CMP), Y)
|
||||
opA(0xd8, ClearFlag, DF)
|
||||
opM(0xd9, BankRead, m(CMP), Y)
|
||||
opX(0xda, Push, X)
|
||||
opA(0xdb, STP)
|
||||
opA(0xdc, JMPIndirectLong)
|
||||
opA(0xdb, Stop)
|
||||
opA(0xdc, JumpIndirectLong)
|
||||
opM(0xdd, BankRead, m(CMP), X)
|
||||
opM(0xde, BankIndexedModify, m(DEC))
|
||||
opM(0xdf, LongRead, m(CMP), X)
|
||||
opX(0xe0, ImmediateRead, x(CPX))
|
||||
opM(0xe1, IndexedIndirectRead, m(SBC))
|
||||
opA(0xe2, SEP)
|
||||
opA(0xe2, SetP)
|
||||
opM(0xe3, StackRead, m(SBC))
|
||||
opX(0xe4, DirectRead, x(CPX))
|
||||
opM(0xe5, DirectRead, m(SBC))
|
||||
|
|
@ -233,8 +233,8 @@
|
|||
opM(0xe7, IndirectLongRead, m(SBC))
|
||||
opX(0xe8, ImpliedModify, x(INC), X)
|
||||
opM(0xe9, ImmediateRead, m(SBC))
|
||||
opA(0xea, NOP)
|
||||
opA(0xeb, XBA)
|
||||
opA(0xea, NoOperation)
|
||||
opA(0xeb, ExchangeBA)
|
||||
opX(0xec, BankRead, x(CPX))
|
||||
opM(0xed, BankRead, m(SBC))
|
||||
opM(0xee, BankModify, m(INC))
|
||||
|
|
@ -243,15 +243,15 @@
|
|||
opM(0xf1, IndirectIndexedRead, m(SBC))
|
||||
opM(0xf2, IndirectRead, m(SBC))
|
||||
opM(0xf3, IndirectStackRead, m(SBC))
|
||||
opA(0xf4, PEA)
|
||||
opA(0xf4, PushEffectiveAddress)
|
||||
opM(0xf5, DirectRead, m(SBC), X)
|
||||
opM(0xf6, DirectIndexedModify, m(INC))
|
||||
opM(0xf7, IndirectLongRead, m(SBC), Y)
|
||||
opA(0xf8, SetFlag, DF)
|
||||
opM(0xf9, BankRead, m(SBC), Y)
|
||||
opX(0xfa, Pull, X)
|
||||
opA(0xfb, XCE)
|
||||
opA(0xfc, JSRIndexedIndirect)
|
||||
opA(0xfb, ExchangeCE)
|
||||
opA(0xfc, CallIndexedIndirect)
|
||||
opM(0xfd, BankRead, m(SBC), X)
|
||||
opM(0xfe, BankIndexedModify, m(INC))
|
||||
opM(0xff, LongRead, m(SBC), X)
|
||||
|
|
|
|||
|
|
@ -1,23 +1,23 @@
|
|||
auto WDC65816::instructionBITImmediate8() -> void {
|
||||
auto WDC65816::instructionBitImmediate8() -> void {
|
||||
L uint8 immediate = fetch();
|
||||
ZF = (immediate & lo(A)) == 0;
|
||||
}
|
||||
|
||||
auto WDC65816::instructionBITImmediate16() -> void {
|
||||
auto WDC65816::instructionBitImmediate16() -> void {
|
||||
uint16 immediate = fetch();
|
||||
L immediate |= fetch() << 8;
|
||||
ZF = (immediate & A) == 0;
|
||||
}
|
||||
|
||||
auto WDC65816::instructionNOP() -> void {
|
||||
auto WDC65816::instructionNoOperation() -> void {
|
||||
L idleIRQ();
|
||||
}
|
||||
|
||||
auto WDC65816::instructionWDM() -> void {
|
||||
auto WDC65816::instructionPrefix() -> void {
|
||||
L fetch();
|
||||
}
|
||||
|
||||
auto WDC65816::instructionXBA() -> void {
|
||||
auto WDC65816::instructionExchangeBA() -> void {
|
||||
idle();
|
||||
L idle();
|
||||
A = A >> 8 | A << 8;
|
||||
|
|
@ -64,14 +64,14 @@ L hi(PC) = read(vector++);
|
|||
db(PC) = 0x00;
|
||||
}
|
||||
|
||||
auto WDC65816::instructionSTP() -> void {
|
||||
auto WDC65816::instructionStop() -> void {
|
||||
r.stp = true;
|
||||
while(r.stp && !synchronizing()) {
|
||||
L idle();
|
||||
}
|
||||
}
|
||||
|
||||
auto WDC65816::instructionWAI() -> void {
|
||||
auto WDC65816::instructionWait() -> void {
|
||||
r.wai = true;
|
||||
while(r.wai && !synchronizing()) {
|
||||
L idle();
|
||||
|
|
@ -79,7 +79,7 @@ L idle();
|
|||
idle();
|
||||
}
|
||||
|
||||
auto WDC65816::instructionXCE() -> void {
|
||||
auto WDC65816::instructionExchangeCE() -> void {
|
||||
L idleIRQ();
|
||||
swap(CF, EF);
|
||||
if(EF) {
|
||||
|
|
@ -101,7 +101,7 @@ L idleIRQ();
|
|||
flag = 0;
|
||||
}
|
||||
|
||||
auto WDC65816::instructionREP() -> void {
|
||||
auto WDC65816::instructionResetP() -> void {
|
||||
auto data = fetch();
|
||||
L idle();
|
||||
P = P & ~data;
|
||||
|
|
@ -109,7 +109,7 @@ E XF = 1, MF = 1;
|
|||
if(XF) hi(X) = 0x00, hi(Y) = 0x00;
|
||||
}
|
||||
|
||||
auto WDC65816::instructionSEP() -> void {
|
||||
auto WDC65816::instructionSetP() -> void {
|
||||
auto data = fetch();
|
||||
L idle();
|
||||
P = P | data;
|
||||
|
|
@ -131,27 +131,27 @@ L idleIRQ();
|
|||
NF = to & 0x8000;
|
||||
}
|
||||
|
||||
auto WDC65816::instructionTCS() -> void {
|
||||
auto WDC65816::instructionTransferCS() -> void {
|
||||
L idleIRQ();
|
||||
S = A;
|
||||
E hi(S) = 0x01;
|
||||
}
|
||||
|
||||
auto WDC65816::instructionTSX8() -> void {
|
||||
auto WDC65816::instructionTransferSX8() -> void {
|
||||
L idleIRQ();
|
||||
lo(X) = lo(S);
|
||||
ZF = lo(X) == 0;
|
||||
NF = X & 0x80;
|
||||
}
|
||||
|
||||
auto WDC65816::instructionTSX16() -> void {
|
||||
auto WDC65816::instructionTransferSX16() -> void {
|
||||
L idleIRQ();
|
||||
X = S;
|
||||
ZF = X == 0;
|
||||
NF = X & 0x8000;
|
||||
}
|
||||
|
||||
auto WDC65816::instructionTXS() -> void {
|
||||
auto WDC65816::instructionTransferXS() -> void {
|
||||
L idleIRQ();
|
||||
E lo(S) = lo(X);
|
||||
N S = X;
|
||||
|
|
@ -168,7 +168,7 @@ auto WDC65816::instructionPush16(uint16 data) -> void {
|
|||
L push(lo(data));
|
||||
}
|
||||
|
||||
auto WDC65816::instructionPHD() -> void {
|
||||
auto WDC65816::instructionPushD() -> void {
|
||||
idle();
|
||||
pushN(hi(D));
|
||||
L pushN(lo(D));
|
||||
|
|
@ -192,7 +192,7 @@ L hi(data) = pull();
|
|||
NF = data & 0x8000;
|
||||
}
|
||||
|
||||
auto WDC65816::instructionPLD() -> void {
|
||||
auto WDC65816::instructionPullD() -> void {
|
||||
idle();
|
||||
idle();
|
||||
lo(D) = pullN();
|
||||
|
|
@ -202,7 +202,7 @@ L hi(D) = pullN();
|
|||
E hi(S) = 0x01;
|
||||
}
|
||||
|
||||
auto WDC65816::instructionPLB() -> void {
|
||||
auto WDC65816::instructionPullB() -> void {
|
||||
idle();
|
||||
idle();
|
||||
L B = pull();
|
||||
|
|
@ -210,7 +210,7 @@ L B = pull();
|
|||
NF = B & 0x80;
|
||||
}
|
||||
|
||||
auto WDC65816::instructionPLP() -> void {
|
||||
auto WDC65816::instructionPullP() -> void {
|
||||
idle();
|
||||
idle();
|
||||
L P = pull();
|
||||
|
|
@ -218,7 +218,7 @@ E XF = 1, MF = 1;
|
|||
if(XF) hi(X) = 0x00, hi(Y) = 0x00;
|
||||
}
|
||||
|
||||
auto WDC65816::instructionPEA() -> void {
|
||||
auto WDC65816::instructionPushEffectiveAddress() -> void {
|
||||
uint16 data = fetch();
|
||||
hi(data) = fetch();
|
||||
pushN(hi(data));
|
||||
|
|
@ -226,7 +226,7 @@ L pushN(lo(data));
|
|||
E hi(S) = 0x01;
|
||||
}
|
||||
|
||||
auto WDC65816::instructionPEI() -> void {
|
||||
auto WDC65816::instructionPushEffectiveIndirectAddress() -> void {
|
||||
auto direct = fetch();
|
||||
idle2();
|
||||
uint16 data = readDirectN(direct + 0);
|
||||
|
|
@ -236,7 +236,7 @@ L pushN(lo(data));
|
|||
E hi(S) = 0x01;
|
||||
}
|
||||
|
||||
auto WDC65816::instructionPER() -> void {
|
||||
auto WDC65816::instructionPushEffectiveRelativeAddress() -> void {
|
||||
uint16 displacement = fetch();
|
||||
hi(displacement) = fetch();
|
||||
idle();
|
||||
|
|
@ -10,27 +10,27 @@ L idle();
|
|||
}
|
||||
}
|
||||
|
||||
auto WDC65816::instructionBRL() -> void {
|
||||
auto WDC65816::instructionBranchLong() -> void {
|
||||
uint16 displacement = fetch();
|
||||
hi(displacement) = fetch();
|
||||
L idle();
|
||||
aa(PC) = PC + (int16)displacement;
|
||||
}
|
||||
|
||||
auto WDC65816::instructionJMPShort() -> void {
|
||||
auto WDC65816::instructionJumpShort() -> void {
|
||||
uint16 data = fetch();
|
||||
L hi(data) = fetch();
|
||||
aa(PC) = data;
|
||||
}
|
||||
|
||||
auto WDC65816::instructionJMPLong() -> void {
|
||||
auto WDC65816::instructionJumpLong() -> void {
|
||||
uint24 data = fetch();
|
||||
hi(data) = fetch();
|
||||
L db(data) = fetch();
|
||||
PC = data;
|
||||
}
|
||||
|
||||
auto WDC65816::instructionJMPIndirect() -> void {
|
||||
auto WDC65816::instructionJumpIndirect() -> void {
|
||||
uint16 absolute = fetch();
|
||||
hi(absolute) = fetch();
|
||||
uint16 data = read(uint16(absolute + 0));
|
||||
|
|
@ -38,7 +38,7 @@ L hi(data) = read(uint16(absolute + 1));
|
|||
aa(PC) = data;
|
||||
}
|
||||
|
||||
auto WDC65816::instructionJMPIndexedIndirect() -> void {
|
||||
auto WDC65816::instructionJumpIndexedIndirect() -> void {
|
||||
uint16 absolute = fetch();
|
||||
hi(absolute) = fetch();
|
||||
idle();
|
||||
|
|
@ -47,7 +47,7 @@ L hi(data) = read(db(PC) << 16 | uint16(absolute + X + 1));
|
|||
aa(PC) = data;
|
||||
}
|
||||
|
||||
auto WDC65816::instructionJMPIndirectLong() -> void {
|
||||
auto WDC65816::instructionJumpIndirectLong() -> void {
|
||||
uint16 absolute = fetch();
|
||||
hi(absolute) = fetch();
|
||||
uint24 data = read(uint16(absolute + 0));
|
||||
|
|
@ -56,7 +56,7 @@ L db(data) = read(uint16(absolute + 2));
|
|||
PC = data;
|
||||
}
|
||||
|
||||
auto WDC65816::instructionJSRShort() -> void {
|
||||
auto WDC65816::instructionCallShort() -> void {
|
||||
uint16 data = fetch();
|
||||
hi(data) = fetch();
|
||||
idle();
|
||||
|
|
@ -66,7 +66,7 @@ L push(lo(PC));
|
|||
aa(PC) = data;
|
||||
}
|
||||
|
||||
auto WDC65816::instructionJSRLong() -> void {
|
||||
auto WDC65816::instructionCallLong() -> void {
|
||||
uint24 data = fetch();
|
||||
hi(data) = fetch();
|
||||
pushN(db(PC));
|
||||
|
|
@ -79,7 +79,7 @@ L pushN(lo(PC));
|
|||
E hi(S) = 0x01;
|
||||
}
|
||||
|
||||
auto WDC65816::instructionJSRIndexedIndirect() -> void {
|
||||
auto WDC65816::instructionCallIndexedIndirect() -> void {
|
||||
uint16 absolute = fetch();
|
||||
pushN(hi(PC));
|
||||
pushN(lo(PC));
|
||||
|
|
@ -91,7 +91,7 @@ L hi(data) = read(db(PC) << 16 | uint16(absolute + X + 1));
|
|||
E hi(S) = 0x01;
|
||||
}
|
||||
|
||||
auto WDC65816::instructionRTI() -> void {
|
||||
auto WDC65816::instructionReturnInterrupt() -> void {
|
||||
idle();
|
||||
idle();
|
||||
P = pull();
|
||||
|
|
@ -106,7 +106,7 @@ E XF = 1, MF = 1;
|
|||
}
|
||||
}
|
||||
|
||||
auto WDC65816::instructionRTS() -> void {
|
||||
auto WDC65816::instructionReturnShort() -> void {
|
||||
idle();
|
||||
idle();
|
||||
uint16 data = pull();
|
||||
|
|
@ -116,7 +116,7 @@ L idle();
|
|||
aa(PC)++;
|
||||
}
|
||||
|
||||
auto WDC65816::instructionRTL() -> void {
|
||||
auto WDC65816::instructionReturnLong() -> void {
|
||||
idle();
|
||||
idle();
|
||||
uint24 data = pullN();
|
||||
|
|
|
|||
|
|
@ -40,7 +40,7 @@ namespace Processor {
|
|||
#include "instructions-write.cpp"
|
||||
#include "instructions-modify.cpp"
|
||||
#include "instructions-pc.cpp"
|
||||
#include "instructions-misc.cpp"
|
||||
#include "instructions-other.cpp"
|
||||
#include "instruction.cpp"
|
||||
|
||||
auto WDC65816::power() -> void {
|
||||
|
|
@ -54,9 +54,9 @@ auto WDC65816::power() -> void {
|
|||
P = 0x34;
|
||||
EF = 1;
|
||||
|
||||
r.mdr = 0x00;
|
||||
r.wai = false;
|
||||
r.stp = false;
|
||||
r.mdr = 0x00;
|
||||
r.wai = false;
|
||||
r.stp = false;
|
||||
r.vector = 0xfffc; //reset vector address
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -147,52 +147,52 @@ struct WDC65816 {
|
|||
|
||||
//instructions-pc.cpp
|
||||
auto instructionBranch(bool = 1) -> void;
|
||||
auto instructionBRL() -> void;
|
||||
auto instructionJMPShort() -> void;
|
||||
auto instructionJMPLong() -> void;
|
||||
auto instructionJMPIndirect() -> void;
|
||||
auto instructionJMPIndexedIndirect() -> void;
|
||||
auto instructionJMPIndirectLong() -> void;
|
||||
auto instructionJSRShort() -> void;
|
||||
auto instructionJSRLong() -> void;
|
||||
auto instructionJSRIndexedIndirect() -> void;
|
||||
auto instructionRTI() -> void;
|
||||
auto instructionRTS() -> void;
|
||||
auto instructionRTL() -> void;
|
||||
auto instructionBranchLong() -> void;
|
||||
auto instructionJumpShort() -> void;
|
||||
auto instructionJumpLong() -> void;
|
||||
auto instructionJumpIndirect() -> void;
|
||||
auto instructionJumpIndexedIndirect() -> void;
|
||||
auto instructionJumpIndirectLong() -> void;
|
||||
auto instructionCallShort() -> void;
|
||||
auto instructionCallLong() -> void;
|
||||
auto instructionCallIndexedIndirect() -> void;
|
||||
auto instructionReturnInterrupt() -> void;
|
||||
auto instructionReturnShort() -> void;
|
||||
auto instructionReturnLong() -> void;
|
||||
|
||||
//instructions-misc.cpp
|
||||
auto instructionBITImmediate8() -> void;
|
||||
auto instructionBITImmediate16() -> void;
|
||||
auto instructionNOP() -> void;
|
||||
auto instructionWDM() -> void;
|
||||
auto instructionXBA() -> void;
|
||||
auto instructionBitImmediate8() -> void;
|
||||
auto instructionBitImmediate16() -> void;
|
||||
auto instructionNoOperation() -> void;
|
||||
auto instructionPrefix() -> void;
|
||||
auto instructionExchangeBA() -> void;
|
||||
auto instructionBlockMove8(int) -> void;
|
||||
auto instructionBlockMove16(int) -> void;
|
||||
auto instructionInterrupt(uint16) -> void;
|
||||
auto instructionSTP() -> void;
|
||||
auto instructionWAI() -> void;
|
||||
auto instructionXCE() -> void;
|
||||
auto instructionStop() -> void;
|
||||
auto instructionWait() -> void;
|
||||
auto instructionExchangeCE() -> void;
|
||||
auto instructionSetFlag(bool&) -> void;
|
||||
auto instructionClearFlag(bool&) -> void;
|
||||
auto instructionREP() -> void;
|
||||
auto instructionSEP() -> void;
|
||||
auto instructionResetP() -> void;
|
||||
auto instructionSetP() -> void;
|
||||
auto instructionTransfer8(uint16&, uint16&) -> void;
|
||||
auto instructionTransfer16(uint16&, uint16&) -> void;
|
||||
auto instructionTCS() -> void;
|
||||
auto instructionTSX8() -> void;
|
||||
auto instructionTSX16() -> void;
|
||||
auto instructionTXS() -> void;
|
||||
auto instructionTransferCS() -> void;
|
||||
auto instructionTransferSX8() -> void;
|
||||
auto instructionTransferSX16() -> void;
|
||||
auto instructionTransferXS() -> void;
|
||||
auto instructionPush8(uint8) -> void;
|
||||
auto instructionPush16(uint16) -> void;
|
||||
auto instructionPHD() -> void;
|
||||
auto instructionPushD() -> void;
|
||||
auto instructionPull8(uint16&) -> void;
|
||||
auto instructionPull16(uint16&) -> void;
|
||||
auto instructionPLD() -> void;
|
||||
auto instructionPLB() -> void;
|
||||
auto instructionPLP() -> void;
|
||||
auto instructionPEA() -> void;
|
||||
auto instructionPEI() -> void;
|
||||
auto instructionPER() -> void;
|
||||
auto instructionPullD() -> void;
|
||||
auto instructionPullB() -> void;
|
||||
auto instructionPullP() -> void;
|
||||
auto instructionPushEffectiveAddress() -> void;
|
||||
auto instructionPushEffectiveIndirectAddress() -> void;
|
||||
auto instructionPushEffectiveRelativeAddress() -> void;
|
||||
|
||||
//instruction.cpp
|
||||
auto instruction() -> void;
|
||||
|
|
|
|||
|
|
@ -14,8 +14,8 @@ auto SA1::Enter() -> void {
|
|||
}
|
||||
|
||||
auto SA1::main() -> void {
|
||||
if(r.wai) return instructionWAI();
|
||||
if(r.stp) return instructionSTP();
|
||||
if(r.wai) return instructionWait();
|
||||
if(r.stp) return instructionStop();
|
||||
|
||||
if(mmio.sa1_rdyb || mmio.sa1_resb) {
|
||||
//SA-1 co-processor is asleep
|
||||
|
|
|
|||
|
|
@ -24,8 +24,8 @@ auto CPU::Enter() -> void {
|
|||
}
|
||||
|
||||
auto CPU::main() -> void {
|
||||
if(r.wai) return instructionWAI();
|
||||
if(r.stp) return instructionSTP();
|
||||
if(r.wai) return instructionWait();
|
||||
if(r.stp) return instructionStop();
|
||||
|
||||
if(status.interruptPending) {
|
||||
status.interruptPending = false;
|
||||
|
|
|
|||
|
|
@ -171,7 +171,7 @@ Presentation::Presentation() {
|
|||
Application::Windows::onModalChange([](bool modal) { if(modal && audio) audio->clear(); });
|
||||
#endif
|
||||
|
||||
#if defined(PLATFORM_MACOSX)
|
||||
#if defined(PLATFORM_MACOS)
|
||||
about.setVisible(false);
|
||||
Application::Cocoa::onAbout([&] { about.doActivate(); });
|
||||
Application::Cocoa::onActivate([&] { setFocused(); });
|
||||
|
|
|
|||
|
|
@ -19,7 +19,7 @@ ifeq ($(platform),windows)
|
|||
endif
|
||||
endif
|
||||
|
||||
ifeq ($(platform),macosx)
|
||||
ifeq ($(platform),macos)
|
||||
ifeq ($(hiro),)
|
||||
hiro := cocoa
|
||||
endif
|
||||
|
|
|
|||
|
|
@ -19,6 +19,10 @@ auto Icarus::error() const -> string {
|
|||
return errorMessage;
|
||||
}
|
||||
|
||||
auto Icarus::missing() const -> string_vector {
|
||||
return missingFiles;
|
||||
}
|
||||
|
||||
auto Icarus::success(string location) -> string {
|
||||
errorMessage = "";
|
||||
return location;
|
||||
|
|
@ -53,6 +57,9 @@ auto Icarus::manifest(string location) -> string {
|
|||
}
|
||||
|
||||
auto Icarus::import(string location) -> string {
|
||||
errorMessage = {};
|
||||
missingFiles = {};
|
||||
|
||||
location.transform("\\", "/").trimRight("/");
|
||||
if(!file::exists(location)) return failure("file does not exist");
|
||||
if(!file::readable(location)) return failure("file is unreadable");
|
||||
|
|
|
|||
|
|
@ -27,6 +27,7 @@ struct Icarus {
|
|||
Icarus();
|
||||
|
||||
auto error() const -> string;
|
||||
auto missing() const -> string_vector;
|
||||
auto success(string location) -> string;
|
||||
auto failure(string message) -> string;
|
||||
|
||||
|
|
@ -42,7 +43,7 @@ struct Icarus {
|
|||
|
||||
//super-famicom.cpp
|
||||
auto superFamicomManifest(string location) -> string;
|
||||
auto superFamicomManifest(vector<uint8_t>& buffer, string location, string* firmwareMissing = nullptr) -> string;
|
||||
auto superFamicomManifest(vector<uint8_t>& buffer, string location) -> string;
|
||||
auto superFamicomManifestScan(vector<Markup::Node>& roms, Markup::Node node) -> void;
|
||||
auto superFamicomImport(vector<uint8_t>& buffer, string location) -> string;
|
||||
|
||||
|
|
@ -108,6 +109,7 @@ struct Icarus {
|
|||
|
||||
private:
|
||||
string errorMessage;
|
||||
string_vector missingFiles;
|
||||
|
||||
struct {
|
||||
Markup::Node famicom;
|
||||
|
|
|
|||
|
|
@ -10,7 +10,7 @@ auto Icarus::superFamicomManifest(string location) -> string {
|
|||
return superFamicomManifest(buffer, location);
|
||||
}
|
||||
|
||||
auto Icarus::superFamicomManifest(vector<uint8_t>& buffer, string location, string* firmwareMissing) -> string {
|
||||
auto Icarus::superFamicomManifest(vector<uint8_t>& buffer, string location) -> string {
|
||||
string markup;
|
||||
string digest = Hash::SHA256(buffer.data(), buffer.size()).digest();
|
||||
|
||||
|
|
@ -27,7 +27,6 @@ auto Icarus::superFamicomManifest(vector<uint8_t>& buffer, string location, stri
|
|||
bool hasMSU1 = exists({location, "msu1.rom"});
|
||||
SuperFamicomCartridge cartridge{buffer.data(), buffer.size(), hasMSU1};
|
||||
if(markup = cartridge.markup) {
|
||||
if(firmwareMissing) *firmwareMissing = cartridge.firmware_missing;
|
||||
markup.append("\n");
|
||||
markup.append("information\n");
|
||||
markup.append(" region: ", cartridge.region == SuperFamicomCartridge::Region::NTSC ? "NTSC" : "PAL", "\n");
|
||||
|
|
@ -50,10 +49,8 @@ auto Icarus::superFamicomImport(vector<uint8_t>& buffer, string location) -> str
|
|||
auto source = Location::path(location);
|
||||
string target{settings["Library/Location"].text(), "Super Famicom/", name, ".sfc/"};
|
||||
|
||||
string firmwareMissing;
|
||||
auto markup = superFamicomManifest(buffer, location, &firmwareMissing);
|
||||
auto markup = superFamicomManifest(buffer, location);
|
||||
if(!markup) return failure("failed to parse ROM image");
|
||||
if(firmwareMissing) return failure({"ROM image is missing ", firmwareMissing, " firmware data"});
|
||||
|
||||
if(!create(target)) return failure("library path unwritable");
|
||||
if(exists({source, name, ".srm"}) && !exists({target, "save.ram"})) {
|
||||
|
|
@ -68,9 +65,13 @@ auto Icarus::superFamicomImport(vector<uint8_t>& buffer, string location) -> str
|
|||
for(auto rom : roms) {
|
||||
auto name = rom["name"].text();
|
||||
auto size = rom["size"].natural();
|
||||
if(size > buffer.size() - offset) return failure("ROM image is missing data");
|
||||
if(size > buffer.size() - offset) {
|
||||
missingFiles.append(name);
|
||||
continue;
|
||||
}
|
||||
write({target, name}, buffer.data() + offset, size);
|
||||
offset += size;
|
||||
}
|
||||
if(missingFiles) return failure({"ROM image is missing data: ", missingFiles.merge("; ")});
|
||||
return success(target);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -109,13 +109,13 @@ auto nall::main(string_vector args) -> void {
|
|||
new SettingsDialog;
|
||||
new ImportDialog;
|
||||
new ErrorDialog;
|
||||
#if defined(PLATFORM_MACOSX)
|
||||
#if defined(PLATFORM_MACOS)
|
||||
Application::Cocoa::onAbout([&] {
|
||||
MessageDialog().setTitle("About icarus").setText({
|
||||
"icarus\n\n"
|
||||
"Author: byuu\n"
|
||||
"License: GPLv3\n"
|
||||
"Website: http://byuu.org/\n"
|
||||
"Website: https://byuu.org/\n"
|
||||
}).information();
|
||||
});
|
||||
Application::Cocoa::onPreferences([&] {
|
||||
|
|
|
|||
|
|
@ -61,7 +61,7 @@ inline auto library::close() -> void {
|
|||
dlclose((void*)handle);
|
||||
handle = 0;
|
||||
}
|
||||
#elif defined(PLATFORM_MACOSX)
|
||||
#elif defined(PLATFORM_MACOS)
|
||||
inline auto library::open(const string& name, const string& path) -> bool {
|
||||
if(handle) close();
|
||||
if(path) handle = (uintptr)dlopen(string(path, "lib", name, ".dylib"), RTLD_LAZY);
|
||||
|
|
|
|||
|
|
@ -5,7 +5,7 @@ namespace nall {
|
|||
|
||||
struct Intrinsics {
|
||||
enum class Compiler : uint { Clang, GCC, VisualCPP, Unknown };
|
||||
enum class Platform : uint { Windows, MacOSX, Linux, BSD, Unknown };
|
||||
enum class Platform : uint { Windows, MacOS, Linux, BSD, Unknown };
|
||||
enum class API : uint { Windows, Posix, Unknown };
|
||||
enum class Display : uint { Windows, Quartz, Xorg, Unknown };
|
||||
enum class Processor : uint { x86, amd64, ARM, PPC32, PPC64, Unknown };
|
||||
|
|
@ -72,10 +72,10 @@ namespace nall {
|
|||
auto Intrinsics::api() -> API { return API::Windows; }
|
||||
auto Intrinsics::display() -> Display { return Display::Windows; }
|
||||
#elif defined(__APPLE__)
|
||||
#define PLATFORM_MACOSX
|
||||
#define PLATFORM_MACOS
|
||||
#define API_POSIX
|
||||
#define DISPLAY_QUARTZ
|
||||
auto Intrinsics::platform() -> Platform { return Platform::MacOSX; }
|
||||
auto Intrinsics::platform() -> Platform { return Platform::MacOS; }
|
||||
auto Intrinsics::api() -> API { return API::Posix; }
|
||||
auto Intrinsics::display() -> Display { return Display::Quartz; }
|
||||
#elif defined(linux) || defined(__linux__)
|
||||
|
|
@ -104,7 +104,7 @@ namespace nall {
|
|||
|
||||
}
|
||||
|
||||
#if defined(PLATFORM_MACOSX)
|
||||
#if defined(PLATFORM_MACOS)
|
||||
#include <machine/endian.h>
|
||||
#elif defined(PLATFORM_LINUX)
|
||||
#include <endian.h>
|
||||
|
|
|
|||
|
|
@ -77,7 +77,7 @@ inline auto config() -> string {
|
|||
SHGetFolderPathW(nullptr, CSIDL_APPDATA | CSIDL_FLAG_CREATE, nullptr, 0, path);
|
||||
string result = (const char*)utf8_t(path);
|
||||
result.transform("\\", "/");
|
||||
#elif defined(PLATFORM_MACOSX)
|
||||
#elif defined(PLATFORM_MACOS)
|
||||
string result = {Path::user(), "Library/Application Support/"};
|
||||
#else
|
||||
string result = {Path::user(), ".config/"};
|
||||
|
|
@ -95,7 +95,7 @@ inline auto local() -> string {
|
|||
SHGetFolderPathW(nullptr, CSIDL_LOCAL_APPDATA | CSIDL_FLAG_CREATE, nullptr, 0, path);
|
||||
string result = (const char*)utf8_t(path);
|
||||
result.transform("\\", "/");
|
||||
#elif defined(PLATFORM_MACOSX)
|
||||
#elif defined(PLATFORM_MACOS)
|
||||
string result = {Path::user(), "Library/Application Support/"};
|
||||
#else
|
||||
string result = {Path::user(), ".local/share/"};
|
||||
|
|
@ -114,7 +114,7 @@ inline auto shared() -> string {
|
|||
SHGetFolderPathW(nullptr, CSIDL_COMMON_APPDATA | CSIDL_FLAG_CREATE, nullptr, 0, path);
|
||||
string result = (const char*)utf8_t(path);
|
||||
result.transform("\\", "/");
|
||||
#elif defined(PLATFORM_MACOSX)
|
||||
#elif defined(PLATFORM_MACOS)
|
||||
string result = "/Library/Application Support/";
|
||||
#else
|
||||
string result = "/usr/share/";
|
||||
|
|
|
|||
|
|
@ -97,7 +97,7 @@ namespace Math {
|
|||
#define dllexport
|
||||
#endif
|
||||
|
||||
#if defined(PLATFORM_MACOSX)
|
||||
#if defined(PLATFORM_MACOS)
|
||||
#define MSG_NOSIGNAL 0
|
||||
#endif
|
||||
|
||||
|
|
|
|||
|
|
@ -24,7 +24,7 @@ struct execute_result_t {
|
|||
string error;
|
||||
};
|
||||
|
||||
#if defined(PLATFORM_MACOSX) || defined(PLATFORM_LINUX) || defined(PLATFORM_BSD)
|
||||
#if defined(PLATFORM_MACOS) || defined(PLATFORM_LINUX) || defined(PLATFORM_BSD)
|
||||
|
||||
template<typename... P> inline auto execute(const string& name, P&&... p) -> execute_result_t {
|
||||
int fdout[2];
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
ifeq ($(platform),macosx)
|
||||
ifeq ($(platform),macos)
|
||||
rubyflags = $(objcppflags) $(flags)
|
||||
else
|
||||
rubyflags = $(cppflags) $(flags)
|
||||
|
|
@ -33,7 +33,7 @@ ifeq ($(platform),windows)
|
|||
rubylink += $(if $(findstring audio.openal,$(ruby)),-lopenal32)
|
||||
endif
|
||||
|
||||
ifeq ($(platform),macosx)
|
||||
ifeq ($(platform),macos)
|
||||
rubylink += $(if $(findstring audio.openal,$(ruby)),-framework OpenAL)
|
||||
endif
|
||||
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
#if defined(PLATFORM_MACOSX)
|
||||
#if defined(PLATFORM_MACOS)
|
||||
#include <OpenAL/al.h>
|
||||
#include <OpenAL/alc.h>
|
||||
#else
|
||||
|
|
|
|||
Loading…
Reference in New Issue