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876 Commits 1 Branch 122 Tags 59 MiB
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99 Commits

Author SHA1 Message Date
Lior Halphon 7b36ee10a4 Merge branch 'master' into sgb 2019-01-05 19:00:22 +02:00
Lior Halphon 612cd07fb3 Fixed emulation of echo RAM 2018-12-12 23:44:00 +02:00
Lior Halphon ea09dfc888 Fixed multiplayer SGB mode 2018-12-04 23:46:30 +02:00
Lior Halphon 7735d638c6 Multiplayer SGB APIs/SGB detection 2018-11-12 00:37:06 +02:00
Lior Halphon 44891d5c4a Initial code to support SGB, command “parsing”, replacement SGB boot ROM 2018-11-11 01:16:32 +02:00
Lior Halphon 11c148c851 Starting G/HDMA directly takes one more M-cycle (More research required) 2018-09-15 00:48:31 +03:00
Lior Halphon f7b882f0e8 Whoops 2018-07-22 02:10:26 +03:00
Lior Halphon b7426f93c0 Randomize object palettes. Slightly more accurate emulation of FF4C. 2018-07-20 23:23:47 +03:00
Lior Halphon 2e9e3424ec Document some revision differences 2018-07-14 21:52:54 +03:00
Lior Halphon a7aabca618 Starting to add CGB-C support 2018-07-03 21:43:46 +03:00
Lior Halphon d81c23cb16 Fixed HDMA regression 2018-06-16 23:52:24 +03:00
Lior Halphon 45c73e0175 Replaced the is_cgb bool with a more future compatible model enum. Removed the GB_init_cgb API and replaced it with an extended GB_init and GB_switch_model_and_reset APIs that now receive a model parameter. Increased the struct version. 2018-06-16 13:59:33 +03:00
Lior Halphon 6532aef089 Correct emulation of the DMG stat write bug 2018-05-26 18:06:40 +03:00
Lior Halphon 9693b2de6a Refined the STAT bug behavior. Still not perfect. 2018-05-26 17:06:49 +03:00
Lior Halphon 855ffb490a A HBlank interrupt cannot occur in the last M-cycle of HBlank. Correct emulation of STAT access conflicts on the CGB (Test: CPU-E, single speed only). Fixes a minor graphical glitch in Pokémon Puzzle Challenge. 2018-05-25 23:42:36 +03:00
Lior Halphon 713dc02e46 A bit tacky, but T-cycle accurate emulation of LYC write conflicts on the CGB. Only single speed mode verified. Closes #54 2018-05-11 12:38:55 +03:00
Lior Halphon f1ec42d4ba H/GDMA was 4 times faster than it should have been. Made it also more accurate. Fixes #56 2018-04-13 14:41:39 +03:00
Lior Halphon 0c86ff1ee4 More CGB revision quirks 2018-04-06 04:00:37 +03:00
Lior Halphon e163026ca9 The STAT bug does not occur during the glitched mode 0 2018-04-02 01:05:32 +03:00
Lior Halphon 7671648fca Simplified a function 2018-03-27 19:06:36 +03:00
Lior Halphon 4cbade9a88 Function name change 2018-03-27 15:55:12 +03:00
Lior Halphon 4986930511 Mostly complete emulation of the OAM bug. Passes oam_bug-2. 2018-03-27 15:46:00 +03:00
Lior Halphon 18e32d1755 Merge branch 'master' into timing 
# Conflicts:
#	Core/gb.c
 2018-03-22 22:37:35 +02:00
Lior Halphon 577e23925b Fixed sources-dmgABCXmgbS 2018-03-22 20:09:01 +02:00
Lior Halphon b702d56547 Merge branch 'master' into timing 
# Conflicts:
#	Core/display.c
#	Core/z80_cpu.c
 2018-03-01 21:22:33 +02:00
Lior Halphon b02e40d5a2 Refinement to that last fix 2018-02-25 23:23:55 +02:00
Lior Halphon 90a943d05a Emulate an HDMA quirk required to properly emulate Aevilia 2018-02-25 22:32:41 +02:00
Lior Halphon ef670986c6 Rewrote PPU (currently only emulates DMG correctly) to use the new timing mechanism. Removed “future interrupts” (No longer required because SameBoy is now T-cycle based) 2018-02-25 00:48:45 +02:00
Lior Halphon 42ab746a66 Starting to remove the delayed interrupts hack – done for timer interrupt, broken for display interrupts 2018-02-23 15:33:44 +02:00
Lior Halphon c48097a484 Convert div counter to the SM mechanism 2018-02-23 13:16:05 +02:00
Lior Halphon 9802ca41dd Components not affected by CGB’s double speed mode now operate in 8MHz mode to theoretically make advance_cycles(gb, 1) safe. 2018-02-20 21:17:12 +02:00
Lior Halphon f79af39ea2 More accurate emulation of the APU’s analog characteristics 2018-02-16 18:01:50 +02:00
Lior Halphon 441781cbe9 Libretro .o files are now in the build/obj folder and are suffixed with _libretro (since they have different compilation flags). This also lets us rename gbmemory.c/h back to its original name. 2017-10-12 19:42:30 +03:00
twinaphex a7db98c22e Memory needs to be uniquely named for Android 2017-10-09 11:36:55 -05:00
twinaphex 09f4edda57 Comment out debugger code - add HAVE_DEBUGGER ifdef 2017-10-09 11:36:53 -05:00
Lior Halphon b9bdd6c49c Merge branch 'master' into new_apu 2017-09-10 02:33:40 +03:00
Lior Halphon 1e90400916 Reimplemented delayed/future interrupts, currently correct only for CGB. 2017-09-09 13:32:12 +03:00
Lior Halphon ba0e66a5b7 Merge branch 'master' into new_apu 2017-09-04 18:41:13 +03:00
Lior Halphon 9b490396bb Fixed timing when turning the LCD display on during double speed mode 2017-09-02 23:26:45 +03:00
Lior Halphon e7d5cdbb42 Merge branch 'master' into new_apu 2017-08-20 01:37:33 +03:00
Lior Halphon cbbaf2ee84 Refined Window behavior once more, Fixes #12 (While not breaking Donkey Kong or 007) 2017-08-20 01:34:12 +03:00
Lior Halphon d43daed6a6 Merge branch 'master' into new_apu 2017-08-12 21:43:09 +03:00
Lior Halphon 7df4e56454 KEY1 is only writable in CGB mode; screen should be black is LCD is on while in stop mode. 2017-08-12 21:42:47 +03:00
Lior Halphon baccf336d7 Complete rewrite of the APU. Channel 3 is complete and passes all the relevant tests from blargg’s suite, as well as PCM34-based tests. Actual sound output is basic and limited, though. 2017-07-21 19:06:55 +03:00
Lior Halphon c4ccbd5cce Improved serial interrupt timing, fixes boot_sclk_align. 2017-06-23 17:58:04 +03:00
Lior Halphon c59272d46d Misc minor fixes, fixes several Mooneye-GB tests 2017-06-21 20:39:23 +03:00
Lior Halphon abf7efcc5a Fixed lcdon_write_timing. 2017-06-18 21:27:07 +03:00
Lior Halphon 86c9f9d89d Updated SameBoy to pass Mooneye-GB’s lcdon_timing test (on a DMG), as well as refined related CBG behaviors. 2017-06-17 22:17:58 +03:00
Lior Halphon d72807dd67 Implemented LCD first-frame-skip behavior, fixes a visual glitch in Pokémon Pinball 2017-06-03 16:42:42 +03:00
Lior Halphon c766704267 More accurate FPS capping that tracks time correctly even when the screen is off. Should also support restarting the LCD during blank to increase FPS to 63. 2017-04-21 16:00:53 +03:00