mirror of https://github.com/bsnes-emu/bsnes.git
Components not affected by CGB’s double speed mode now operate in 8MHz mode to theoretically make advance_cycles(gb, 1) safe.
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@ -385,7 +385,7 @@ void GB_apu_run(GB_gameboy_t *gb)
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if (gb->apu_output.sample_rate) {
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gb->apu_output.cycles_since_render += cycles;
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double cycles_per_sample = GB_get_clock_rate(gb) / (double)gb->apu_output.sample_rate;
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double cycles_per_sample = 2 * GB_get_clock_rate(gb) / (double)gb->apu_output.sample_rate; /* 2 * because we use 8MHz units */
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if (gb->apu_output.sample_cycles > cycles_per_sample) {
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gb->apu_output.sample_cycles -= cycles_per_sample;
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@ -127,7 +127,7 @@ typedef struct {
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volatile bool copy_in_progress;
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volatile bool lock;
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double sample_cycles;
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double sample_cycles; // In 8 MHz units
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// Samples are NOT normalized to MAX_CH_AMP * 4 at this stage!
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unsigned cycles_since_render;
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@ -1411,8 +1411,8 @@ static bool lcd(GB_gameboy_t *gb, char *arguments, char *modifiers, const debugg
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GB_log(gb, " LYC interrupt: %s\n", (gb->io_registers[GB_IO_STAT] & 64)? "Enabled" : "Disabled");
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GB_log(gb, "\nCycles since frame start: %d\n", gb->display_cycles);
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GB_log(gb, "Current line: %d\n", gb->display_cycles / 456);
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GB_log(gb, "\nCycles since frame start: %d\n", gb->display_cycles / 2);
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GB_log(gb, "Current line: %d\n", gb->display_cycles / 456 / 2);
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GB_log(gb, "LY: %d\n", gb->io_registers[GB_IO_LY]);
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GB_log(gb, "LYC: %d\n", gb->io_registers[GB_IO_LYC]);
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GB_log(gb, "Window position: %d, %d\n", (signed) gb->io_registers[GB_IO_WX] - 7 , gb->io_registers[GB_IO_WY]);
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@ -15,13 +15,15 @@
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Todo: Mode lengths are not constants, see http://blog.kevtris.org/blogfiles/Nitty%20Gritty%20Gameboy%20VRAM%20Timing.txt
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*/
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#define MODE2_LENGTH (80)
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#define MODE3_LENGTH (172)
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#define MODE0_LENGTH (204)
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/* The display (logically) runs in 8MHz units, so we double our length constants */
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#define MODE2_LENGTH (80 * 2)
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#define MODE3_LENGTH (172 * 2)
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#define MODE0_LENGTH (204 * 2)
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#define LINE_LENGTH (MODE2_LENGTH + MODE3_LENGTH + MODE0_LENGTH) // = 456
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#define LINES (144)
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#define WIDTH (160)
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#define VIRTUAL_LINES (LCDC_PERIOD / LINE_LENGTH) // = 154
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#define FRAME_LENGTH (LCDC_PERIOD * 2)
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#define VIRTUAL_LINES (FRAME_LENGTH / LINE_LENGTH) // = 154
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typedef struct __attribute__((packed)) {
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uint8_t y;
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@ -332,9 +334,9 @@ static void update_display_state(GB_gameboy_t *gb, uint8_t cycles)
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/* Keep sending vblanks to user even if the screen is off */
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gb->display_cycles += cycles;
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if (gb->display_cycles >= LCDC_PERIOD) {
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if (gb->display_cycles >= FRAME_LENGTH) {
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/* VBlank! */
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gb->display_cycles -= LCDC_PERIOD;
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gb->display_cycles -= FRAME_LENGTH;
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display_vblank(gb);
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}
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@ -344,23 +346,23 @@ static void update_display_state(GB_gameboy_t *gb, uint8_t cycles)
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return;
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}
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uint8_t atomic_increase = gb->cgb_double_speed? 2 : 4;
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uint8_t atomic_increase = gb->cgb_double_speed? 4 : 8;
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/* According to AntonioND's docs this value should be 0 in CGB mode, but tests I ran on my CGB seem to contradict
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these findings.
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Todo: Investigate what causes the difference between our findings */
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uint8_t stat_delay = gb->cgb_double_speed? 2 : 4; // (gb->cgb_mode? 0 : 4);
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uint8_t stat_delay = gb->cgb_double_speed? 4 : 8; // (gb->cgb_mode? 0 : 8);
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/* Todo: Is this correct for DMG mode CGB? */
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uint8_t scx_delay = gb->effective_scx & 7;
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uint8_t scx_delay = (gb->effective_scx & 7) * 2;
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if (gb->cgb_double_speed) {
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scx_delay = (scx_delay + 1) & ~1;
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scx_delay = (scx_delay + 2) & ~3;
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}
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else {
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scx_delay = (scx_delay + (gb->first_scanline ? 2 : 0)) & ~3;
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scx_delay = (scx_delay + (gb->first_scanline ? 4 : 0)) & ~7;
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}
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/* Todo: These are correct for DMG, DMG-mode CGB, and single speed CGB. Is is correct for double speed CGB? */
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uint8_t oam_blocking_rush = gb->cgb_double_speed? 2 : 4;
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uint8_t vram_blocking_rush = gb->is_cgb? 0 : 4;
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uint8_t oam_blocking_rush = gb->cgb_double_speed? 4 : 8;
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uint8_t vram_blocking_rush = gb->is_cgb? 0 : 8;
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for (; cycles; cycles -= atomic_increase) {
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bool dmg_future_stat = false;
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@ -371,11 +373,11 @@ static void update_display_state(GB_gameboy_t *gb, uint8_t cycles)
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gb->stat_interrupt_line = false;
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gb->display_cycles += atomic_increase;
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/* The very first line is 4 clocks shorter when the LCD turns on. Verified on SGB2, CGB in CGB mode and
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/* The very first line is 1 M-cycle shorter when the LCD turns on. Verified on SGB2, CGB in CGB mode and
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CGB in double speed mode. */
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if (gb->first_scanline && gb->display_cycles >= LINE_LENGTH - 8) {
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if (gb->first_scanline && gb->display_cycles >= LINE_LENGTH - 0x10) {
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gb->first_scanline = false;
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gb->display_cycles += 4;
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gb->display_cycles += 8;
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}
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bool should_compare_ly = true;
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uint8_t ly_for_comparison = gb->io_registers[GB_IO_LY] = gb->display_cycles / LINE_LENGTH;
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@ -383,7 +385,7 @@ static void update_display_state(GB_gameboy_t *gb, uint8_t cycles)
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/* Handle cycle completion. STAT's initial value depends on model and mode */
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if (gb->display_cycles == LCDC_PERIOD) {
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if (gb->display_cycles == FRAME_LENGTH) {
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/* VBlank! */
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gb->display_cycles = 0;
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gb->io_registers[GB_IO_STAT] &= ~3;
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@ -542,11 +544,11 @@ static void update_display_state(GB_gameboy_t *gb, uint8_t cycles)
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case 0:
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should_compare_ly = false;
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break;
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case 4:
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case 8:
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gb->io_registers[GB_IO_LY] = 0;
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ly_for_comparison = VIRTUAL_LINES - 1;
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break;
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case 8:
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case 16:
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gb->io_registers[GB_IO_LY] = 0;
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should_compare_ly = false;
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break;
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@ -561,9 +563,9 @@ static void update_display_state(GB_gameboy_t *gb, uint8_t cycles)
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case 0:
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ly_for_comparison = VIRTUAL_LINES - 2;
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break;
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case 4:
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break;
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case 8:
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break;
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case 16:
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gb->io_registers[GB_IO_LY] = 0;
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break;
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default:
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@ -576,7 +578,7 @@ static void update_display_state(GB_gameboy_t *gb, uint8_t cycles)
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switch (gb->display_cycles - (VIRTUAL_LINES - 1) * LINE_LENGTH) {
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case 0:
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break;
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case 4:
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case 8:
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gb->io_registers[GB_IO_LY] = 0;
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break;
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default:
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@ -591,11 +593,11 @@ static void update_display_state(GB_gameboy_t *gb, uint8_t cycles)
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case 0:
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ly_for_comparison = VIRTUAL_LINES - 2;
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break;
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case 2:
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case 4:
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break;
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case 6:
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case 8:
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break;
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case 12:
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case 16:
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gb->io_registers[GB_IO_LY] = 0;
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break;
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default:
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@ -666,7 +668,7 @@ static void update_display_state(GB_gameboy_t *gb, uint8_t cycles)
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This is based on AntonioND's docs, however I could not reproduce these findings on my CGB.
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Todo: Find out why my tests contradict these docs */
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if (gb->cgb_mode && !gb->cgb_double_speed &&
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gb->display_cycles % LINE_LENGTH == LINE_LENGTH - 4) {
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gb->display_cycles % LINE_LENGTH == LINE_LENGTH - 8) {
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uint8_t glitch_pattern[] = {0, 0, 2, 0, 4, 4, 6, 0, 8};
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if ((gb->io_registers[GB_IO_LY] & 0xF) == 0xF) {
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gb->io_registers[GB_IO_LY] = glitch_pattern[gb->io_registers[GB_IO_LY] >> 4] << 4;
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@ -709,7 +711,7 @@ void GB_display_run(GB_gameboy_t *gb, uint8_t cycles)
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/* Render */
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int16_t current_lcdc_x = gb->display_cycles % LINE_LENGTH - MODE2_LENGTH - (gb->effective_scx & 0x7) - 7;
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int16_t current_lcdc_x = (gb->display_cycles % LINE_LENGTH - MODE2_LENGTH) / 2 - (gb->effective_scx & 0x7) - 7;
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for (;gb->previous_lcdc_x < current_lcdc_x; gb->previous_lcdc_x++) {
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if (gb->previous_lcdc_x >= WIDTH) {
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@ -309,7 +309,7 @@ uint64_t GB_run_frame(GB_gameboy_t *gb)
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}
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gb->turbo = old_turbo;
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gb->turbo_dont_skip = old_dont_skip;
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return gb->cycles_since_last_sync * 1000000000LL / GB_get_clock_rate(gb);
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return gb->cycles_since_last_sync * 1000000000LL / 2 / GB_get_clock_rate(gb); /* / 2 because we use 8MHz units */
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}
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void GB_set_pixels_output(GB_gameboy_t *gb, uint32_t *output)
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14
Core/gb.h
14
Core/gb.h
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@ -267,7 +267,7 @@ struct GB_gameboy_internal_s {
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bool hdma_on;
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bool hdma_on_hblank;
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uint8_t hdma_steps_left;
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uint16_t hdma_cycles;
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uint16_t hdma_cycles; // in 8MHz units
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uint16_t hdma_current_src, hdma_current_dest;
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uint8_t dma_steps_left;
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@ -332,7 +332,7 @@ struct GB_gameboy_internal_s {
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/* Timing */
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GB_SECTION(timing,
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uint32_t display_cycles;
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uint32_t display_cycles; // In 8 MHz units
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uint32_t div_cycles;
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uint8_t tima_reload_state; /* After TIMA overflows, it becomes 0 for 4 cycles before actually reloading. */
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uint16_t serial_cycles;
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@ -418,7 +418,7 @@ struct GB_gameboy_internal_s {
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/* Timing */
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uint64_t last_sync;
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uint64_t cycles_since_last_sync;
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uint64_t cycles_since_last_sync; // In 8MHz units
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/* Audio */
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GB_apu_output_t apu_output;
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@ -438,8 +438,8 @@ struct GB_gameboy_internal_s {
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GB_serial_transfer_end_callback_t serial_transfer_end_callback;
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/* IR */
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long cycles_since_ir_change;
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long cycles_since_input_ir_change;
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long cycles_since_ir_change; // In 8MHz units
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long cycles_since_input_ir_change; // In 8MHz units
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GB_ir_queue_item_t ir_queue[GB_MAX_IR_QUEUE];
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size_t ir_queue_length;
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@ -493,7 +493,7 @@ struct GB_gameboy_internal_s {
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uint32_t ram_size; // Different between CGB and DMG
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uint8_t boot_rom[0x900];
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bool vblank_just_occured; // For slow operations involving syscalls; these should only run once per vblank
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uint8_t cycles_since_run; // How many cycles have passed since the last call to GB_run()
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uint8_t cycles_since_run; // How many cycles have passed since the last call to GB_run(), in 8MHz units
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double clock_multiplier;
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);
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};
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@ -563,7 +563,7 @@ void GB_attributed_log(GB_gameboy_t *gb, GB_log_attributes attributes, const cha
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void GB_set_pixels_output(GB_gameboy_t *gb, uint32_t *output);
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void GB_set_infrared_input(GB_gameboy_t *gb, bool state);
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void GB_queue_infrared_input(GB_gameboy_t *gb, bool state, long cycles_after_previous_change);
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void GB_queue_infrared_input(GB_gameboy_t *gb, bool state, long cycles_after_previous_change); /* In 8MHz units*/
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void GB_set_vblank_callback(GB_gameboy_t *gb, GB_vblank_callback_t callback);
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void GB_set_log_callback(GB_gameboy_t *gb, GB_log_callback_t callback);
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@ -708,8 +708,8 @@ void GB_dma_run(GB_gameboy_t *gb)
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void GB_hdma_run(GB_gameboy_t *gb)
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{
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if (!gb->hdma_on) return;
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while (gb->hdma_cycles >= 8) {
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gb->hdma_cycles -= 8;
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while (gb->hdma_cycles >= 0x10) {
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gb->hdma_cycles -= 0x10;
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for (uint8_t i = 0; i < 0x10; i++) {
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GB_write_memory(gb, 0x8000 | (gb->hdma_current_dest++ & 0x1FFF), GB_read_memory(gb, (gb->hdma_current_src++)));
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@ -55,9 +55,9 @@ void GB_timing_sync(GB_gameboy_t *gb)
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return;
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}
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/* Prevent syncing if not enough time has passed.*/
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if (gb->cycles_since_last_sync < LCDC_PERIOD / 4) return;
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if (gb->cycles_since_last_sync < LCDC_PERIOD / 8) return;
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uint64_t target_nanoseconds = gb->cycles_since_last_sync * 1000000000LL / GB_get_clock_rate(gb);
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uint64_t target_nanoseconds = gb->cycles_since_last_sync * 1000000000LL / 2 / GB_get_clock_rate(gb); /* / 2 because we use 8MHz units */
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int64_t nanoseconds = get_nanoseconds();
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if (labs((signed long)(nanoseconds - gb->last_sync)) < target_nanoseconds ) {
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nsleep(target_nanoseconds + gb->last_sync - nanoseconds);
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gb->debugger_ticks += cycles;
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cycles >>= gb->cgb_double_speed;
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cycles <<= !gb->cgb_double_speed;
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// Not affected by speed boost
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gb->hdma_cycles += cycles;
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