brandman211 610acf6ad6 -Made MVI@ and ADD@ follow the stack and immediate mode rules for incrementing / decrementing the SP / PC. ... -Disabled Intellicart hook for ReadMemory, which seemed to be interfering. -Implemented MVO@. -Several instructions are now executed in succession until it hits the unimplemented "XORR R5, R5". I should probably refactor Disassemble and Execute to label registers as source / destination to avoid further confusion at some point. My disassembly might have the source / destination registers flipped as well.		2012-07-20 07:22:41 +00:00
..
Intellicart.cs	-Parsed / implemented fine addresses for the Intellicart.	2012-07-18 05:35:10 +00:00
Intellivision.cs	-Loaded EROM / GROM.	2012-07-19 00:05:08 +00:00
MemoryMap.cs	-Made MVI@ and ADD@ follow the stack and immediate mode rules for incrementing / decrementing the SP / PC.	2012-07-20 07:22:41 +00:00