Triang3l
|
d827bbeb6c
|
[D3D12] Fix texture binding hashing
|
2018-10-04 23:57:08 +03:00 |
|
Triang3l
|
131525e44d
|
[D3D12] Don't create SRVs if textures not changed
|
2018-10-04 14:36:48 +03:00 |
|
Triang3l
|
b77ffe3df6
|
[D3D12] Output gamma ramp
|
2018-10-03 14:36:17 +03:00 |
|
Triang3l
|
c624bf8c49
|
[D3D12] DXBC: Use a0 for maxas scratch because ps must not be modified without a write mask
|
2018-10-02 21:24:50 +03:00 |
|
Triang3l
|
90f586383a
|
[D3D12] Make tiled resources optional - not available on old Intel HD Graphics
|
2018-10-02 17:36:10 +03:00 |
|
Triang3l
|
9e17bbf016
|
[D3D12] Refactor system and bool/loop constants into separate descriptor ranges
|
2018-10-02 16:34:22 +03:00 |
|
Triang3l
|
2588aab89d
|
[GPU/D3D12] Float constant remapping fixes
|
2018-10-01 20:15:00 +03:00 |
|
Triang3l
|
c4599ff211
|
[D3D12] Compact float constants and don't split them into pages
|
2018-09-30 20:17:26 +03:00 |
|
Triang3l
|
eb50ebd885
|
[D3D12] Write to 8_8_8_8_GAMMA in gamma space
|
2018-09-29 13:30:05 +03:00 |
|
Triang3l
|
64209748e3
|
[D3D12] Better polygon offset scale
|
2018-09-29 12:01:09 +03:00 |
|
Triang3l
|
400747bf7c
|
[D3D12] Point sprite size
|
2018-09-29 11:25:03 +03:00 |
|
Triang3l
|
d9538e6cc2
|
[D3D12] Log unsupported texture formats and don't log texture invalidation
|
2018-09-27 10:27:55 +03:00 |
|
Triang3l
|
ea7d9e9060
|
[D3D12] Emulate reversed Z in shaders because it's unsupported on Nvidia
|
2018-09-26 20:46:24 +03:00 |
|
Triang3l
|
55f96c0f83
|
[D3D12] DXBC: Apply exp bias after alpha test
|
2018-09-26 16:20:04 +03:00 |
|
Triang3l
|
70103804c3
|
[D3D12] 8/16bpp resolves, fixed16 RT exp bias, RT format documentation
|
2018-09-26 16:10:23 +03:00 |
|
Triang3l
|
6e36101b42
|
[D3D12] Experimental write watch implementation for shared memory
|
2018-09-24 23:18:16 +03:00 |
|
Triang3l
|
005e590c92
|
[D3D12] SHM upload range cleanup and mask index buffer address
|
2018-09-23 18:37:41 +03:00 |
|
Triang3l
|
ecfa70284e
|
[D3D12] Treat gamma/as_16 EDRAM formats the same as their base formats
|
2018-09-22 19:22:57 +03:00 |
|
Triang3l
|
133604f249
|
[D3D12] Decompress textures if their size is not 4x4-aligned
|
2018-09-22 19:03:25 +03:00 |
|
Triang3l
|
bb24521c2b
|
[D3D12] DXT5 decompression shader (not used yet)
|
2018-09-22 15:52:07 +03:00 |
|
Triang3l
|
4d1b3caf8c
|
[D3D12] DXBC: Fix max4 instruction length
|
2018-09-22 13:36:04 +03:00 |
|
Triang3l
|
6e3cf5dd22
|
[D3D12] Cleanup selection in shaders and add some DXT5 alpha code
|
2018-09-21 21:22:33 +03:00 |
|
Triang3l
|
17e3f09c1e
|
[D3D12] DXT1 decompression shader
|
2018-09-21 08:55:55 +03:00 |
|
Triang3l
|
1f248572ac
|
[D3D12] Better explanation of dxbc_switch
|
2018-09-19 23:26:45 +03:00 |
|
Triang3l
|
9daea21edc
|
[D3D12] Don't use _COLOR blend modes for alpha
|
2018-09-19 22:54:35 +03:00 |
|
Triang3l
|
cbd36218bf
|
[D3D12] DXBC: Use switch instead of if for flow control (experimentally)
|
2018-09-19 21:25:58 +03:00 |
|
Triang3l
|
4db3a927ad
|
[D3D12] Remove ID3DBlob from D3D12Shader
|
2018-09-19 17:08:48 +03:00 |
|
Triang3l
|
ed66694319
|
[D3D12] Slightly better logging
|
2018-09-19 16:50:13 +03:00 |
|
Triang3l
|
fdd536f572
|
[D3D12] Swap columns 0:39 and 40:79 of depth buffers in EDRAM
|
2018-09-19 11:40:28 +03:00 |
|
Triang3l
|
377b2da2d5
|
[D3D12] DXBC: Use eq, not lt, to check for zero operands in mul
|
2018-09-18 21:44:39 +03:00 |
|
Triang3l
|
7b450e9cec
|
[D3D12] DXBC: SM3 zero handling in all multiplication instructions
|
2018-09-18 17:00:52 +03:00 |
|
Triang3l
|
836b4eef27
|
[D3D12] DXBC: Handle zeros in dot product and add missing instruction count increments
|
2018-09-18 15:27:34 +03:00 |
|
Triang3l
|
41d461d3a5
|
[D3D12] DXBC: Zero operand handling in vector mul and mad
|
2018-09-18 12:37:47 +03:00 |
|
Triang3l
|
a27740a41f
|
[D3D12] Set binding texture to null if the key is not valid
|
2018-09-17 08:08:45 +03:00 |
|
Triang3l
|
34fef0911c
|
[GPU] Fix dynamic GPR addressing check
|
2018-09-17 07:35:56 +03:00 |
|
Triang3l
|
79b745527c
|
[D3D12] Fix pipeline creation being stuck due to primitive topology type not being saved
|
2018-09-16 21:48:23 +03:00 |
|
Triang3l
|
be2d522e19
|
[D3D12] Rename shaders/bin to shaders/dxbc because of .gitignore
|
2018-09-16 20:35:10 +03:00 |
|
Triang3l
|
ae3d0bbb57
|
[D3D12] Clear both color and depth in resolves
|
2018-09-16 19:49:01 +03:00 |
|
Triang3l
|
f8506d6b62
|
[D3D12] Use ByteSwap64 in 64bpp raw resolve
|
2018-09-16 18:54:59 +03:00 |
|
Triang3l
|
5997ec6668
|
[D3D12] 64bpp resolve and clear - GTA IV ingame
|
2018-09-16 17:14:21 +03:00 |
|
Triang3l
|
5f0df6d1fa
|
[D3D12] Pipeline debug name, DXBC norm16 vertex fix
|
2018-09-16 15:57:22 +03:00 |
|
Triang3l
|
c9ffe98d21
|
[D3D12] 64bpp raw resolve and EDRAM refactoring
|
2018-09-16 15:11:11 +03:00 |
|
Triang3l
|
5be78ab369
|
[D3D12] Non-indexed triangle fans and resource creation refactoring
|
2018-09-15 23:41:16 +03:00 |
|
Triang3l
|
d1f185c744
|
[D3D12] Triangle fan conversion (untested, only indexed and without cache)
|
2018-09-15 15:11:03 +03:00 |
|
Triang3l
|
a6304cd9fe
|
[D3D12] Fix 7e3 and 20e4 conversion negative value handling
|
2018-09-13 20:03:05 +03:00 |
|
Triang3l
|
9a9665e4b8
|
[D3D12] Add DXBC to xenia-gpu-shader-compiler
|
2018-09-13 18:33:43 +03:00 |
|
Triang3l
|
bd6b3c3e30
|
[D3D12] Remove the HLSL shader translator
|
2018-09-13 18:17:40 +03:00 |
|
Triang3l
|
eed673eef4
|
[D3D12] DXBC: Fix VPOS SSAA inverse scale constant register
|
2018-09-13 18:01:42 +03:00 |
|
Triang3l
|
3194ad5938
|
[D3D12] DXBC: Format getGradients code
|
2018-09-13 18:00:56 +03:00 |
|
Triang3l
|
d82fb7d9e6
|
[D3D12] DXBC getGradients and maxa clamp notes
|
2018-09-13 14:43:07 +03:00 |