stvl/stvr tests; failing right now!

This commit is contained in:
Ben Vanik 2014-10-26 00:48:48 -07:00
parent d8a1c5ce79
commit 8098d55ebd
9 changed files with 69 additions and 0 deletions

View File

@ -327,6 +327,33 @@ class TestRunner {
printf(" Expected: %s == %s\n", reg_name.c_str(), reg_value.c_str()); printf(" Expected: %s == %s\n", reg_name.c_str(), reg_value.c_str());
printf(" Actual: %s == %s\n", reg_name.c_str(), actual_value); printf(" Actual: %s == %s\n", reg_name.c_str(), actual_value);
} }
} else if (it.first == "MEMORY_OUT") {
size_t space_pos = it.second.find(" ");
auto address_str = it.second.substr(0, space_pos);
auto bytes_str = it.second.substr(space_pos + 1);
uint32_t address = std::strtoul(address_str.c_str(), nullptr, 16);
auto base_address = memory->Translate(address);
auto p = base_address;
const char* c = bytes_str.c_str();
while (*c) {
while (*c == ' ') ++c;
if (!*c) {
break;
}
char ccs[3] = {c[0], c[1], 0};
c += 2;
uint32_t current_address =
address + static_cast<uint32_t>(p - base_address);
uint32_t expected = std::strtoul(ccs, nullptr, 16);
uint8_t actual = *p;
if (expected != actual) {
any_failed = true;
printf("Memory %s assert failed:\n", address_str.c_str());
printf(" Expected: %.8X %.2X\n", current_address, expected);
printf(" Actual: %.8X %.2X\n", current_address, actual);
}
++p;
}
} }
} }
return !any_failed; return !any_failed;

Binary file not shown.

View File

@ -0,0 +1,9 @@
/vagrant/src/alloy/frontend/ppc/test/bin//instr_stvl.o: file format elf64-powerpc
Disassembly of section .text:
0000000000100000 <test_stvl_1>:
100000: 7c 64 05 0e stvlx v3,r4,r0
100004: 4e 80 00 20 blr

View File

@ -0,0 +1 @@
0000000000000000 t test_stvl_1

Binary file not shown.

View File

@ -0,0 +1,9 @@
/vagrant/src/alloy/frontend/ppc/test/bin//instr_stvr.o: file format elf64-powerpc
Disassembly of section .text:
0000000000100000 <test_stvr_1>:
100000: 7c 64 2d 4e stvrx v3,r4,r5
100004: 4e 80 00 20 blr

View File

@ -0,0 +1 @@
0000000000000000 t test_stvr_1

View File

@ -0,0 +1,9 @@
test_stvl_1:
#_ MEMORY_IN 00001040 00000000 00000000 00000000 3F800000
#_ REGISTER_IN r4 0x1040
#_ REGISTER_IN v3 [BE74FCBD, BD912ABA, BF317BBB, BF2D135F]
stvlx v3, r4, r0
blr
#_ REGISTER_OUT r4 0x1040
#_ REGISTER_OUT v3 [BE74FCBD, BD912ABA, BF317BBB, BF2D135F]
#_ MEMORY_OUT 00001040 BE74FCBD BD912ABA BF317BBB BF2D135F

View File

@ -0,0 +1,13 @@
test_stvr_1:
#_ MEMORY_IN 00001040 BE74FCBD BD912ABA BF317BBB BF2D135F
#_ MEMORY_IN 00001050 00000000 00000000 00000000 00000000
#_ REGISTER_IN r4 0x1040
#_ REGISTER_IN r5 0x10
#_ REGISTER_IN v3 [BE74FCBD, BD912ABA, BF317BBB, BF2D135F]
stvrx v3, r4, r5
blr
#_ REGISTER_OUT r4 0x1040
#_ REGISTER_OUT r5 0x10
#_ REGISTER_OUT v3 [BE74FCBD, BD912ABA, BF317BBB, BF2D135F]
#_ MEMORY_OUT 00001040 BE74FCBD BD912ABA BF317BBB BF2D135F
#_ MEMORY_OUT 00001050 00000000 00000000 00000000 00000000