Fixing lvr.

This commit is contained in:
Ben Vanik 2014-10-25 19:28:06 -07:00
parent e767c2e90a
commit d8a1c5ce79
5 changed files with 21 additions and 3 deletions

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@ -241,9 +241,8 @@ int InstrEmit_lvrx_(PPCHIRBuilder& f, InstrData& i, uint32_t vd, uint32_t ra,
// ea &= ~0xF
ea = f.And(ea, f.LoadConstant(~0xFull));
// v = (new >> (16 - eb))
Value* v = f.Permute(f.LoadVectorShr(f.Sub(f.LoadConstant((int8_t)16), eb)),
f.ByteSwap(f.Load(ea, VEC128_TYPE)),
f.LoadZero(VEC128_TYPE), INT8_TYPE);
Value* v = f.Permute(f.LoadVectorShl(eb), f.LoadZero(VEC128_TYPE),
f.ByteSwap(f.Load(ea, VEC128_TYPE)), INT8_TYPE);
f.StoreVR(vd, v);
return 0;
}

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@ -0,0 +1,9 @@
/vagrant/src/alloy/frontend/ppc/test/bin//instr_lvr.o: file format elf64-powerpc
Disassembly of section .text:
0000000000100000 <test_lvr_1>:
100000: 7c 64 2c 4e lvrx v3,r4,r5
100004: 4e 80 00 20 blr

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@ -0,0 +1 @@
0000000000000000 t test_lvr_1

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@ -0,0 +1,9 @@
test_lvr_1:
#_ MEMORY_IN 000010B0 090A0A0B 0C0F120A 0B0C0D0E 0F10130C 0D0E1011 121314FF FFFFFFFF
#_ REGISTER_IN r4 0x10B7
#_ REGISTER_IN r5 0x10
lvrx v3, r4, r5
blr
#_ REGISTER_OUT r4 0x10B7
#_ REGISTER_OUT r5 0x10
#_ REGISTER_OUT v3 [00000000, 00000000, 000D0E10, 11121314]