From 8098d55ebd1ecb6e1fa0addccc6beece96e7d7ab Mon Sep 17 00:00:00 2001 From: Ben Vanik Date: Sun, 26 Oct 2014 00:48:48 -0700 Subject: [PATCH] stvl/stvr tests; failing right now! --- src/alloy/frontend/ppc/test/alloy-ppc-test.cc | 27 ++++++++++++++++++ .../frontend/ppc/test/bin/instr_stvl.bin | Bin 0 -> 8 bytes .../frontend/ppc/test/bin/instr_stvl.dis | 9 ++++++ .../frontend/ppc/test/bin/instr_stvl.map | 1 + .../frontend/ppc/test/bin/instr_stvr.bin | Bin 0 -> 8 bytes .../frontend/ppc/test/bin/instr_stvr.dis | 9 ++++++ .../frontend/ppc/test/bin/instr_stvr.map | 1 + src/alloy/frontend/ppc/test/instr_stvl.s | 9 ++++++ src/alloy/frontend/ppc/test/instr_stvr.s | 13 +++++++++ 9 files changed, 69 insertions(+) create mode 100644 src/alloy/frontend/ppc/test/bin/instr_stvl.bin create mode 100644 src/alloy/frontend/ppc/test/bin/instr_stvl.dis create mode 100644 src/alloy/frontend/ppc/test/bin/instr_stvl.map create mode 100644 src/alloy/frontend/ppc/test/bin/instr_stvr.bin create mode 100644 src/alloy/frontend/ppc/test/bin/instr_stvr.dis create mode 100644 src/alloy/frontend/ppc/test/bin/instr_stvr.map create mode 100644 src/alloy/frontend/ppc/test/instr_stvl.s create mode 100644 src/alloy/frontend/ppc/test/instr_stvr.s diff --git a/src/alloy/frontend/ppc/test/alloy-ppc-test.cc b/src/alloy/frontend/ppc/test/alloy-ppc-test.cc index 5734cbb73..9b5cb985a 100644 --- a/src/alloy/frontend/ppc/test/alloy-ppc-test.cc +++ b/src/alloy/frontend/ppc/test/alloy-ppc-test.cc @@ -327,6 +327,33 @@ class TestRunner { printf(" Expected: %s == %s\n", reg_name.c_str(), reg_value.c_str()); printf(" Actual: %s == %s\n", reg_name.c_str(), actual_value); } + } else if (it.first == "MEMORY_OUT") { + size_t space_pos = it.second.find(" "); + auto address_str = it.second.substr(0, space_pos); + auto bytes_str = it.second.substr(space_pos + 1); + uint32_t address = std::strtoul(address_str.c_str(), nullptr, 16); + auto base_address = memory->Translate(address); + auto p = base_address; + const char* c = bytes_str.c_str(); + while (*c) { + while (*c == ' ') ++c; + if (!*c) { + break; + } + char ccs[3] = {c[0], c[1], 0}; + c += 2; + uint32_t current_address = + address + static_cast(p - base_address); + uint32_t expected = std::strtoul(ccs, nullptr, 16); + uint8_t actual = *p; + if (expected != actual) { + any_failed = true; + printf("Memory %s assert failed:\n", address_str.c_str()); + printf(" Expected: %.8X %.2X\n", current_address, expected); + printf(" Actual: %.8X %.2X\n", current_address, actual); + } + ++p; + } } } return !any_failed; diff --git a/src/alloy/frontend/ppc/test/bin/instr_stvl.bin b/src/alloy/frontend/ppc/test/bin/instr_stvl.bin new file mode 100644 index 0000000000000000000000000000000000000000..b079eec533f3ad9fe7e1bd6058606d865ef63895 GIT binary patch literal 8 Pcmb: + 100000: 7c 64 05 0e stvlx v3,r4,r0 + 100004: 4e 80 00 20 blr diff --git a/src/alloy/frontend/ppc/test/bin/instr_stvl.map b/src/alloy/frontend/ppc/test/bin/instr_stvl.map new file mode 100644 index 000000000..3afd818c7 --- /dev/null +++ b/src/alloy/frontend/ppc/test/bin/instr_stvl.map @@ -0,0 +1 @@ +0000000000000000 t test_stvl_1 diff --git a/src/alloy/frontend/ppc/test/bin/instr_stvr.bin b/src/alloy/frontend/ppc/test/bin/instr_stvr.bin new file mode 100644 index 0000000000000000000000000000000000000000..b7195fac17e4eca5ef96fd2bb45ce4ce2780bbeb GIT binary patch literal 8 Pcmb: + 100000: 7c 64 2d 4e stvrx v3,r4,r5 + 100004: 4e 80 00 20 blr diff --git a/src/alloy/frontend/ppc/test/bin/instr_stvr.map b/src/alloy/frontend/ppc/test/bin/instr_stvr.map new file mode 100644 index 000000000..b0296d550 --- /dev/null +++ b/src/alloy/frontend/ppc/test/bin/instr_stvr.map @@ -0,0 +1 @@ +0000000000000000 t test_stvr_1 diff --git a/src/alloy/frontend/ppc/test/instr_stvl.s b/src/alloy/frontend/ppc/test/instr_stvl.s new file mode 100644 index 000000000..ed95423e9 --- /dev/null +++ b/src/alloy/frontend/ppc/test/instr_stvl.s @@ -0,0 +1,9 @@ +test_stvl_1: + #_ MEMORY_IN 00001040 00000000 00000000 00000000 3F800000 + #_ REGISTER_IN r4 0x1040 + #_ REGISTER_IN v3 [BE74FCBD, BD912ABA, BF317BBB, BF2D135F] + stvlx v3, r4, r0 + blr + #_ REGISTER_OUT r4 0x1040 + #_ REGISTER_OUT v3 [BE74FCBD, BD912ABA, BF317BBB, BF2D135F] + #_ MEMORY_OUT 00001040 BE74FCBD BD912ABA BF317BBB BF2D135F diff --git a/src/alloy/frontend/ppc/test/instr_stvr.s b/src/alloy/frontend/ppc/test/instr_stvr.s new file mode 100644 index 000000000..2e8e8cb9d --- /dev/null +++ b/src/alloy/frontend/ppc/test/instr_stvr.s @@ -0,0 +1,13 @@ +test_stvr_1: + #_ MEMORY_IN 00001040 BE74FCBD BD912ABA BF317BBB BF2D135F + #_ MEMORY_IN 00001050 00000000 00000000 00000000 00000000 + #_ REGISTER_IN r4 0x1040 + #_ REGISTER_IN r5 0x10 + #_ REGISTER_IN v3 [BE74FCBD, BD912ABA, BF317BBB, BF2D135F] + stvrx v3, r4, r5 + blr + #_ REGISTER_OUT r4 0x1040 + #_ REGISTER_OUT r5 0x10 + #_ REGISTER_OUT v3 [BE74FCBD, BD912ABA, BF317BBB, BF2D135F] + #_ MEMORY_OUT 00001040 BE74FCBD BD912ABA BF317BBB BF2D135F + #_ MEMORY_OUT 00001050 00000000 00000000 00000000 00000000