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[a64] Refactor `REV{16,32}` to `REV` 

Derive the reversal-size from the register-size.
REV32 is also the wrong one to be using here since it will reverse the bytes of upper and lower 32-bit words.
This commit is contained in:
Wunkolo 2024-05-06 20:27:54 -07:00
parent 52b259369e
commit 0f9769baac
1 changed files with 2 additions and 2 deletions
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4
src/xenia/cpu/backend/a64/a64_sequences.cc
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@ -2645,7 +2645,7 @@ struct BYTE_SWAP_I32
: Sequence<BYTE_SWAP_I32, I<OPCODE_BYTE_SWAP, I32Op, I32Op>> { : Sequence<BYTE_SWAP_I32, I<OPCODE_BYTE_SWAP, I32Op, I32Op>> {
static void Emit(A64Emitter& e, const EmitArgType& i) { static void Emit(A64Emitter& e, const EmitArgType& i) {
EmitUnaryOp(e, i, [](A64Emitter& e, WReg dest_src) { EmitUnaryOp(e, i, [](A64Emitter& e, WReg dest_src) {
e.REV32(dest_src.toX(), dest_src.toX()); e.REV(dest_src, dest_src);
}); });
} }
}; };
@ -2653,7 +2653,7 @@ struct BYTE_SWAP_I64
: Sequence<BYTE_SWAP_I64, I<OPCODE_BYTE_SWAP, I64Op, I64Op>> { : Sequence<BYTE_SWAP_I64, I<OPCODE_BYTE_SWAP, I64Op, I64Op>> {
static void Emit(A64Emitter& e, const EmitArgType& i) { static void Emit(A64Emitter& e, const EmitArgType& i) {
EmitUnaryOp(e, i, [](A64Emitter& e, XReg dest_src) { EmitUnaryOp(e, i, [](A64Emitter& e, XReg dest_src) {
e.REV64(dest_src, dest_src); e.REV(dest_src, dest_src);
}); });
} }
}; };