From 0f9769baac70dfbd107fcbca9d08db3ec69e928f Mon Sep 17 00:00:00 2001
From: Wunkolo <Wunkolo@gmail.com>
Date: Mon, 6 May 2024 20:27:54 -0700
Subject: [PATCH] [a64] Refactor `REV{16,32}` to `REV`

Derive the reversal-size from the register-size.
REV32 is also the wrong one to be using here since it will reverse the bytes of upper and lower 32-bit words.
---
 src/xenia/cpu/backend/a64/a64_sequences.cc | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/xenia/cpu/backend/a64/a64_sequences.cc b/src/xenia/cpu/backend/a64/a64_sequences.cc
index ff13a0c7f..8dbab3797 100644
--- a/src/xenia/cpu/backend/a64/a64_sequences.cc
+++ b/src/xenia/cpu/backend/a64/a64_sequences.cc
@@ -2645,7 +2645,7 @@ struct BYTE_SWAP_I32
     : Sequence<BYTE_SWAP_I32, I<OPCODE_BYTE_SWAP, I32Op, I32Op>> {
   static void Emit(A64Emitter& e, const EmitArgType& i) {
     EmitUnaryOp(e, i, [](A64Emitter& e, WReg dest_src) {
-      e.REV32(dest_src.toX(), dest_src.toX());
+      e.REV(dest_src, dest_src);
     });
   }
 };
@@ -2653,7 +2653,7 @@ struct BYTE_SWAP_I64
     : Sequence<BYTE_SWAP_I64, I<OPCODE_BYTE_SWAP, I64Op, I64Op>> {
   static void Emit(A64Emitter& e, const EmitArgType& i) {
     EmitUnaryOp(e, i, [](A64Emitter& e, XReg dest_src) {
-      e.REV64(dest_src, dest_src);
+      e.REV(dest_src, dest_src);
     });
   }
 };