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[a64] Fix `ComputeMemoryAddress{Offset}` register stomp 

`W1` is a possible HIR register allocation and using W1 here was stomping over it. Don't use W1, use the provided "scratch" register.
This commit is contained in:
Wunkolo 2024-05-06 20:10:14 -07:00
parent 647d26c20a
commit 52b259369e
1 changed files with 4 additions and 4 deletions
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8
src/xenia/cpu/backend/a64/a64_seq_memory.cc
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@ -49,8 +49,8 @@ XReg ComputeMemoryAddressOffset(A64Emitter& e, const T& guest, const T& offset,
if (xe::memory::allocation_granularity() > 0x1000) {
// Emulate the 4 KB physical address offset in 0xE0000000+ when can't do
// it via memory mapping.
e.MOV(W1, 0xE0000000 - offset_const);
e.CMP(guest.reg().toW(), W1);
e.MOV(address_register.toW(), 0xE0000000 - offset_const);
e.CMP(guest.reg().toW(), address_register.toW());
e.CSET(W0, Cond::HS);
e.LSL(W0, W0, 12);
e.ADD(W0, W0, guest.reg().toW());
@ -93,8 +93,8 @@ XReg ComputeMemoryAddress(A64Emitter& e, const T& guest,
if (xe::memory::allocation_granularity() > 0x1000) {
// Emulate the 4 KB physical address offset in 0xE0000000+ when can't do
// it via memory mapping.
e.MOV(W1, 0xE0000000);
e.CMP(guest.reg().toW(), W1);
e.MOV(address_register.toW(), 0xE0000000);
e.CMP(guest.reg().toW(), address_register.toW());
e.CSET(X0, Cond::HS);
e.LSL(X0, X0, 12);
e.ADD(X0, X0, guest);