Triang3l
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74c9c2c724
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Merge branch 'd3d12' of github.com:xenia-project/xenia into d3d12
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2018-10-12 20:08:50 +03:00 |
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Triang3l
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10a3dc6d94
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[D3D12] ROV: 32-bit loading, except for 7e3
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2018-10-12 20:07:00 +03:00 |
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Triang3l
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013087108b
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[D3D12] ROV: Used render targets flags
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2018-10-12 12:32:48 +03:00 |
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Triang3l
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3dc15dbb44
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[D3D12] ROV: 32bpp storing (except for 7e3)
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2018-10-12 09:59:31 +03:00 |
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Triang3l
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615fade64e
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[D3D12] ROV: Fix EDRAM pitch shader constant size
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2018-10-11 19:59:35 +03:00 |
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Triang3l
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197b1d8114
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[D3D12] ROV: EDRAM offset calculation
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2018-10-11 10:16:36 +03:00 |
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Triang3l
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8cde541596
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[D3D12] ROV: Binding
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2018-10-10 18:33:39 +03:00 |
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Triang3l
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67e5cb8681
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[D3D12] ROV: Disable RTs when using ROV
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2018-10-10 16:37:35 +03:00 |
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Triang3l
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6d2e74325c
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[D3D12] ROV: Check if supported
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2018-10-10 14:30:29 +03:00 |
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Triang3l
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90f700c785
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[D3D12] Analysis: Display fetch constant contents if type is wrong
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2018-10-10 12:44:02 +03:00 |
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Triang3l
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7bc79cbd01
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[D3D12] Signed texture SRVs
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2018-10-09 21:44:18 +03:00 |
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Triang3l
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7603de218b
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[D3D12] DXBC part of signed textures
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2018-10-09 08:31:09 +03:00 |
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Triang3l
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6a6e63060b
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[D3D12] Submit barriers before uploading gamma ramp
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2018-10-08 19:42:02 +03:00 |
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Triang3l
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fccebae703
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[D3D12] PIX: Capture with F4, disable tiled resources when attached
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2018-10-08 12:05:15 +03:00 |
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Triang3l
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16dc6e4100
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[D3D12] DXBC: In getWeights, apply the offset for unnormalized coordinates only when needed
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2018-10-07 21:51:18 +03:00 |
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Triang3l
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685d3074f4
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[D3D12] Hash sampler bindings and refactor names in UpdateBindings
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2018-10-07 20:21:18 +03:00 |
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Triang3l
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3de2b5e692
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[D3D12] Code style fixes
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2018-10-07 17:30:12 +03:00 |
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Triang3l
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400e6b7137
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[D3D12] Don't replace strip reset index when not used, profile ConvertPrimitives
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2018-10-07 15:26:47 +03:00 |
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Triang3l
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9194c3f8b0
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[D3D12] Primitive converter cache and strip restart, texture invalidation acquire/release
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2018-10-06 20:27:48 +03:00 |
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Triang3l
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128ac2a3f9
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[D3D12] Align mipmap storage size to power of 2 when untiling
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2018-10-05 20:48:11 +03:00 |
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Triang3l
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34946c57b0
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[D3D12] Rename XeTextureCopy to XeTextureLoad in shaders
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2018-10-05 20:02:36 +03:00 |
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Triang3l
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9dc7dfab02
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[D3D12] Fix currently bound textures not reloaded if not needed immediately
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2018-10-05 09:20:51 +03:00 |
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Triang3l
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d827bbeb6c
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[D3D12] Fix texture binding hashing
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2018-10-04 23:57:08 +03:00 |
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Triang3l
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131525e44d
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[D3D12] Don't create SRVs if textures not changed
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2018-10-04 14:36:48 +03:00 |
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Triang3l
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b77ffe3df6
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[D3D12] Output gamma ramp
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2018-10-03 14:36:17 +03:00 |
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Triang3l
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c624bf8c49
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[D3D12] DXBC: Use a0 for maxas scratch because ps must not be modified without a write mask
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2018-10-02 21:24:50 +03:00 |
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Triang3l
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90f586383a
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[D3D12] Make tiled resources optional - not available on old Intel HD Graphics
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2018-10-02 17:36:10 +03:00 |
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Triang3l
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9e17bbf016
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[D3D12] Refactor system and bool/loop constants into separate descriptor ranges
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2018-10-02 16:34:22 +03:00 |
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Triang3l
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2588aab89d
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[GPU/D3D12] Float constant remapping fixes
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2018-10-01 20:15:00 +03:00 |
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Triang3l
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c4599ff211
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[D3D12] Compact float constants and don't split them into pages
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2018-09-30 20:17:26 +03:00 |
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Triang3l
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eb50ebd885
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[D3D12] Write to 8_8_8_8_GAMMA in gamma space
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2018-09-29 13:30:05 +03:00 |
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Triang3l
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64209748e3
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[D3D12] Better polygon offset scale
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2018-09-29 12:01:09 +03:00 |
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Triang3l
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400747bf7c
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[D3D12] Point sprite size
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2018-09-29 11:25:03 +03:00 |
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Triang3l
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d9538e6cc2
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[D3D12] Log unsupported texture formats and don't log texture invalidation
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2018-09-27 10:27:55 +03:00 |
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Triang3l
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ea7d9e9060
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[D3D12] Emulate reversed Z in shaders because it's unsupported on Nvidia
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2018-09-26 20:46:24 +03:00 |
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Triang3l
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55f96c0f83
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[D3D12] DXBC: Apply exp bias after alpha test
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2018-09-26 16:20:04 +03:00 |
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Triang3l
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70103804c3
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[D3D12] 8/16bpp resolves, fixed16 RT exp bias, RT format documentation
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2018-09-26 16:10:23 +03:00 |
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Triang3l
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6e36101b42
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[D3D12] Experimental write watch implementation for shared memory
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2018-09-24 23:18:16 +03:00 |
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Triang3l
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005e590c92
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[D3D12] SHM upload range cleanup and mask index buffer address
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2018-09-23 18:37:41 +03:00 |
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Triang3l
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ecfa70284e
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[D3D12] Treat gamma/as_16 EDRAM formats the same as their base formats
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2018-09-22 19:22:57 +03:00 |
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Triang3l
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133604f249
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[D3D12] Decompress textures if their size is not 4x4-aligned
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2018-09-22 19:03:25 +03:00 |
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Triang3l
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bb24521c2b
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[D3D12] DXT5 decompression shader (not used yet)
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2018-09-22 15:52:07 +03:00 |
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Triang3l
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4d1b3caf8c
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[D3D12] DXBC: Fix max4 instruction length
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2018-09-22 13:36:04 +03:00 |
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Triang3l
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6e3cf5dd22
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[D3D12] Cleanup selection in shaders and add some DXT5 alpha code
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2018-09-21 21:22:33 +03:00 |
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Triang3l
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17e3f09c1e
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[D3D12] DXT1 decompression shader
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2018-09-21 08:55:55 +03:00 |
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Triang3l
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1f248572ac
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[D3D12] Better explanation of dxbc_switch
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2018-09-19 23:26:45 +03:00 |
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Triang3l
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9daea21edc
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[D3D12] Don't use _COLOR blend modes for alpha
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2018-09-19 22:54:35 +03:00 |
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Triang3l
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cbd36218bf
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[D3D12] DXBC: Use switch instead of if for flow control (experimentally)
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2018-09-19 21:25:58 +03:00 |
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Triang3l
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4db3a927ad
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[D3D12] Remove ID3DBlob from D3D12Shader
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2018-09-19 17:08:48 +03:00 |
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Triang3l
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ed66694319
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[D3D12] Slightly better logging
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2018-09-19 16:50:13 +03:00 |