[GPU/D3D12] Float constant remapping fixes

src/xenia/gpu/d3d12/d3d12_command_processor.cc

@@ -1858,7 +1858,7 @@ bool D3D12CommandProcessor::UpdateBindings(
     view_count_partial_update += texture_count;
   }
   // All the constants + shared memory + textures.
-  uint32_t view_count_full_update = 20 + texture_count;
+  uint32_t view_count_full_update = 6 + texture_count;
   D3D12_CPU_DESCRIPTOR_HANDLE view_cpu_handle;
   D3D12_GPU_DESCRIPTOR_HANDLE view_gpu_handle;
   uint32_t descriptor_size_view = provider->GetViewDescriptorSize();

src/xenia/gpu/dxbc_shader_translator.cc

@@ -1834,6 +1834,10 @@ void DxbcShaderTranslator::UseDxbcSourceOperand(
   absolute |= operand.is_absolute_value;
   // Build OperandToken1 for modifiers (negate, absolute, minimum precision,
   // non-uniform binding index) - if it has any, it will be non-zero.
+  // NOTE: AMD GPUs or drivers do NOT support non-uniform constant buffer
+  // indices as of October 1, 2018 - they were causing significant skinned mesh
+  // corruption when Xenia used multiple descriptors for float constants rather
+  // than remapping.
   uint32_t modifiers = 0;
   if (negate && absolute) {
     modifiers |= D3D10_SB_OPERAND_MODIFIER_ABSNEG
@@ -7824,8 +7828,7 @@ void DxbcShaderTranslator::WriteResourceDefinitions() {
     // One binding.
     shader_object_.push_back(1);
     // D3D_SIF_USERPACKED if a `cbuffer` rather than a `ConstantBuffer<T>`, but
-    // we don't use indexable constant buffer descriptors since they seem to be
-    // causing significant visual issues on AMD.
+    // we don't use indexable constant buffer descriptors.
     shader_object_.push_back(0);
     // Register space 0.
     shader_object_.push_back(0);

src/xenia/gpu/shader_translator.cc

@@ -1446,7 +1446,15 @@ void ShaderTranslator::ParseAluScalarInstruction(
         op, InstructionStorageSource::kConstantFloat, op.src_reg(3),
         op.src_negate(3), 0, swiz_a, &i.operands[0]);
 
-    // Track constant float register loads.
+    ParseAluInstructionOperandSpecial(op, InstructionStorageSource::kRegister,
+                                      reg2, op.src_negate(3), const_slot,
+                                      swiz_b, &i.operands[1]);
+  }
+
+  // Track constant float register loads - in either case, a float constant may
+  // be used in operand 0.
+  if (i.operands[0].storage_source ==
+      InstructionStorageSource::kConstantFloat) {
     auto register_index = i.operands[0].storage_index;
     if (i.operands[0].storage_addressing_mode !=
         InstructionStorageAddressingMode::kStatic) {
@@ -1457,10 +1465,6 @@ void ShaderTranslator::ParseAluScalarInstruction(
       constant_register_map_.float_bitmap[register_index / 64] |=
           1ull << (register_index % 64);
     }
-
-    ParseAluInstructionOperandSpecial(op, InstructionStorageSource::kRegister,
-                                      reg2, op.src_negate(3), const_slot,
-                                      swiz_b, &i.operands[1]);
   }
 
   i.Disassemble(&ucode_disasm_buffer_);