rldicl/rldicr tests.
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/cygdrive/d/dev/xenia/src/alloy/frontend/ppc/test/bin//instr_rldicl.o: file format elf64-powerpc
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Disassembly of section .text:
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0000000000100000 <test_rldicl_1>:
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100000: 78 83 c0 00 rotldi r3,r4,24
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100004: 4e 80 00 20 blr
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0000000000100008 <test_rldicl_2>:
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100008: 78 83 c2 00 rldicl r3,r4,24,8
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10000c: 4e 80 00 20 blr
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0000000000100010 <test_rldicl_3>:
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100010: 78 83 c7 e0 rldicl r3,r4,24,63
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100014: 4e 80 00 20 blr
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0000000000100018 <test_rldicl_4>:
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100018: 78 83 00 00 rotldi r3,r4,0
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10001c: 4e 80 00 20 blr
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0000000000100020 <test_rldicl_5>:
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100020: 78 83 07 e0 clrldi r3,r4,63
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100024: 4e 80 00 20 blr
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0000000000100028 <test_rldicl_6>:
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100028: 78 83 02 00 clrldi r3,r4,8
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10002c: 4e 80 00 20 blr
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0000000000100030 <test_rldicl_7>:
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100030: 78 83 f8 02 rotldi r3,r4,63
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100034: 4e 80 00 20 blr
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0000000000100038 <test_rldicl_8>:
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100038: 78 83 ff e2 rldicl r3,r4,63,63
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10003c: 4e 80 00 20 blr
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0000000000100040 <test_rldicl_9>:
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100040: 78 83 f8 00 rotldi r3,r4,31
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100044: 4e 80 00 20 blr
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0000000000000000 t test_rldicl_1
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0000000000000008 t test_rldicl_2
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0000000000000010 t test_rldicl_3
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0000000000000018 t test_rldicl_4
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0000000000000020 t test_rldicl_5
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0000000000000028 t test_rldicl_6
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0000000000000030 t test_rldicl_7
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0000000000000038 t test_rldicl_8
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0000000000000040 t test_rldicl_9
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/cygdrive/d/dev/xenia/src/alloy/frontend/ppc/test/bin//instr_rldicr.o: file format elf64-powerpc
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Disassembly of section .text:
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0000000000100000 <test_rldicr_1>:
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100000: 78 83 c0 04 rldicr r3,r4,24,0
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100004: 4e 80 00 20 blr
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0000000000100008 <test_rldicr_2>:
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100008: 78 83 c2 04 rldicr r3,r4,24,8
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10000c: 4e 80 00 20 blr
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0000000000100010 <test_rldicr_3>:
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100010: 78 83 c7 e4 rldicr r3,r4,24,63
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100014: 4e 80 00 20 blr
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0000000000100018 <test_rldicr_4>:
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100018: 78 83 00 04 rldicr r3,r4,0,0
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10001c: 4e 80 00 20 blr
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0000000000100020 <test_rldicr_5>:
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100020: 78 83 07 e4 rldicr r3,r4,0,63
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100024: 4e 80 00 20 blr
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0000000000100028 <test_rldicr_6>:
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100028: 78 83 02 04 rldicr r3,r4,0,8
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10002c: 4e 80 00 20 blr
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0000000000100030 <test_rldicr_7>:
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100030: 78 83 f8 06 rldicr r3,r4,63,0
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100034: 4e 80 00 20 blr
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0000000000100038 <test_rldicr_8>:
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100038: 78 83 ff e6 rldicr r3,r4,63,63
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10003c: 4e 80 00 20 blr
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0000000000100040 <test_rldicr_9>:
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100040: 78 83 f8 04 rldicr r3,r4,31,0
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100044: 4e 80 00 20 blr
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@ -0,0 +1,9 @@
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0000000000000000 t test_rldicr_1
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0000000000000008 t test_rldicr_2
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0000000000000010 t test_rldicr_3
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0000000000000018 t test_rldicr_4
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0000000000000020 t test_rldicr_5
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0000000000000028 t test_rldicr_6
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0000000000000030 t test_rldicr_7
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0000000000000038 t test_rldicr_8
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0000000000000040 t test_rldicr_9
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test_rldicl_1:
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#_ REGISTER_IN r4 0x0123456789ABCDEF
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rldicl r3, r4, 24, 0
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blr
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#_ REGISTER_OUT r3 0x6789abcdef012345
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#_ REGISTER_OUT r4 0x0123456789ABCDEF
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test_rldicl_2:
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#_ REGISTER_IN r4 0x0123456789ABCDEF
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rldicl r3, r4, 24, 8
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blr
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#_ REGISTER_OUT r3 0x0089abcdef012345
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#_ REGISTER_OUT r4 0x0123456789ABCDEF
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test_rldicl_3:
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#_ REGISTER_IN r4 0x0123456789ABCDEF
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rldicl r3, r4, 24, 63
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blr
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#_ REGISTER_OUT r3 0x0000000000000001
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#_ REGISTER_OUT r4 0x0123456789ABCDEF
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test_rldicl_4:
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#_ REGISTER_IN r4 0x0123456789ABCDEF
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rldicl r3, r4, 0, 0
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blr
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#_ REGISTER_OUT r3 0x0123456789abcdef
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#_ REGISTER_OUT r4 0x0123456789ABCDEF
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test_rldicl_5:
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#_ REGISTER_IN r4 0x0123456789ABCDEF
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rldicl r3, r4, 0, 63
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blr
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#_ REGISTER_OUT r3 0x0000000000000001
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#_ REGISTER_OUT r4 0x0123456789ABCDEF
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test_rldicl_6:
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#_ REGISTER_IN r4 0x0123456789ABCDEF
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rldicl r3, r4, 0, 8
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blr
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#_ REGISTER_OUT r3 0x0023456789abcdef
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#_ REGISTER_OUT r4 0x0123456789ABCDEF
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test_rldicl_7:
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#_ REGISTER_IN r4 0x0123456789ABCDEF
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rldicl r3, r4, 63, 0
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blr
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#_ REGISTER_OUT r3 0x8091a2b3c4d5e6f7
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#_ REGISTER_OUT r4 0x0123456789ABCDEF
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test_rldicl_8:
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#_ REGISTER_IN r4 0x0123456789ABCDEF
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rldicl r3, r4, 63, 63
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blr
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#_ REGISTER_OUT r3 0x0000000000000001
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#_ REGISTER_OUT r4 0x0123456789ABCDEF
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test_rldicl_9:
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#_ REGISTER_IN r4 0x0123456789ABCDEF
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rldicl r3, r4, 31, 0
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blr
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#_ REGISTER_OUT r3 0xc4d5e6f78091a2b3
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#_ REGISTER_OUT r4 0x0123456789ABCDEF
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test_rldicr_1:
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#_ REGISTER_IN r4 0x0123456789ABCDEF
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rldicr r3, r4, 24, 0
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blr
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#_ REGISTER_OUT r3 0x0000000000000000
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#_ REGISTER_OUT r4 0x0123456789ABCDEF
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test_rldicr_2:
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#_ REGISTER_IN r4 0x0123456789ABCDEF
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rldicr r3, r4, 24, 8
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blr
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#_ REGISTER_OUT r3 0x6780000000000000
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#_ REGISTER_OUT r4 0x0123456789ABCDEF
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test_rldicr_3:
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#_ REGISTER_IN r4 0x0123456789ABCDEF
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rldicr r3, r4, 24, 63
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blr
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#_ REGISTER_OUT r3 0x6789abcdef012345
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#_ REGISTER_OUT r4 0x0123456789ABCDEF
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test_rldicr_4:
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#_ REGISTER_IN r4 0x0123456789ABCDEF
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rldicr r3, r4, 0, 0
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blr
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#_ REGISTER_OUT r3 0x0000000000000000
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#_ REGISTER_OUT r4 0x0123456789ABCDEF
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test_rldicr_5:
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#_ REGISTER_IN r4 0x0123456789ABCDEF
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rldicr r3, r4, 0, 63
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blr
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#_ REGISTER_OUT r3 0x0123456789abcdef
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#_ REGISTER_OUT r4 0x0123456789ABCDEF
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test_rldicr_6:
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#_ REGISTER_IN r4 0x0123456789ABCDEF
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rldicr r3, r4, 0, 8
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blr
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#_ REGISTER_OUT r3 0x0100000000000000
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#_ REGISTER_OUT r4 0x0123456789ABCDEF
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test_rldicr_7:
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#_ REGISTER_IN r4 0x0123456789ABCDEF
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rldicr r3, r4, 63, 0
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blr
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#_ REGISTER_OUT r3 0x8000000000000000
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#_ REGISTER_OUT r4 0x0123456789ABCDEF
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test_rldicr_8:
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#_ REGISTER_IN r4 0x0123456789ABCDEF
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rldicr r3, r4, 63, 63
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blr
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#_ REGISTER_OUT r3 0x8091a2b3c4d5e6f7
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#_ REGISTER_OUT r4 0x0123456789ABCDEF
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test_rldicr_9:
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#_ REGISTER_IN r4 0x0123456789ABCDEF
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rldicr r3, r4, 31, 0
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blr
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#_ REGISTER_OUT r3 0x8000000000000000
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#_ REGISTER_OUT r4 0x0123456789ABCDEF
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