but can be disabled by removing the 'THUMB_SUPPORT' directive from the
Visual Studio project file).
git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@2217 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
Wrapped THUMB ARM emulation in a define, so that it can be excluded
from builds. To enable it, the 'THUMB_SUPPORT' directive must be
included in the build process. This has been added to the OSX
project files, but is still TODO for Linux and Windows.
Removed some obsolete include paths from the OSX project files,
dating back about 5 years or so.
git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@2215 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
Also fixed warnings when compiling on 64-bit compilers.
git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@2214 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
launcher is selected, not the actual ROM directory. This speeds up
access, because generally you'll want to audit the directory you're
actually looking at.
git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@2196 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
Hopefully this marks a return to Stella development, as I haven't had
much free time over the past month or so.
git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@2194 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
Added infrastructure to System and Device classes to deal with CodeAccessBase
even when the bankswitching scheme bypasses the normal System::PageAccess
way of reading ROM space. This allows bankswitching schemes 2E, AR, FE and
4A50 to support emulation core 'hints' for more accurate disassembly. The
only scheme not supported now is MC, which isn't really working anyway (I've
never actually had a test ROM for this scheme).
It's getting close, folks ...
git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@2184 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
multiple concatentation of strings. This should be faster, or at least
lead to less string constructor calls.
Output of 'ROW' directives in the disassembly now shows only 8 items per
line, instead of 16. This allows to see all the bytes without having a
'...' in between. A future release may customize this to the size of the
output area.
Fixed output from debugger 'disasm' command to properly align different
directive types and show GFX and PGFX output.
Bumped state file version to 3.3 final, since there are no further
changes to the code that will break the file format.
git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@2183 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
Removed reference to disassembly 'SKIP' command, since it isn't implemented
yet.
Decided on Nov. 15 for the 3.3 release date, and updated all relevant files.
git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@2181 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
disassembly. This allows the debugger 'jump' command to be more accurate.
git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@2180 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
for these opcodes.
The 'data source' in the debugger CPU area now also shows the SP register,
since it's used for TSX and TXS.
Bumped version # for another test release.
git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@2177 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
Still TODO is add support for PHA, PHP, PLA and PLP, and to somehow track
accesses that are stored in zero-page RAM first. These latter items may
end up being pushed after the 3.3 release.
git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@2175 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
(ie, each bit now takes priority over ones with lower value). This
doesn't change the processing in any way, but simply makes the bitstring
more accurately reflect what's going on.
git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@2174 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
tired of doing it manually every time it changes.
Tweaked the handling of JSR, RTI and RTS commands, so they don't erroneously
mark associated addresses as CODE when in fact they're never actually
executed.
Several parts of the Distella code were marking areas as DATA, even though
it depending on knowing the values for the X and Y registers (which it
doesn't, as it's a static analysis). As such, these areas are now marked
as ROW instead, since that's as precise as a static analysis can do. The
processing blocks are left there, though, in case Distella is improved in
a future release.
All the above changes allow for better disassembly with less
'false positives' (ie, areas marked as CODE or DATA when they really aren't).
git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@2172 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
emulation core, and distella). This allows to better see exactly how an
address is marked in the disassembly.
Updated Changelog with changes I forgot that I made (you know it's time
for a new release when you forget what's been added since the last one).
git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@2170 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
the given screen. This is allowed in windowed mode, since the window
manager normally takes care of it. In the case of fullscreen mode, however,
it is never allowed, and an error message is shown.
git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@2169 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
to use curly braces {} instead of apostrophes. This matches the
functionality from older releases.
Fixed debugger prompt messages to show correct info when opening
various files (config files, autoexec, etc).
The debugger 'type' command now accepts a range of values.
Reverted handling of ROMs that aren't in the internal database;
they're inserted with their extension again, just as in older
releases.
git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@2168 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
stephena