zilmar
|
e3aa2514c1
|
Core: Fix bug in CX86RecompilerOps::SPECIAL_DIV
|
2022-11-23 20:16:38 +10:30 |
|
zilmar
|
8e94b3086b
|
Core: Change recompiler to use asmjit
|
2022-11-23 14:46:55 +10:30 |
|
zilmar
|
2a6d3cd519
|
Core: remove #ifdef toremove block in CX86RecompilerOps::SPECIAL_DMULTU()
|
2022-11-21 08:55:51 +10:30 |
|
zilmar
|
9743f12b1d
|
Core: Remvoe #ifdef LinkBlocks code block
|
2022-11-21 08:52:19 +10:30 |
|
zilmar
|
989827cb77
|
Core: Do not set m_MemoryReadMap/m_MemoryWriteMap if tlb mapping is outside rdram
|
2022-11-14 21:20:28 +10:30 |
|
zilmar
|
97e3f50007
|
Core: Update mask of registers in CRegisters::Cop0_MT
|
2022-11-14 20:56:21 +10:30 |
|
zilmar
|
cabcd2cc95
|
Core: Handle masking of random in CSystemTimer::UpdateTimers
|
2022-11-14 11:19:02 +10:30 |
|
zilmar
|
48da86bea1
|
Core: if Rom is larger than ISViewerHandler, then use rom handler
|
2022-11-08 10:54:01 +10:30 |
|
zilmar
|
529812fdca
|
Core: Switch to use asmjit registers in recompiler
|
2022-11-07 21:03:32 +10:30 |
|
zilmar
|
a4c49a3567
|
Core: rearrange XorVariableToX86reg parameters
|
2022-11-07 16:30:09 +10:30 |
|
zilmar
|
2fcce6cdd5
|
Cote: TestVariable rearrange parameters
|
2022-11-07 16:25:54 +10:30 |
|
zilmar
|
fe1f99ae1c
|
Core: rearrange TestConstToX86Reg parameters
|
2022-11-07 16:22:51 +10:30 |
|
zilmar
|
ce939100c5
|
Core: rearrange OrVariableToX86Reg parameters
|
2022-11-07 16:18:54 +10:30 |
|
zilmar
|
697397f1dd
|
Core: Rearrange OrConstToX86Reg parameters
|
2022-11-07 16:03:45 +10:30 |
|
zilmar
|
40259d01ca
|
Core: rearrange OrConstToVariable parameters
|
2022-11-07 15:55:19 +10:30 |
|
zilmar
|
c95aae8e38
|
Core: rearrange MoveZxVariableToX86regHalf parameters
|
2022-11-07 15:48:39 +10:30 |
|
zilmar
|
96eed54a1d
|
Core: rearrange MoveZxVariableToX86regByte parameters
|
2022-11-07 15:44:10 +10:30 |
|
zilmar
|
4570d9eab5
|
Core: rearrange MoveZxHalfX86regPointerToX86reg variables
|
2022-11-07 15:40:01 +10:30 |
|
zilmar
|
8a2197707b
|
Core: rearrange MoveZxByteX86regPointerToX86reg parameters
|
2022-11-07 15:38:36 +10:30 |
|
zilmar
|
59892a266b
|
Core: rearrange MoveX86regToVariable parameters
|
2022-11-07 15:30:25 +10:30 |
|
zilmar
|
91a192cead
|
Core: rearrange MoveX86regToMemory parameters
|
2022-11-07 14:40:28 +10:30 |
|
zilmar
|
891d487fdd
|
Core: rearrange MoveX86regPointerToX86regDisp8 parameters
|
2022-11-07 14:38:34 +10:30 |
|
zilmar
|
d74694d16f
|
Core: rearrange MoveX86regPointerToX86reg parameters
|
2022-11-07 14:36:11 +10:30 |
|
zilmar
|
ebca0854d7
|
Core: rearrange MoveX86regHalfToX86regPointer parameters
|
2022-11-07 14:29:33 +10:30 |
|
zilmar
|
efac334136
|
Rearrange MoveX86regHalfToVariable parameters
|
2022-11-07 14:26:06 +10:30 |
|
zilmar
|
1966b842f3
|
Core: rearrange MoveX86regByteToX86regPointer parameters
|
2022-11-07 14:24:22 +10:30 |
|
zilmar
|
bb51c3d11d
|
Core: rearrange MoveX86regByteToVariable parameters
|
2022-11-07 14:23:09 +10:30 |
|
zilmar
|
d19fc10f0c
|
Core: remove MoveVariableToX86regByte, MoveVariableToX86regHalf, MoveX86regByteToN64Mem
|
2022-11-07 14:21:26 +10:30 |
|
zilmar
|
8702e6b67c
|
core: Rearrange MoveVariableDispToX86Reg parmeters
|
2022-11-07 14:18:15 +10:30 |
|
zilmar
|
10dd2c662a
|
Core: rearrange MoveSxVariableToX86regHalf parameters
|
2022-11-07 14:08:23 +10:30 |
|
zilmar
|
eb5d0ce363
|
Core: rearrange MoveSxVariableToX86regByte parameters
|
2022-11-07 14:05:08 +10:30 |
|
zilmar
|
1584d25cd9
|
Core: Rearrange MoveSxHalfX86regPointerToX86reg parameters
|
2022-11-07 13:41:49 +10:30 |
|
zilmar
|
fe7b8afa92
|
Core: Rearrange MoveSxByteX86regPointerToX86reg parameters
|
2022-11-07 13:37:29 +10:30 |
|
zilmar
|
288fe4d222
|
Core: reorder MoveConstToX86regPointer parameters
|
2022-11-07 11:35:11 +10:30 |
|
zilmar
|
b68caed6c4
|
Core: reorder MoveConstByteToX86regPointer parameters
|
2022-11-07 11:32:46 +10:30 |
|
zilmar
|
eb0aa05a48
|
Core: remove x86 functions referencing n64mem
|
2022-11-07 11:30:51 +10:30 |
|
zilmar
|
40456f12db
|
Core: Change order of MoveConstToVariable
|
2022-11-07 11:26:17 +10:30 |
|
zilmar
|
5c7390324a
|
Core: reorder MoveConstToMemoryDisp parameters
|
2022-11-07 10:45:28 +10:30 |
|
zilmar
|
8272d18aa6
|
Reorder MoveConstHalfToX86regPointer parameters
|
2022-11-07 10:43:27 +10:30 |
|
zilmar
|
0123100233
|
Core: reorder MoveConstHalfToVariable parameters
|
2022-11-07 10:37:29 +10:30 |
|
zilmar
|
bdb2d040f9
|
Core: reorder MoveConstByteToVariable parameters
|
2022-11-07 10:34:25 +10:30 |
|
zilmar
|
eb8b36603b
|
Core: remove MoveConstByteToN64Mem, MoveConstHalfToN64Mem, MoveConstToN64Mem, MoveConstToN64MemDisp
|
2022-11-07 10:27:22 +10:30 |
|
zilmar
|
9dd2df36d4
|
Core: remove CX86Ops::CompVariableToX86reg
|
2022-11-07 10:18:55 +10:30 |
|
zilmar
|
09fb90117e
|
Core: reorder CompConstToVariable parameters
|
2022-11-07 10:11:55 +10:30 |
|
zilmar
|
ade6787e6d
|
Core: Reorder AndVariableToX86Reg parameters
|
2022-11-07 10:00:35 +10:30 |
|
zilmar
|
513ca57f46
|
Core: Reorder parameters for AndVariableDispToX86Reg
|
2022-11-07 09:51:41 +10:30 |
|
zilmar
|
897fd39a0e
|
Core: reorder AndConstToVariable parameters
|
2022-11-07 09:40:12 +10:30 |
|
zilmar
|
c13080d7c3
|
Core: Reorder AddX86regToVariable parameters
|
2022-11-07 09:34:34 +10:30 |
|
zilmar
|
c7ac150b91
|
Core: Capitalize Reg in x86ops
|
2022-11-07 09:31:37 +10:30 |
|
zilmar
|
dbd20dd993
|
Core: Reorder AddConstToVariable parameters
|
2022-11-07 09:29:06 +10:30 |