zilmar
|
d5367d9291
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Core: Better handling of SW with address not sign extended
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2024-11-28 11:02:38 +10:30 |
|
zilmar
|
fd05d9f42f
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core: if lwl or lwr, in CX86RecompilerOps::CompileLoadMemoryValue, make sure that we are loading rt
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2024-11-21 21:33:42 +10:30 |
|
zilmar
|
315d5b9e66
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Core: When running as recompiler in 32bit mode, if LW/SW are in delay slots on block boundaries use 32bit interpter functions
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2024-11-21 19:13:56 +10:30 |
|
zilmar
|
5e1a40fffb
|
Core: fix CX86RecompilerOps::CompileLoadMemoryValue Map_GPR_32bit when called from LWC1
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2024-11-21 11:10:01 +10:30 |
|
zilmar
|
48b3e5a9a2
|
Core: Zip load in CN64System::LoadState uses utf16 path
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2024-11-21 10:48:16 +10:30 |
|
zilmar
|
58a13b8e28
|
Core: Get Zip files to use utf16 paths
|
2024-11-21 10:43:56 +10:30 |
|
zilmar
|
2ec9ed08a4
|
Core: Improve LW with address not sign extended test in recompiler
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2024-11-14 17:02:18 +10:30 |
|
zilmar
|
944dd0917a
|
Core: Fix up logging id for label symbols
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2024-11-14 09:31:45 +10:30 |
|
zilmar
|
61aa53f1a5
|
Core: In jump ops, Only add label symbol if logging
|
2024-11-14 07:30:39 +10:30 |
|
zilmar
|
97b2579b4b
|
Core: Have the recompiler just deal with the Program Counter as 32bit
|
2024-11-07 17:05:16 +10:30 |
|
zilmar
|
f63244cfa4
|
Core: Handle duplicate symbols in AddLabelSymbol
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2024-11-07 13:37:10 +10:30 |
|
zilmar
|
e419508c2b
|
Core: On ExitReason_CheckPCAlignment make sure CompileSystemCheck is called
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2024-11-07 12:13:28 +10:30 |
|
zilmar
|
a46ac9f38d
|
Core: in CX86Ops::_log better handle label symbols
|
2024-11-07 12:12:44 +10:30 |
|
zilmar
|
d06212e766
|
Core: CX86RecompilerOps::JAL stop double call to UpdateCounters
|
2024-11-07 11:05:55 +10:30 |
|
zilmar
|
bfd181f33e
|
Core: Fix up recompiler log including 0x in number symbols
|
2024-11-07 09:22:56 +10:30 |
|
zilmar
|
24d5a6bd65
|
Core: fix up clang formatting
|
2024-10-31 07:01:32 +10:30 |
|
zilmar
|
905254615d
|
Core: Change the handling of symbols inside asmjit usage
|
2024-10-31 06:50:17 +10:30 |
|
zilmar
|
17c501fa08
|
Core: clean up some code related to CompileStoreMemoryValue, like the exit method being an exception
|
2024-10-24 13:32:02 +10:30 |
|
zilmar
|
a8c8e751fc
|
Core: log the block code to the asm log file
|
2024-10-24 12:11:15 +10:30 |
|
zilmar
|
885d31f275
|
Core: Update Map_MemoryStack to pass gp by reference
|
2024-10-24 12:01:14 +10:30 |
|
zilmar
|
440894992a
|
Core: remove the BreakPoint in handling ExitReason_CheckPCAlignment
|
2024-10-24 11:58:53 +10:30 |
|
zilmar
|
65ede5e3e8
|
Core: If jumping to an unaligned address then generate an exception
|
2024-10-24 10:31:48 +10:30 |
|
zilmar
|
4a42466559
|
Core: In compiling a block be able to trace the time to compile
|
2024-10-24 10:04:45 +10:30 |
|
zilmar
|
5750d3df80
|
Core: Have only one function to do what R4300iOp::ExecuteOps and R4300iOp::ExecuteCPU was doing
|
2024-10-24 09:59:41 +10:30 |
|
zilmar
|
c39582b9ed
|
Core: Make sure CX86RecompilerOps::SPECIAL_AND can not write to R0
|
2024-10-17 18:42:45 +10:30 |
|
zilmar
|
a38467cc19
|
Core: Reset Memory Stack Pos In recompiler after running interpter code at non rdram location
|
2024-10-17 18:40:37 +10:30 |
|
zilmar
|
f708e5c0b2
|
Core: Check recompiler memory based on the function size
|
2024-10-17 15:05:48 +10:30 |
|
zilmar
|
45e52e1d2a
|
Core: in SPECIAL_SYSCALL, SPECIAL_BREAK only exit the block is the stage is PIPELINE_STAGE_NORMAL
|
2024-10-17 14:12:46 +10:30 |
|
zilmar
|
30090e5db7
|
Core: in CX86Ops::CX86Ops set setLogger to nullptr if not logging
|
2024-10-03 16:22:42 +09:30 |
|
zilmar
|
9e53b161a4
|
Cote Update PeripheralInterfaceHandler::PI_DMA_WRITE to handle misaligned, end of page test
|
2024-10-03 14:38:04 +09:30 |
|
zilmar
|
08e1b3b39b
|
fix up clang formatting
|
2024-09-26 18:54:54 +09:30 |
|
zilmar
|
62bf10e505
|
Core: Have fpu ops check the input of fs and ft at the same time
|
2024-09-26 16:38:25 +09:30 |
|
zilmar
|
dc4fa211b0
|
Core: Clean up RDRAM/RI Registers
|
2024-09-26 12:59:32 +09:30 |
|
zilmar
|
544d6ba1b9
|
Core: Normalize Path for RomList_RomListCache
|
2024-09-26 07:30:26 +09:30 |
|
zilmar
|
6816ff4435
|
RSP: Disable a lot of ops that are not functioning correctly in the recompiler
|
2024-07-20 17:05:11 +09:30 |
|
zilmar
|
73c9174ce9
|
Core: Remove Memory exception filer
|
2024-06-13 11:50:06 +09:30 |
|
zilmar
|
91f9cdaaa7
|
Core: Change the Program counter to be 64bit
|
2024-06-06 14:09:12 +09:30 |
|
zilmar
|
77ac4744a5
|
Core: Make sure fpu stack is being cleared
|
2024-05-23 11:52:58 +09:30 |
|
zilmar
|
0ff0d5234c
|
Core: In R4300iOp::CheckFPUInput64 check values directly instead of using fpclassify
|
2024-05-23 11:43:19 +09:30 |
|
zilmar
|
ec714cd90d
|
Core: in CX86RecompilerOps::CompileCheckFPUResult64 protect RegPointer before Map_TempReg(asmjit::x86::eax)
|
2024-05-23 11:41:15 +09:30 |
|
zilmar
|
3baaa829de
|
Core: Remove g_TLBLoadAddress, g_TLBStoreAddress global variables
|
2024-05-16 16:34:17 +09:30 |
|
zilmar
|
ae21e10a8d
|
Core: Increase the minimal amount of free space in recompiler memory
|
2024-05-16 16:15:28 +09:30 |
|
zilmar
|
a1f46356fb
|
Core: remove usage of g_RecompPos
|
2024-05-16 16:08:23 +09:30 |
|
zilmar
|
7f18773b5b
|
Core: Add CX86RegInfo::GetFPStatusReg
|
2024-05-16 15:51:04 +09:30 |
|
zilmar
|
13bd420b2a
|
Core: Sync FP status register in advanced block linking
|
2024-05-16 15:45:38 +09:30 |
|
zilmar
|
703a09d034
|
Core: Remove protecting memory option
|
2024-05-09 17:56:28 +09:30 |
|
zilmar
|
f478f16269
|
Core: Clear FP Status flag in recompiler on BC1FL and BC1TL
|
2024-05-09 10:55:38 +09:30 |
|
zilmar
|
4c23e7af2c
|
Core: Remove ChangeFPURegFormat, Load_FPR_ToTop
|
2024-05-02 17:21:01 +09:30 |
|
zilmar
|
c786bc3251
|
Core: Force Fpu exception in recompiler
|
2024-05-02 16:34:13 +09:30 |
|
zilmar
|
b3e8b760e6
|
Core: get COP1_S_TRUNC_L, COP1_S_CEIL_L, COP1_S_FLOOR_L, COP1_W_CVT_S, COP1_W_CVT_D, COP1_L_CVT_S, COP1_L_CVT_D to use COP1_S_CVT function
|
2024-05-02 15:48:43 +09:30 |