5 Commits

Author	SHA1	Message	Date
zilmar	d37d0dc7a5	Core: Dissasm of DMFC0 was showing the wrong reg	2022-08-01 10:02:07 +09:30
zilmar	09b535551d	Core: Move DelaySlotEffectsCompare into R4300iInstruction	2022-07-25 16:35:42 +09:30
zilmar	0abc7ccaa4	Core: Move OpHasDelaySlot into R4300iInstruction	2022-07-25 14:23:12 +09:30
zilmar	1a8a4dd50f	Core: Fix some bugs added to R4300iInstruction Param	2022-07-25 11:57:19 +09:30
zilmar	7f3b8e3601	Core: Start to add R4300iInstruction to do analysis of an opcode	2022-07-18 18:01:00 +09:30