zilmar
|
07cf94bde3
|
RSP: only look at SP_STATUS_HALT when seeing if the RSP should run
|
2023-07-06 20:49:14 +09:30 |
|
zilmar
|
187bd64915
|
Core: Update how exceptions are handled with the recompiler
|
2023-06-08 16:25:05 +09:30 |
|
zilmar
|
1522f17b9c
|
RSP: Convert base code to be compiled as c++ instead of C
|
2023-06-01 17:11:26 +09:30 |
|
zilmar
|
a39ebe7d37
|
Core: Create InitFpuOperation
|
2023-05-27 10:01:19 +09:30 |
|
zilmar
|
e2eebe566d
|
Core: fix up for clang
|
2023-05-18 18:05:54 +09:30 |
|
zilmar
|
b438fddf2e
|
Core: Add CP2 handling
|
2023-05-18 18:04:41 +09:30 |
|
zilmar
|
3b8dfce64a
|
Core: Convert DoBreakException to TriggerException
|
2023-05-18 11:47:00 +09:30 |
|
zilmar
|
b2c2a03a2e
|
Core: convert DoFloatingPointException to TriggerException
|
2023-05-18 11:41:20 +09:30 |
|
zilmar
|
0dfab78c88
|
Core: Convert DoCopUnusableException to TriggerException
|
2023-05-18 11:26:36 +09:30 |
|
zilmar
|
456f25eb6b
|
Core: Get DoIntrException to use TriggerException
|
2023-05-18 11:19:26 +09:30 |
|
zilmar
|
252f629e14
|
Core: Convert DoIllegalInstructionException to TriggerException
|
2023-05-18 11:13:22 +09:30 |
|
zilmar
|
59a1277bed
|
Core: Convert GenerateOverflowException to TriggerException
|
2023-05-18 11:05:27 +09:30 |
|
zilmar
|
69fd74ba56
|
Core: Convert DoSysCallException to TriggerException
|
2023-05-18 10:56:06 +09:30 |
|
zilmar
|
17df17805d
|
Core: convert DoTrapException to TriggerException
|
2023-05-18 10:49:58 +09:30 |
|
zilmar
|
74912ca8c2
|
Core: handle jump to unaligned addresses
|
2023-05-18 10:33:57 +09:30 |
|
zilmar
|
6e58edb076
|
Core: Merge CheckFPUException into CheckFPUResult32
|
2023-05-15 23:16:54 +09:30 |
|
zilmar
|
62b29622ca
|
Core: remove usage of fpclassify in CheckFPUInput32 and CheckFPUResult32
|
2023-05-15 22:57:13 +09:30 |
|
zilmar
|
0ddeb6b981
|
Core: remove exception out of R4300iOp::CheckFPUInput32
|
2023-05-15 20:56:56 +09:30 |
|
zilmar
|
fdc637516f
|
Core: remove Double_RoundToInteger64
|
2023-05-09 13:05:58 +09:30 |
|
zilmar
|
5a23f48629
|
Core: remove Double_RoundToInteger32
|
2023-05-09 12:57:08 +09:30 |
|
zilmar
|
e5b1a9469a
|
Core: remove Float_RoundToInteger64
|
2023-05-09 12:50:23 +09:30 |
|
zilmar
|
2c19c2c362
|
Core: Handle CPO1 unimplemented op
|
2023-05-09 11:28:59 +09:30 |
|
zilmar
|
85f4f147a1
|
Core: Remove Float_RoundToInteger32
|
2023-05-09 09:40:10 +09:30 |
|
zilmar
|
49a385e743
|
Core: Split CheckFPUException into CheckFPUException and CheckFPUInvalidException
|
2023-05-09 08:06:15 +09:30 |
|
zilmar
|
fa25b6d2af
|
Core: clear FPU StatusReg cause in CX86RecompilerOps::COP1_S_ADD
|
2023-05-02 11:12:13 +09:30 |
|
zilmar
|
02a48566c0
|
Core: Remove helper functions from x86 Recompiler Ops
|
2023-05-02 10:50:49 +09:30 |
|
zilmar
|
5cfb80fcfc
|
Core: Improve R4300iOp::COP1_S_CVT_W
|
2023-04-24 19:02:00 +09:30 |
|
zilmar
|
71ef28fd55
|
Core: Add R4300iOp::COP1_W_CVT_W
|
2023-04-24 18:55:06 +09:30 |
|
zilmar
|
ab8b004b71
|
Core: Add a setting for fpu reg caching
|
2023-04-17 18:47:33 +09:30 |
|
zilmar
|
cba01b2063
|
Core: Improve R4300iOp::COP1_L_CVT_D
|
2023-04-17 18:08:51 +09:30 |
|
zilmar
|
d9e69fee65
|
Core: Improve R4300iOp::COP1_D_CMP
|
2023-04-17 18:07:58 +09:30 |
|
zilmar
|
0cc6d21ad1
|
Core: Improve R4300iOp::COP1_S_CMP
|
2023-04-17 18:06:42 +09:30 |
|
zilmar
|
9297b1c4b8
|
Core: Improve COP1_S_CVT_D, COP1_W_CVT_D, COP1_D_CVT_S, COP1_W_CVT_S, COP1_L_CVT_S,
|
2023-04-11 16:20:24 +09:30 |
|
zilmar
|
9a04293a67
|
Update arm/arm64 to use asmjit
|
2023-04-05 10:16:21 +09:30 |
|
zilmar
|
2c40d47a34
|
Start to look at x64 recompiler
|
2023-04-04 17:44:42 +09:30 |
|
zilmar
|
fe35d950f3
|
x64: Change MemoryStackPos to be a pointer
|
2023-04-03 09:08:43 +09:30 |
|
zilmar
|
422a42cae3
|
Core: More work improve the accuracy of cop1
|
2023-03-28 13:12:59 +10:30 |
|
zilmar
|
ce69324dbe
|
Core: Update R4300iOp::COP1_S_MUL to handle exceptions
|
2023-03-21 10:49:49 +10:30 |
|
zilmar
|
cbf67cede4
|
Core: Update sub.d to handle exceptions
|
2023-03-20 17:17:31 +10:30 |
|
zilmar
|
96787690c7
|
Core: Fix CoprocessorUnitNumber on exception
|
2023-03-20 12:09:06 +10:30 |
|
zilmar
|
7f7aee7232
|
Core: remove FAKE_CAUSE_REGISTER
|
2023-03-14 12:14:10 +10:30 |
|
zilmar
|
9093b42d47
|
Core: improve the accuracy of COP1_S_SUB
|
2023-03-06 20:58:47 +10:30 |
|
zilmar
|
306f21b5fa
|
Core: Improve accuracy of add.d
|
2023-03-06 18:28:32 +10:30 |
|
zilmar
|
ea70218d1c
|
Clean up warnings
|
2023-02-28 10:09:08 +10:30 |
|
zilmar
|
1864adcb35
|
Core: improve the accuracy of COP1_S_ADD
|
2023-02-21 14:54:22 +10:30 |
|
zilmar
|
3acd56ae61
|
Core Fix up clang formatting
|
2023-02-14 08:05:40 +10:30 |
|
zilmar
|
2db5c81af5
|
Core: Change Project64.rdb so it use 1's and 0's instead of "Yes" or "No"
|
2023-02-13 21:05:57 +10:30 |
|
zilmar
|
e14e10f4b0
|
Core: Fix handling of R4300iOp::COP1_S_CMP and R4300iOp::COP1_D_CMP
|
2023-02-13 16:22:50 +10:30 |
|
zilmar
|
baa5dbe257
|
Core: Add some error message when failing to load rom
|
2023-02-13 12:04:31 +10:30 |
|
zilmar
|
a8a553b316
|
Core: fix code to make clang happy
|
2023-01-31 07:54:47 +10:30 |