2012-12-19 09:30:18 +00:00
|
|
|
/****************************************************************************
|
|
|
|
* *
|
|
|
|
* Project 64 - A Nintendo 64 emulator. *
|
|
|
|
* http://www.pj64-emu.com/ *
|
|
|
|
* Copyright (C) 2012 Project64. All rights reserved. *
|
|
|
|
* *
|
|
|
|
* License: *
|
|
|
|
* GNU/GPLv2 http://www.gnu.org/licenses/gpl-2.0.html *
|
|
|
|
* *
|
|
|
|
****************************************************************************/
|
|
|
|
#pragma once
|
|
|
|
|
2010-05-30 01:54:42 +00:00
|
|
|
class CRegInfo :
|
2013-03-22 05:47:20 +00:00
|
|
|
private CDebugSettings,
|
2010-06-04 06:25:07 +00:00
|
|
|
private CX86Ops,
|
|
|
|
private CSystemRegisters
|
2010-05-30 01:54:42 +00:00
|
|
|
{
|
|
|
|
public:
|
|
|
|
//enums
|
|
|
|
enum REG_STATE {
|
2012-10-20 23:19:09 +00:00
|
|
|
STATE_UNKNOWN = 0x00,
|
|
|
|
STATE_KNOWN_VALUE = 0x01,
|
|
|
|
STATE_X86_MAPPED = 0x02,
|
|
|
|
STATE_SIGN = 0x04,
|
|
|
|
STATE_32BIT = 0x08,
|
|
|
|
STATE_MODIFIED = 0x10,
|
2010-05-30 01:54:42 +00:00
|
|
|
|
|
|
|
STATE_MAPPED_64 = (STATE_KNOWN_VALUE | STATE_X86_MAPPED), // = 3
|
|
|
|
STATE_MAPPED_32_ZERO = (STATE_KNOWN_VALUE | STATE_X86_MAPPED | STATE_32BIT), // = 11
|
|
|
|
STATE_MAPPED_32_SIGN = (STATE_KNOWN_VALUE | STATE_X86_MAPPED | STATE_32BIT | STATE_SIGN), // = 15
|
|
|
|
|
2015-02-25 06:41:54 +00:00
|
|
|
STATE_CONST_32_ZERO = (STATE_KNOWN_VALUE | STATE_32BIT), // = 9
|
|
|
|
STATE_CONST_32_SIGN = (STATE_KNOWN_VALUE | STATE_32BIT | STATE_SIGN), // = 13
|
2010-05-30 01:54:42 +00:00
|
|
|
STATE_CONST_64 = (STATE_KNOWN_VALUE), // = 1
|
|
|
|
};
|
|
|
|
|
|
|
|
enum REG_MAPPED {
|
|
|
|
NotMapped = 0,
|
|
|
|
GPR_Mapped = 1,
|
|
|
|
Temp_Mapped = 2,
|
|
|
|
Stack_Mapped = 3,
|
|
|
|
};
|
|
|
|
|
|
|
|
enum FPU_STATE {
|
2010-06-04 06:25:07 +00:00
|
|
|
FPU_Any = -1,
|
|
|
|
FPU_Unknown = 0,
|
|
|
|
FPU_Dword = 1,
|
|
|
|
FPU_Qword = 2,
|
|
|
|
FPU_Float = 3,
|
|
|
|
FPU_Double = 4,
|
2010-05-30 01:54:42 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
enum FPU_ROUND {
|
2010-06-04 06:25:07 +00:00
|
|
|
RoundUnknown = -1,
|
|
|
|
RoundDefault = 0,
|
|
|
|
RoundTruncate = 1,
|
|
|
|
RoundNearest = 2,
|
|
|
|
RoundDown = 3,
|
|
|
|
RoundUp = 4,
|
2010-05-30 01:54:42 +00:00
|
|
|
};
|
|
|
|
public:
|
2012-10-14 01:05:52 +00:00
|
|
|
CRegInfo();
|
|
|
|
CRegInfo(const CRegInfo&);
|
|
|
|
~CRegInfo();
|
|
|
|
|
|
|
|
CRegInfo& operator=(const CRegInfo&);
|
|
|
|
|
2010-05-30 01:54:42 +00:00
|
|
|
bool operator==(const CRegInfo& right) const;
|
|
|
|
bool operator!=(const CRegInfo& right) const;
|
|
|
|
|
|
|
|
static REG_STATE ConstantsType ( __int64 Value );
|
|
|
|
|
|
|
|
void FixRoundModel ( FPU_ROUND RoundMethod );
|
2010-06-04 06:25:07 +00:00
|
|
|
void ChangeFPURegFormat ( int Reg, FPU_STATE OldFormat, FPU_STATE NewFormat, FPU_ROUND RoundingModel );
|
|
|
|
void Load_FPR_ToTop ( int Reg, int RegToLoad, FPU_STATE Format);
|
|
|
|
BOOL RegInStack ( int Reg, FPU_STATE Format );
|
2015-04-28 22:19:02 +00:00
|
|
|
void UnMap_AllFPRs ();
|
2010-06-04 06:25:07 +00:00
|
|
|
void UnMap_FPR ( int Reg, int WriteBackValue );
|
2015-04-28 22:19:02 +00:00
|
|
|
x86FpuValues StackPosition( int Reg );
|
2010-06-04 06:25:07 +00:00
|
|
|
|
2015-04-28 22:19:02 +00:00
|
|
|
x86Reg FreeX86Reg ();
|
|
|
|
x86Reg Free8BitX86Reg ();
|
2012-10-22 10:36:57 +00:00
|
|
|
void Map_GPR_32bit ( int MipsReg, bool SignValue, int MipsRegToLoad );
|
2010-05-30 01:54:42 +00:00
|
|
|
void Map_GPR_64bit ( int MipsReg, int MipsRegToLoad );
|
2015-04-28 22:19:02 +00:00
|
|
|
x86Reg Get_MemoryStack () const;
|
2010-10-29 03:20:25 +00:00
|
|
|
x86Reg Map_MemoryStack ( x86Reg Reg, bool bMapRegister, bool LoadValue = true );
|
2010-05-30 01:54:42 +00:00
|
|
|
x86Reg Map_TempReg ( x86Reg Reg, int MipsReg, BOOL LoadHiWord );
|
|
|
|
void ProtectGPR ( DWORD Reg );
|
2010-05-31 00:21:08 +00:00
|
|
|
void UnProtectGPR ( DWORD Reg );
|
2015-04-28 22:19:02 +00:00
|
|
|
void ResetX86Protection ();
|
|
|
|
x86Reg UnMap_TempReg ();
|
2010-05-30 01:54:42 +00:00
|
|
|
void UnMap_GPR ( DWORD Reg, bool WriteBackValue );
|
|
|
|
bool UnMap_X86reg ( x86Reg Reg );
|
2015-04-28 22:19:02 +00:00
|
|
|
void WriteBackRegisters ();
|
2010-05-30 01:54:42 +00:00
|
|
|
|
2015-04-28 22:19:02 +00:00
|
|
|
bool IsKnown(int Reg) const { return ((GetMipsRegState(Reg) & STATE_KNOWN_VALUE) != 0); }
|
|
|
|
bool IsUnknown(int Reg) const { return ((GetMipsRegState(Reg) & STATE_KNOWN_VALUE) == 0); }
|
|
|
|
bool IsModified(int Reg) const { return ((GetMipsRegState(Reg) & STATE_MODIFIED) != 0); }
|
2010-05-30 01:54:42 +00:00
|
|
|
|
2015-04-28 22:19:02 +00:00
|
|
|
bool IsMapped(int Reg) const { return ((GetMipsRegState(Reg) & (STATE_KNOWN_VALUE | STATE_X86_MAPPED)) == (STATE_KNOWN_VALUE | STATE_X86_MAPPED)); }
|
|
|
|
bool IsConst(int Reg) const { return ((GetMipsRegState(Reg) & (STATE_KNOWN_VALUE | STATE_X86_MAPPED)) == STATE_KNOWN_VALUE); }
|
2010-05-30 01:54:42 +00:00
|
|
|
|
2015-04-28 22:19:02 +00:00
|
|
|
bool IsSigned(int Reg) const { return ((GetMipsRegState(Reg) & (STATE_KNOWN_VALUE | STATE_SIGN)) == (STATE_KNOWN_VALUE | STATE_SIGN)); }
|
|
|
|
bool IsUnsigned(int Reg) const { return ((GetMipsRegState(Reg) & (STATE_KNOWN_VALUE | STATE_SIGN)) == STATE_KNOWN_VALUE); }
|
2010-05-30 01:54:42 +00:00
|
|
|
|
2015-04-28 22:19:02 +00:00
|
|
|
bool Is32Bit(int Reg) const { return ((GetMipsRegState(Reg) & (STATE_KNOWN_VALUE | STATE_32BIT)) == (STATE_KNOWN_VALUE | STATE_32BIT)); }
|
|
|
|
bool Is64Bit(int Reg) const { return ((GetMipsRegState(Reg) & (STATE_KNOWN_VALUE | STATE_32BIT)) == STATE_KNOWN_VALUE); }
|
2010-05-30 01:54:42 +00:00
|
|
|
|
2015-04-28 22:19:02 +00:00
|
|
|
bool Is32BitMapped(int Reg) const { return ((GetMipsRegState(Reg) & (STATE_KNOWN_VALUE | STATE_32BIT | STATE_X86_MAPPED)) == (STATE_KNOWN_VALUE | STATE_32BIT | STATE_X86_MAPPED)); }
|
|
|
|
bool Is64BitMapped(int Reg) const { return ((GetMipsRegState(Reg) & (STATE_KNOWN_VALUE | STATE_32BIT | STATE_X86_MAPPED)) == (STATE_KNOWN_VALUE | STATE_X86_MAPPED)); }
|
2010-05-30 01:54:42 +00:00
|
|
|
|
2015-04-28 22:19:02 +00:00
|
|
|
REG_STATE GetMipsRegState ( int Reg ) const { return m_MIPS_RegState[Reg]; }
|
|
|
|
unsigned __int64 GetMipsReg ( int Reg ) const { return m_MIPS_RegVal[Reg].UDW; }
|
|
|
|
__int64 GetMipsReg_S ( int Reg ) const { return m_MIPS_RegVal[Reg].DW; }
|
|
|
|
DWORD GetMipsRegLo ( int Reg ) const { return m_MIPS_RegVal[Reg].UW[0]; }
|
|
|
|
long GetMipsRegLo_S ( int Reg ) const { return m_MIPS_RegVal[Reg].W[0]; }
|
|
|
|
DWORD GetMipsRegHi ( int Reg ) const { return m_MIPS_RegVal[Reg].UW[1]; }
|
|
|
|
long GetMipsRegHi_S ( int Reg ) const { return m_MIPS_RegVal[Reg].W[1]; }
|
|
|
|
CX86Ops::x86Reg GetMipsRegMapLo ( int Reg ) const { return m_RegMapLo[Reg]; }
|
|
|
|
CX86Ops::x86Reg GetMipsRegMapHi ( int Reg ) const { return m_RegMapHi[Reg]; }
|
2012-10-14 01:05:52 +00:00
|
|
|
|
2015-04-28 22:19:02 +00:00
|
|
|
DWORD GetX86MapOrder ( x86Reg Reg ) const { return m_x86reg_MapOrder[Reg]; }
|
|
|
|
bool GetX86Protected ( x86Reg Reg ) const { return m_x86reg_Protected[Reg]; }
|
|
|
|
REG_MAPPED GetX86Mapped ( x86Reg Reg ) const { return m_x86reg_MappedTo[Reg]; }
|
2010-07-23 10:45:35 +00:00
|
|
|
|
2015-04-28 22:19:02 +00:00
|
|
|
DWORD GetBlockCycleCount() const { return m_CycleCount; }
|
2010-07-23 10:45:35 +00:00
|
|
|
|
2015-04-28 22:19:02 +00:00
|
|
|
void SetMipsReg ( int Reg, unsigned __int64 Value ) { m_MIPS_RegVal[Reg].UDW = Value; }
|
|
|
|
void SetMipsReg_S ( int Reg, __int64 Value) { m_MIPS_RegVal[Reg].DW = Value; }
|
|
|
|
void SetMipsRegLo ( int Reg, DWORD Value ) { m_MIPS_RegVal[Reg].UW[0] = Value; }
|
|
|
|
void SetMipsRegHi ( int Reg, DWORD Value ) { m_MIPS_RegVal[Reg].UW[1] = Value; }
|
|
|
|
void SetMipsRegMapLo ( int GetMipsReg, x86Reg Reg ) { m_RegMapLo[GetMipsReg] = Reg; }
|
|
|
|
void SetMipsRegMapHi ( int GetMipsReg, x86Reg Reg ) { m_RegMapHi[GetMipsReg] = Reg; }
|
|
|
|
void SetMipsRegState ( int GetMipsReg, REG_STATE State ) { m_MIPS_RegState[GetMipsReg] = State; }
|
2012-11-03 01:18:08 +00:00
|
|
|
|
2015-04-28 22:19:02 +00:00
|
|
|
void SetX86MapOrder ( x86Reg Reg, DWORD Order ) { m_x86reg_MapOrder[Reg] = Order; }
|
|
|
|
void SetX86Protected ( x86Reg Reg, bool Protected ) { m_x86reg_Protected[Reg] = Protected; }
|
|
|
|
void SetX86Mapped ( x86Reg Reg, REG_MAPPED Mapping ) { m_x86reg_MappedTo[Reg] = Mapping; }
|
2010-05-30 01:54:42 +00:00
|
|
|
|
2012-10-04 11:01:10 +00:00
|
|
|
|
2015-04-28 22:19:02 +00:00
|
|
|
void SetBlockCycleCount(DWORD CyleCount) { m_CycleCount = CyleCount; }
|
2010-05-30 01:54:42 +00:00
|
|
|
|
2015-04-28 22:19:02 +00:00
|
|
|
int & StackTopPos() { return m_Stack_TopPos; }
|
|
|
|
int & FpuMappedTo(int Reg) { return x86fpu_MappedTo[Reg]; }
|
|
|
|
FPU_STATE & FpuState(int Reg) { return x86fpu_State[Reg]; }
|
|
|
|
FPU_ROUND & FpuRoundingModel(int Reg) { return x86fpu_RoundingModel[Reg]; }
|
|
|
|
bool & FpuBeenUsed() { return m_Fpu_Used; }
|
2010-07-23 10:45:35 +00:00
|
|
|
|
2015-04-28 22:19:02 +00:00
|
|
|
FPU_ROUND GetRoundingModel() const { return m_RoundingModel; }
|
|
|
|
void SetRoundingModel(FPU_ROUND RoundingModel) { m_RoundingModel = RoundingModel; }
|
2010-05-30 01:54:42 +00:00
|
|
|
|
|
|
|
private:
|
2015-04-28 22:19:02 +00:00
|
|
|
const char * RoundingModelName(FPU_ROUND RoundType);
|
|
|
|
x86Reg UnMap_8BitTempReg();
|
2010-06-04 06:25:07 +00:00
|
|
|
|
2010-05-30 01:54:42 +00:00
|
|
|
//r4k
|
2012-10-14 01:05:52 +00:00
|
|
|
REG_STATE m_MIPS_RegState[32];
|
2015-04-28 22:19:02 +00:00
|
|
|
MIPS_DWORD m_MIPS_RegVal[32];
|
|
|
|
x86Reg m_RegMapHi[32];
|
|
|
|
x86Reg m_RegMapLo[32];
|
2012-10-14 01:05:52 +00:00
|
|
|
|
2015-04-28 22:19:02 +00:00
|
|
|
REG_MAPPED m_x86reg_MappedTo[10];
|
|
|
|
DWORD m_x86reg_MapOrder[10];
|
|
|
|
bool m_x86reg_Protected[10];
|
2010-05-30 01:54:42 +00:00
|
|
|
|
2015-04-28 22:19:02 +00:00
|
|
|
DWORD m_CycleCount;
|
2010-05-30 01:54:42 +00:00
|
|
|
|
|
|
|
//FPU
|
2015-04-28 22:19:02 +00:00
|
|
|
int m_Stack_TopPos;
|
|
|
|
int x86fpu_MappedTo[8];
|
|
|
|
FPU_STATE x86fpu_State[8];
|
|
|
|
BOOL x86fpu_StateChanged[8];
|
|
|
|
FPU_ROUND x86fpu_RoundingModel[8];
|
2010-05-30 01:54:42 +00:00
|
|
|
|
2012-10-14 01:05:52 +00:00
|
|
|
bool m_Fpu_Used;
|
2010-07-23 10:45:35 +00:00
|
|
|
FPU_ROUND m_RoundingModel;
|
2010-05-30 01:54:42 +00:00
|
|
|
|
|
|
|
static unsigned int m_fpuControl;
|
|
|
|
};
|