ShuriZma
/
project64
mirror of https://github.com/project64/project64.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

DSRL32 should not sign extend

This commit is contained in:
zilmar 2015-02-25 17:41:54 +11:00
parent c3a9ec1e5b
commit bbd45d45ba
6 changed files with 129 additions and 87 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
Source/Project64/N64 System/Recompiler/Code Section.cpp
View File

@ -687,7 +687,7 @@ void CCodeSection::SyncRegState ( const CRegInfo & SyncTo )
g_Notify->BreakPoint(__FILE__,__LINE__);
}
continue;
case CRegInfo::STATE_CONST_32:
case CRegInfo::STATE_CONST_32_SIGN:
if (GetMipsRegLo(i) != SyncTo.GetMipsRegLo(i))
{
CPU_Message("Value of const is different Reg %d (%s) Value: 0x%08X to 0x%08X",i,CRegName::GPR[i],GetMipsRegLo(i),SyncTo.GetMipsRegLo(i));
@ -735,7 +735,7 @@ void CCodeSection::SyncRegState ( const CRegInfo & SyncTo )
MoveConstToX86reg(GetMipsRegHi(i),x86RegHi);
MoveConstToX86reg(GetMipsRegLo(i),Reg);
break;
case CRegInfo::STATE_CONST_32:
case CRegInfo::STATE_CONST_32_SIGN:
MoveConstToX86reg(GetMipsRegLo_S(i) >> 31,x86RegHi);
MoveConstToX86reg(GetMipsRegLo(i),Reg);
break;
@ -759,7 +759,7 @@ void CCodeSection::SyncRegState ( const CRegInfo & SyncTo )
UnMap_X86reg(Reg);
switch (GetMipsRegState(i)) {
case CRegInfo::STATE_UNKNOWN: MoveVariableToX86reg(&_GPR[i].UW[0],CRegName::GPR_Lo[i],Reg); break;
case CRegInfo::STATE_CONST_32: MoveConstToX86reg(GetMipsRegLo(i),Reg); break;
case CRegInfo::STATE_CONST_32_SIGN: MoveConstToX86reg(GetMipsRegLo(i),Reg); break;
case CRegInfo::STATE_MAPPED_32_SIGN:
MoveX86RegToX86Reg(GetMipsRegMapLo(i),Reg);
m_RegWorkingSet.SetX86Mapped(GetMipsRegMapLo(i),CRegInfo::NotMapped);
@ -810,7 +810,7 @@ void CCodeSection::SyncRegState ( const CRegInfo & SyncTo )
g_Notify->BreakPoint(__FILE__,__LINE__);
}
break;
case CRegInfo::STATE_CONST_32:
case CRegInfo::STATE_CONST_32_SIGN:
if (!g_System->b32BitCore() && GetMipsRegLo_S(i) < 0)
{
CPU_Message("Sign Problems in SyncRegState\nSTATE_MAPPED_32_ZERO");
@ -1827,7 +1827,7 @@ bool CCodeSection::InheritParentInfo ( void )
}
break;
case CRegInfo::STATE_CONST_64: Map_GPR_64bit(i2,i2); break;
case CRegInfo::STATE_CONST_32:
case CRegInfo::STATE_CONST_32_SIGN:
if ((RegSet->GetMipsRegLo_S(i2) < 0) && IsUnsigned(i2)) {
m_RegWorkingSet.SetMipsRegState(i2,CRegInfo::STATE_MAPPED_32_SIGN);
}
@ -1952,7 +1952,7 @@ bool CCodeSection::InheritParentInfo ( void )
NeedSync = true;
}
break;
case CRegInfo::STATE_CONST_32:
case CRegInfo::STATE_CONST_32_SIGN:
if (GetMipsRegLo(i2) != RegSet->GetMipsRegLo(i2))
{
g_Notify->BreakPoint(__FILE__,__LINE__);

28
Source/Project64/N64 System/Recompiler/Loop Analysis.cpp
View File

@ -294,7 +294,7 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section)
g_Notify->BreakPoint(__FILE__,__LINE__);
#ifdef tofix
m_Reg.GetMipsRegLo(31) = m_PC + 8;
m_Reg.SetMipsRegState(31,CRegInfo::STATE_CONST_32);
m_Reg.SetMipsRegState(31,CRegInfo::STATE_CONST_32_SIGN);
Section->m_Cont.TargetPC = m_PC + 8;
Section->m_Jump.TargetPC = m_PC + ((short)m_Command.offset << 2) + 4;
if (m_PC == Section->m_Jump.TargetPC) {
@ -319,7 +319,7 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section)
}
if (Value >= 0) {
m_Reg.GetMipsRegLo(31) = m_PC + 8;
m_Reg.SetMipsRegState(31,CRegInfo::STATE_CONST_32);
m_Reg.SetMipsRegState(31,CRegInfo::STATE_CONST_32_SIGN);
Section->m_Jump.TargetPC = m_PC + ((short)m_Command.offset << 2) + 4;
if (m_PC == Section->m_Jump.TargetPC) {
if (!DelaySlotEffectsCompare(m_PC,31,0)) {
@ -332,7 +332,7 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section)
m_Reg.GetMipsRegLo(31) = m_PC + 8;
m_Reg.SetMipsRegState(31,CRegInfo::STATE_CONST_32);
m_Reg.SetMipsRegState(31,CRegInfo::STATE_CONST_32_SIGN);
Section->m_Cont.TargetPC = m_PC + 8;
Section->m_Jump.TargetPC = m_PC + ((short)m_Command.offset << 2) + 4;
if (m_PC == Section->m_Jump.TargetPC) {
@ -358,7 +358,7 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section)
#ifdef tofix
m_NextInstruction = DELAY_SLOT;
m_Reg.GetMipsRegLo(31) = m_PC + 8;
m_Reg.SetMipsRegState(31,CRegInfo::STATE_CONST_32);
m_Reg.SetMipsRegState(31,CRegInfo::STATE_CONST_32_SIGN);
Section->m_Jump.TargetPC = (m_PC & 0xF0000000) + (m_Command.target << 2);
if (m_PC == Section->m_Jump.TargetPC) {
if (!DelaySlotEffectsCompare(m_PC,31,0)) {
@ -447,7 +447,7 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section)
if (m_Command.rt == 0) { break; }
/*if (m_Command.rs == 0) {
m_Reg.GetMipsRegLo(m_Command.rt) = (short)m_Command.immediate;
m_Reg.SetMipsRegState(m_Command.rt,CRegInfo::STATE_CONST_32);
m_Reg.SetMipsRegState(m_Command.rt,CRegInfo::STATE_CONST_32_SIGN);
} else {*/
m_Reg.SetMipsRegState(m_Command.rt,CRegInfo::STATE_MODIFIED);
//}
@ -462,7 +462,7 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section)
if (!m_Reg.IsModified(m_Command.rt))
{
m_Reg.SetMipsRegLo(m_Command.rt,((short)m_Command.offset << 16));
m_Reg.SetMipsRegState(m_Command.rt,CRegInfo::STATE_CONST_32);
m_Reg.SetMipsRegState(m_Command.rt,CRegInfo::STATE_CONST_32_SIGN);
}
break;
case R4300i_ANDI:
@ -476,7 +476,7 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section)
m_Reg.SetMipsRegState(m_Command.rt,CRegInfo::STATE_MODIFIED);
}
if (m_Reg.IsConst(m_Command.rs)) {
m_Reg.SetMipsRegState(m_Command.rt,CRegInfo::STATE_CONST_32);
m_Reg.SetMipsRegState(m_Command.rt,CRegInfo::STATE_CONST_32_SIGN);
m_Reg.SetMipsRegLo(m_Command.rt,m_Reg.GetMipsRegLo(m_Command.rs) | m_Command.immediate);
} else {
m_Reg.SetMipsRegState(m_Command.rt,CRegInfo::STATE_MODIFIED);
@ -489,7 +489,7 @@ bool LoopAnalysis::CheckLoopRegisterUsage( CCodeSection * Section)
m_Reg.SetMipsRegState(m_Command.rt,CRegInfo::STATE_MODIFIED);
}
if (m_Reg.IsConst(m_Command.rs)) {
m_Reg.SetMipsRegState(m_Command.rt,CRegInfo::STATE_CONST_32);
m_Reg.SetMipsRegState(m_Command.rt,CRegInfo::STATE_CONST_32_SIGN);
m_Reg.SetMipsRegLo(m_Command.rt, m_Reg.GetMipsRegLo(m_Command.rs) ^ m_Command.immediate);
} else {
m_Reg.SetMipsRegState(m_Command.rt,CRegInfo::STATE_MODIFIED);
@ -833,7 +833,7 @@ void LoopAnalysis::SPECIAL_SLLV ( void )
m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_MODIFIED);
}
if (m_Reg.IsConst(m_Command.rt) && m_Reg.IsConst(m_Command.rs)) {
m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_32);
m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_32_SIGN);
m_Reg.SetMipsRegLo(m_Command.rd, m_Reg.GetMipsRegLo(m_Command.rt) << (m_Reg.GetMipsRegLo(m_Command.rs) & 0x1F));
} else {
m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_MODIFIED);
@ -848,7 +848,7 @@ void LoopAnalysis::SPECIAL_SRLV ( void )
m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_MODIFIED);
}
if (m_Reg.IsConst(m_Command.rt) && m_Reg.IsConst(m_Command.rs)) {
m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_32);
m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_32_SIGN);
m_Reg.SetMipsRegLo(m_Command.rd, m_Reg.GetMipsRegLo(m_Command.rt) >> (m_Reg.GetMipsRegLo(m_Command.rs) & 0x1F));
} else {
m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_MODIFIED);
@ -863,7 +863,7 @@ void LoopAnalysis::SPECIAL_SRAV ( void )
m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_MODIFIED);
}
if (m_Reg.IsConst(m_Command.rt) && m_Reg.IsConst(m_Command.rs)) {
m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_32);
m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_32_SIGN);
m_Reg.SetMipsRegLo(m_Command.rd, m_Reg.GetMipsRegLo_S(m_Command.rt) >> (m_Reg.GetMipsRegLo(m_Command.rs) & 0x1F));
} else {
m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_MODIFIED);
@ -888,7 +888,7 @@ void LoopAnalysis::SPECIAL_JALR ( void )
g_Notify->BreakPoint(__FILE__,__LINE__);
#ifdef tofix
m_Reg.GetMipsRegLo(m_Command.rd) = m_PC + 8;
m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_32);
m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_32_SIGN);
if (m_Reg.IsConst(m_Command.rs)) {
Section->m_Jump.TargetPC = m_Reg.GetMipsRegLo(m_Command.rs);
} else {
@ -1204,7 +1204,7 @@ void LoopAnalysis::SPECIAL_DSRL32 ( void )
m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_MODIFIED);
}
if (m_Reg.IsConst(m_Command.rt)) {
m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_32);
m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_32_SIGN);
m_Reg.SetMipsRegLo(m_Command.rd,(DWORD)(m_Reg.GetMipsReg(m_Command.rt) >> (m_Command.sa + 32)));
} else {
m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_MODIFIED);
@ -1219,7 +1219,7 @@ void LoopAnalysis::SPECIAL_DSRA32 ( void )
m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_MODIFIED);
}
if (m_Reg.IsConst(m_Command.rt)) {
m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_32);
m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_CONST_32_SIGN);
m_Reg.SetMipsRegLo(m_Command.rd,(DWORD)(m_Reg.GetMipsReg_S(m_Command.rt) >> (m_Command.sa + 32)));
} else {
m_Reg.SetMipsRegState(m_Command.rd,CRegInfo::STATE_MODIFIED);

104
Source/Project64/N64 System/Recompiler/Recompiler Ops.cpp
View File

@ -116,7 +116,7 @@ void CRecompilerOps::Compile_Branch (CRecompilerOps::BranchFunction CompareFunc,
if (Link) {
UnMap_GPR( 31, FALSE);
m_RegWorkingSet.SetMipsRegLo(31,m_CompilePC + 8);
m_RegWorkingSet.SetMipsRegState(31,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(31,CRegInfo::STATE_CONST_32_SIGN);
}
if (EffectDelaySlot) {
if ((m_CompilePC & 0xFFC) != 0xFFC)
@ -348,7 +348,7 @@ void CRecompilerOps::Compile_BranchLikely (BranchFunction CompareFunc, BOOL Link
{
UnMap_GPR( 31, FALSE);
m_RegWorkingSet.SetMipsRegLo(31, m_CompilePC + 8);
m_RegWorkingSet.SetMipsRegState(31,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(31,CRegInfo::STATE_CONST_32_SIGN);
}
CompareFunc();
ResetX86Protection();
@ -1410,7 +1410,7 @@ void CRecompilerOps::ADDI (void) {
if (IsConst(m_Opcode.rs)) {
if (IsMapped(m_Opcode.rt)) { UnMap_GPR(m_Opcode.rt, FALSE); }
m_RegWorkingSet.SetMipsRegLo(m_Opcode.rt, GetMipsRegLo(m_Opcode.rs) + (short)m_Opcode.immediate);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rt,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rt,CRegInfo::STATE_CONST_32_SIGN);
} else {
Map_GPR_32bit(m_Opcode.rt,TRUE,m_Opcode.rs);
AddConstToX86Reg(GetMipsRegMapLo(m_Opcode.rt),(short)m_Opcode.immediate);
@ -1437,7 +1437,7 @@ void CRecompilerOps::ADDIU (void) {
if (IsConst(m_Opcode.rs)) {
if (IsMapped(m_Opcode.rt)) { UnMap_GPR(m_Opcode.rt, FALSE); }
m_RegWorkingSet.SetMipsRegLo(m_Opcode.rt, GetMipsRegLo(m_Opcode.rs) + (short)m_Opcode.immediate);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rt,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rt,CRegInfo::STATE_CONST_32_SIGN);
} else {
Map_GPR_32bit(m_Opcode.rt,TRUE,m_Opcode.rs);
AddConstToX86Reg(GetMipsRegMapLo(m_Opcode.rt),(short)m_Opcode.immediate);
@ -1458,7 +1458,7 @@ void CRecompilerOps::SLTIU (void) {
DWORD Result = Is64Bit(m_Opcode.rs) ? GetMipsReg(m_Opcode.rs) < ((unsigned)((__int64)((short)m_Opcode.immediate)))?1:0 :
GetMipsRegLo(m_Opcode.rs) < ((unsigned)((short)m_Opcode.immediate))?1:0;
UnMap_GPR(m_Opcode.rt, FALSE);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rt,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rt,CRegInfo::STATE_CONST_32_SIGN);
m_RegWorkingSet.SetMipsRegLo(m_Opcode.rt,Result);
} else if (IsMapped(m_Opcode.rs)) {
if (Is64Bit(m_Opcode.rs)) {
@ -1518,7 +1518,7 @@ void CRecompilerOps::SLTI (void)
( GetMipsRegLo_S(m_Opcode.rs) < (short)m_Opcode.immediate?1:0);
UnMap_GPR(m_Opcode.rt, FALSE);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rt,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rt,CRegInfo::STATE_CONST_32_SIGN);
m_RegWorkingSet.SetMipsRegLo(m_Opcode.rt,Result);
} else if (IsMapped(m_Opcode.rs)) {
if (Is64Bit(m_Opcode.rs)) {
@ -1600,7 +1600,7 @@ void CRecompilerOps::ANDI (void) {
if (IsConst(m_Opcode.rs)) {
if (IsMapped(m_Opcode.rt)) { UnMap_GPR(m_Opcode.rt, FALSE); }
m_RegWorkingSet.SetMipsRegState(m_Opcode.rt,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rt,CRegInfo::STATE_CONST_32_SIGN);
m_RegWorkingSet.SetMipsRegLo(m_Opcode.rt, GetMipsRegLo(m_Opcode.rs) & m_Opcode.immediate);
} else if (m_Opcode.immediate != 0) {
Map_GPR_32bit(m_Opcode.rt,FALSE,m_Opcode.rs);
@ -1690,7 +1690,7 @@ void CRecompilerOps::LUI (void) {
UnMap_GPR(m_Opcode.rt, FALSE);
m_RegWorkingSet.SetMipsRegLo(m_Opcode.rt, ((short)m_Opcode.offset << 16));
m_RegWorkingSet.SetMipsRegState(m_Opcode.rt,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rt,CRegInfo::STATE_CONST_32_SIGN);
}
void CRecompilerOps::DADDIU (void) {
@ -1760,7 +1760,7 @@ void CRecompilerOps::SPECIAL_SLL (void) {
if (IsConst(m_Opcode.rt)) {
if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); }
m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd, GetMipsRegLo(m_Opcode.rt) << m_Opcode.sa);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32_SIGN);
return;
}
if (m_Opcode.rd != m_Opcode.rt && IsMapped(m_Opcode.rt)) {
@ -1800,7 +1800,7 @@ void CRecompilerOps::SPECIAL_SRL (void) {
if (IsConst(m_Opcode.rt)) {
if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); }
m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd, GetMipsRegLo(m_Opcode.rt) >> m_Opcode.sa);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32_SIGN);
return;
}
Map_GPR_32bit(m_Opcode.rd,TRUE,m_Opcode.rt);
@ -1814,7 +1814,7 @@ void CRecompilerOps::SPECIAL_SRA (void) {
if (IsConst(m_Opcode.rt)) {
if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); }
m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd, GetMipsRegLo_S(m_Opcode.rt) >> m_Opcode.sa);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32_SIGN);
return;
}
Map_GPR_32bit(m_Opcode.rd,TRUE,m_Opcode.rt);
@ -1830,7 +1830,7 @@ void CRecompilerOps::SPECIAL_SLLV (void) {
if (IsConst(m_Opcode.rt)) {
if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); }
m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd, GetMipsRegLo(m_Opcode.rt) << Shift);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32_SIGN);
} else {
Map_GPR_32bit(m_Opcode.rd,TRUE,m_Opcode.rt);
ShiftLeftSignImmed(GetMipsRegMapLo(m_Opcode.rd),(BYTE)Shift);
@ -1852,7 +1852,7 @@ void CRecompilerOps::SPECIAL_SRLV (void) {
if (IsConst(m_Opcode.rt)) {
if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); }
m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd, GetMipsRegLo(m_Opcode.rt) >> Shift);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32_SIGN);
return;
}
Map_GPR_32bit(m_Opcode.rd,TRUE,m_Opcode.rt);
@ -1874,7 +1874,7 @@ void CRecompilerOps::SPECIAL_SRAV (void) {
if (IsConst(m_Opcode.rt)) {
if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); }
m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd, GetMipsRegLo_S(m_Opcode.rt) >> Shift);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32_SIGN);
return;
}
Map_GPR_32bit(m_Opcode.rd,TRUE,m_Opcode.rt);
@ -1962,7 +1962,7 @@ void CRecompilerOps::SPECIAL_JALR (void)
}
UnMap_GPR( m_Opcode.rd, FALSE);
m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd,m_CompilePC + 8);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32_SIGN);
if ((m_CompilePC & 0xFFC) == 0xFFC)
{
if (IsMapped(m_Opcode.rs)) {
@ -2139,9 +2139,9 @@ void CRecompilerOps::SPECIAL_DSRLV (void) {
m_RegWorkingSet.SetMipsReg(m_Opcode.rd, Is64Bit(m_Opcode.rt)?GetMipsReg(m_Opcode.rt):(__int64)GetMipsRegLo_S(m_Opcode.rt));
m_RegWorkingSet.SetMipsReg(m_Opcode.rd, GetMipsReg(m_Opcode.rd) >> Shift);
if ((GetMipsRegHi(m_Opcode.rd) == 0) && (GetMipsRegLo(m_Opcode.rd) & 0x80000000) == 0) {
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32_SIGN);
} else if ((GetMipsRegHi(m_Opcode.rd) == 0xFFFFFFFF) && (GetMipsRegLo(m_Opcode.rd) & 0x80000000) != 0) {
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32_SIGN);
} else {
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_64);
}
@ -2508,7 +2508,7 @@ void CRecompilerOps::SPECIAL_ADD (void) {
DWORD temp = GetMipsRegLo(source1) + GetMipsRegLo(source2);
if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); }
m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd,temp);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32_SIGN);
return;
}
@ -2537,7 +2537,7 @@ void CRecompilerOps::SPECIAL_ADDU (void) {
DWORD temp = GetMipsRegLo(source1) + GetMipsRegLo(source2);
if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); }
m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd,temp);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32_SIGN);
return;
}
@ -2563,7 +2563,7 @@ void CRecompilerOps::SPECIAL_SUB (void) {
DWORD temp = GetMipsRegLo(m_Opcode.rs) - GetMipsRegLo(m_Opcode.rt);
if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); }
m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd,temp);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32_SIGN);
} else {
if (m_Opcode.rd == m_Opcode.rt) {
x86Reg Reg = Map_TempReg(x86_Any,m_Opcode.rt,FALSE);
@ -2594,7 +2594,7 @@ void CRecompilerOps::SPECIAL_SUBU (void) {
DWORD temp = GetMipsRegLo(m_Opcode.rs) - GetMipsRegLo(m_Opcode.rt);
if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); }
m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd,temp);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32_SIGN);
} else {
if (m_Opcode.rd == m_Opcode.rt) {
x86Reg Reg = Map_TempReg(x86_Any,m_Opcode.rt,FALSE);
@ -2631,15 +2631,15 @@ void CRecompilerOps::SPECIAL_AND (void)
);
if (GetMipsRegLo_S(m_Opcode.rd) < 0 && GetMipsRegHi_S(m_Opcode.rd) == -1){
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32_SIGN);
} else if (GetMipsRegLo_S(m_Opcode.rd) >= 0 && GetMipsRegHi_S(m_Opcode.rd) == 0){
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32_SIGN);
} else {
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_64);
}
} else {
m_RegWorkingSet.SetMipsReg(m_Opcode.rd, GetMipsRegLo(m_Opcode.rt) & GetMipsReg(m_Opcode.rs));
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32_SIGN);
}
} else if (IsMapped(m_Opcode.rt) && IsMapped(m_Opcode.rs)) {
int source1 = m_Opcode.rd == m_Opcode.rt?m_Opcode.rt:m_Opcode.rs;
@ -2769,15 +2769,15 @@ void CRecompilerOps::SPECIAL_OR (void) {
(Is64Bit(m_Opcode.rs)?GetMipsReg(m_Opcode.rs):(__int64)GetMipsRegLo_S(m_Opcode.rs))
);
if (GetMipsRegLo_S(m_Opcode.rd) < 0 && GetMipsRegHi_S(m_Opcode.rd) == -1){
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32_SIGN);
} else if (GetMipsRegLo_S(m_Opcode.rd) >= 0 && GetMipsRegHi_S(m_Opcode.rd) == 0){
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32_SIGN);
} else {
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_64);
}
} else {
m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd, GetMipsRegLo(m_Opcode.rt) | GetMipsRegLo(m_Opcode.rs));
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32_SIGN);
}
} else if (IsMapped(m_Opcode.rt) && IsMapped(m_Opcode.rs)) {
int source1 = m_Opcode.rd == m_Opcode.rt?m_Opcode.rt:m_Opcode.rs;
@ -2881,7 +2881,7 @@ void CRecompilerOps::SPECIAL_XOR (void) {
if (m_Opcode.rt == m_Opcode.rs) {
UnMap_GPR( m_Opcode.rd, FALSE);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32_SIGN);
m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd, 0);
return;
}
@ -2892,7 +2892,7 @@ void CRecompilerOps::SPECIAL_XOR (void) {
if (bHaveDebugger()) { g_Notify->DisplayError("XOR 1"); }
CRecompilerOps::UnknownOpcode();
} else {
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32_SIGN);
m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd, GetMipsRegLo(m_Opcode.rt) ^ GetMipsRegLo(m_Opcode.rs));
}
} else if (IsMapped(m_Opcode.rt) && IsMapped(m_Opcode.rs)) {
@ -2997,15 +2997,15 @@ void CRecompilerOps::SPECIAL_NOR (void) {
(Is64Bit(m_Opcode.rs)?GetMipsReg(m_Opcode.rs):(__int64)GetMipsRegLo_S(m_Opcode.rs)))
);
if (GetMipsRegLo_S(m_Opcode.rd) < 0 && GetMipsRegHi_S(m_Opcode.rd) == -1){
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32_SIGN);
} else if (GetMipsRegLo_S(m_Opcode.rd) >= 0 && GetMipsRegHi_S(m_Opcode.rd) == 0){
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32_SIGN);
} else {
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_64);
}
} else {
m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd,~(GetMipsRegLo(m_Opcode.rt) | GetMipsRegLo(m_Opcode.rs)));
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32_SIGN);
}
} else if (IsMapped(m_Opcode.rt) && IsMapped(m_Opcode.rs)) {
int source1 = m_Opcode.rd == m_Opcode.rt?m_Opcode.rt:m_Opcode.rs;
@ -3118,7 +3118,7 @@ void CRecompilerOps::SPECIAL_SLT (void) {
CRecompilerOps::UnknownOpcode();
} else {
if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); }
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32_SIGN);
if (GetMipsRegLo_S(m_Opcode.rs) < GetMipsRegLo_S(m_Opcode.rt)) {
m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd,1);
} else {
@ -3351,7 +3351,7 @@ void CRecompilerOps::SPECIAL_SLTU (void) {
CRecompilerOps::UnknownOpcode();
} else {
if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); }
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32_SIGN);
if (GetMipsRegLo(m_Opcode.rs) < GetMipsRegLo(m_Opcode.rt)) {
m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd,1);
} else {
@ -3567,9 +3567,9 @@ void CRecompilerOps::SPECIAL_DADD (void) {
Is64Bit(m_Opcode.rt)?GetMipsReg(m_Opcode.rt):(__int64)GetMipsRegLo_S(m_Opcode.rt)
);
if (GetMipsRegLo_S(m_Opcode.rd) < 0 && GetMipsRegHi_S(m_Opcode.rd) == -1){
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32_SIGN);
} else if (GetMipsRegLo_S(m_Opcode.rd) >= 0 && GetMipsRegHi_S(m_Opcode.rd) == 0){
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32_SIGN);
} else {
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_64);
}
@ -3603,9 +3603,9 @@ void CRecompilerOps::SPECIAL_DADDU (void) {
if (IsMapped(m_Opcode.rd)) { UnMap_GPR(m_Opcode.rd, FALSE); }
m_RegWorkingSet.SetMipsReg(m_Opcode.rd, ValRs + ValRt);
if ((GetMipsRegHi(m_Opcode.rd) == 0) && (GetMipsRegLo(m_Opcode.rd) & 0x80000000) == 0) {
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32_SIGN);
} else if ((GetMipsRegHi(m_Opcode.rd) == 0xFFFFFFFF) && (GetMipsRegLo(m_Opcode.rd) & 0x80000000) != 0) {
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32_SIGN);
} else {
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_64);
}
@ -3640,9 +3640,9 @@ void CRecompilerOps::SPECIAL_DSUB (void) {
Is64Bit(m_Opcode.rt)?GetMipsReg(m_Opcode.rt):(__int64)GetMipsRegLo_S(m_Opcode.rt)
);
if (GetMipsRegLo_S(m_Opcode.rd) < 0 && GetMipsRegHi_S(m_Opcode.rd) == -1){
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32_SIGN);
} else if (GetMipsRegLo_S(m_Opcode.rd) >= 0 && GetMipsRegHi_S(m_Opcode.rd) == 0){
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32_SIGN);
} else {
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_64);
}
@ -3683,9 +3683,9 @@ void CRecompilerOps::SPECIAL_DSUBU (void) {
Is64Bit(m_Opcode.rt)?GetMipsReg(m_Opcode.rt):(__int64)GetMipsRegLo_S(m_Opcode.rt)
);
if (GetMipsRegLo_S(m_Opcode.rd) < 0 && GetMipsRegHi_S(m_Opcode.rd) == -1){
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32_SIGN);
} else if (GetMipsRegLo_S(m_Opcode.rd) >= 0 && GetMipsRegHi_S(m_Opcode.rd) == 0){
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32_SIGN);
} else {
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_64);
}
@ -3726,9 +3726,9 @@ void CRecompilerOps::SPECIAL_DSLL (void) {
__int64 Value = Is64Bit(m_Opcode.rt)?GetMipsReg_S(m_Opcode.rt):(__int64)GetMipsRegLo_S(m_Opcode.rt);
m_RegWorkingSet.SetMipsReg(m_Opcode.rd, Value << m_Opcode.sa);
if (GetMipsRegLo_S(m_Opcode.rd) < 0 && GetMipsRegHi_S(m_Opcode.rd) == -1){
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32_SIGN);
} else if (GetMipsRegLo_S(m_Opcode.rd) >= 0 && GetMipsRegHi_S(m_Opcode.rd) == 0){
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32_SIGN);
} else {
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_64);
}
@ -3751,9 +3751,9 @@ void CRecompilerOps::SPECIAL_DSRL (void) {
__int64 Value = Is64Bit(m_Opcode.rt)?GetMipsReg_S(m_Opcode.rt):(__int64)GetMipsRegLo_S(m_Opcode.rt);
m_RegWorkingSet.SetMipsReg(m_Opcode.rd,Value >> m_Opcode.sa);
if (GetMipsRegLo_S(m_Opcode.rd) < 0 && GetMipsRegHi_S(m_Opcode.rd) == -1){
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32_SIGN);
} else if (GetMipsRegLo_S(m_Opcode.rd) >= 0 && GetMipsRegHi_S(m_Opcode.rd) == 0){
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32_SIGN);
} else {
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_64);
}
@ -3775,9 +3775,9 @@ void CRecompilerOps::SPECIAL_DSRA (void) {
__int64 Value = Is64Bit(m_Opcode.rt)?GetMipsReg_S(m_Opcode.rt):(__int64)GetMipsRegLo_S(m_Opcode.rt);
m_RegWorkingSet.SetMipsReg_S(m_Opcode.rd, Value >> m_Opcode.sa);
if (GetMipsRegLo_S(m_Opcode.rd) < 0 && GetMipsRegHi_S(m_Opcode.rd) == -1){
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32_SIGN);
} else if (GetMipsRegLo_S(m_Opcode.rd) >= 0 && GetMipsRegHi_S(m_Opcode.rd) == 0){
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32_SIGN);
} else {
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_64);
}
@ -3797,9 +3797,9 @@ void CRecompilerOps::SPECIAL_DSLL32 (void) {
m_RegWorkingSet.SetMipsRegHi(m_Opcode.rd,GetMipsRegLo(m_Opcode.rt) << m_Opcode.sa);
m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd,0);
if (GetMipsRegLo_S(m_Opcode.rd) < 0 && GetMipsRegHi_S(m_Opcode.rd) == -1){
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32_SIGN);
} else if (GetMipsRegLo_S(m_Opcode.rd) >= 0 && GetMipsRegHi_S(m_Opcode.rd) == 0){
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32_SIGN);
} else {
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_64);
}
@ -3834,7 +3834,7 @@ void CRecompilerOps::SPECIAL_DSRL32 (void) {
if (IsConst(m_Opcode.rt)) {
if (m_Opcode.rt != m_Opcode.rd) { UnMap_GPR(m_Opcode.rd, FALSE); }
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32_ZERO);
m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd, (DWORD)(GetMipsReg(m_Opcode.rt) >> (m_Opcode.sa + 32)));
} else if (IsMapped(m_Opcode.rt)) {
ProtectGPR(m_Opcode.rt);
@ -3869,7 +3869,7 @@ void CRecompilerOps::SPECIAL_DSRA32 (void) {
if (IsConst(m_Opcode.rt)) {
if (m_Opcode.rt != m_Opcode.rd) { UnMap_GPR(m_Opcode.rd, FALSE); }
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32);
m_RegWorkingSet.SetMipsRegState(m_Opcode.rd,CRegInfo::STATE_CONST_32_SIGN);
m_RegWorkingSet.SetMipsRegLo(m_Opcode.rd,(DWORD)(GetMipsReg_S(m_Opcode.rt) >> (m_Opcode.sa + 32)));
} else if (IsMapped(m_Opcode.rt)) {
ProtectGPR(m_Opcode.rt);

67
Source/Project64/N64 System/Recompiler/Reg Info.cpp
View File

@ -20,7 +20,7 @@ CRegInfo::CRegInfo ( void ) :
m_Fpu_Used(false),
m_RoundingModel(RoundUnknown)
{
m_MIPS_RegState[0] = STATE_CONST_32;
m_MIPS_RegState[0] = STATE_CONST_32_SIGN;
m_MIPS_RegVal[0].DW = 0;
m_RegMapLo[0] = x86_Unknown;
m_RegMapHi[0] = x86_Unknown;
@ -128,8 +128,8 @@ bool CRegInfo::operator!=(const CRegInfo& right) const
CRegInfo::REG_STATE CRegInfo::ConstantsType (__int64 Value)
{
if (((Value >> 32) == -1) && ((Value & 0x80000000) != 0)) { return STATE_CONST_32; }
if (((Value >> 32) == 0) && ((Value & 0x80000000) == 0)) { return STATE_CONST_32; }
if (((Value >> 32) == -1) && ((Value & 0x80000000) != 0)) { return STATE_CONST_32_SIGN; }
if (((Value >> 32) == 0) && ((Value & 0x80000000) == 0)) { return STATE_CONST_32_SIGN; }
return STATE_CONST_64;
}
@ -1131,8 +1131,8 @@ void CRegInfo::WriteBackRegisters ()
UnMap_AllFPRs();
int count;
BOOL bEdiZero = FALSE;
BOOL bEsiSign = FALSE;
bool bEdiZero = FALSE;
bool bEsiSign = FALSE;
int X86RegCount = sizeof(x86_Registers)/ sizeof(x86_Registers[0]);
for (int i = 0; i < X86RegCount; i++) { SetX86Protected(x86_Registers[i],FALSE); }
@ -1143,25 +1143,31 @@ void CRegInfo::WriteBackRegisters ()
for (count = 1; count < 32; count ++) {
switch (GetMipsRegState(count)) {
case CRegInfo::STATE_UNKNOWN: break;
case CRegInfo::STATE_CONST_32:
case CRegInfo::STATE_CONST_32_SIGN:
if (!g_System->b32BitCore())
{
if (!bEdiZero && (!GetMipsRegLo(count) || !(GetMipsRegLo(count) & 0x80000000))) {
if (!bEdiZero && (!GetMipsRegLo(count) || !(GetMipsRegLo(count) & 0x80000000)))
{
XorX86RegToX86Reg(x86_EDI, x86_EDI);
bEdiZero = TRUE;
}
if (!bEsiSign && (GetMipsRegLo(count) & 0x80000000)) {
if (!bEsiSign && (GetMipsRegLo(count) & 0x80000000))
{
MoveConstToX86reg(0xFFFFFFFF, x86_ESI);
bEsiSign = TRUE;
}
if ((GetMipsRegLo(count) & 0x80000000) != 0) {
if ((GetMipsRegLo(count) & 0x80000000) != 0)
{
MoveX86regToVariable(x86_ESI,&_GPR[count].UW[1],CRegName::GPR_Hi[count]);
} else {
}
else
{
MoveX86regToVariable(x86_EDI,&_GPR[count].UW[1],CRegName::GPR_Hi[count]);
}
}
if (GetMipsRegLo(count) == 0) {
if (GetMipsRegLo(count) == 0)
{
if (g_System->b32BitCore())
{
if (!bEdiZero)
@ -1171,7 +1177,9 @@ void CRegInfo::WriteBackRegisters ()
}
}
MoveX86regToVariable(x86_EDI,&_GPR[count].UW[0],CRegName::GPR_Lo[count]);
} else if (GetMipsRegLo(count) == 0xFFFFFFFF) {
}
else if (GetMipsRegLo(count) == 0xFFFFFFFF)
{
if (g_System->b32BitCore())
{
if (!bEsiSign)
@ -1181,8 +1189,41 @@ void CRegInfo::WriteBackRegisters ()
}
}
MoveX86regToVariable(x86_ESI,&_GPR[count].UW[0],CRegName::GPR_Lo[count]);
} else
}
else
{
MoveConstToVariable(GetMipsRegLo(count),&_GPR[count].UW[0],CRegName::GPR_Lo[count]);
}
SetMipsRegState(count, CRegInfo::STATE_UNKNOWN);
break;
case CRegInfo::STATE_CONST_32_ZERO:
if (!g_System->b32BitCore())
{
if (!bEdiZero)
{
XorX86RegToX86Reg(x86_EDI, x86_EDI);
bEdiZero = TRUE;
}
MoveX86regToVariable(x86_EDI,&_GPR[count].UW[1],CRegName::GPR_Hi[count]);
}
if (GetMipsRegLo(count) == 0)
{
if (g_System->b32BitCore())
{
if (!bEdiZero)
{
XorX86RegToX86Reg(x86_EDI, x86_EDI);
bEdiZero = TRUE;
}
}
MoveX86regToVariable(x86_EDI,&_GPR[count].UW[0],CRegName::GPR_Lo[count]);
}
else
{
MoveConstToVariable(GetMipsRegLo(count),&_GPR[count].UW[0],CRegName::GPR_Lo[count]);
}
SetMipsRegState(count, CRegInfo::STATE_UNKNOWN);
break;

3
Source/Project64/N64 System/Recompiler/Reg Info.h
View File

@ -29,7 +29,8 @@ public:
STATE_MAPPED_32_ZERO = (STATE_KNOWN_VALUE | STATE_X86_MAPPED | STATE_32BIT), // = 11
STATE_MAPPED_32_SIGN = (STATE_KNOWN_VALUE | STATE_X86_MAPPED | STATE_32BIT | STATE_SIGN), // = 15
STATE_CONST_32 = (STATE_KNOWN_VALUE | STATE_32BIT | STATE_SIGN), // = 13
STATE_CONST_32_ZERO = (STATE_KNOWN_VALUE | STATE_32BIT), // = 9
STATE_CONST_32_SIGN = (STATE_KNOWN_VALUE | STATE_32BIT | STATE_SIGN), // = 13
STATE_CONST_64 = (STATE_KNOWN_VALUE), // = 1
};

2
Source/Project64/N64 System/Recompiler/Section Info.cpp
View File

@ -144,7 +144,7 @@ void CRegInfo::Initilize ( void )
{
int count;
MIPS_RegState[0] = STATE_CONST_32;
MIPS_RegState[0] = STATE_CONST_32_SIGN;
MIPS_RegVal[0].DW = 0;
for (count = 1; count < 32; count ++ ) {
MIPS_RegState[count] = STATE_UNKNOWN;