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SPU2ghz: Fixed serious bug in AutoDMA code, basically it wasn't working at all. Soul Calibur II audio works now, and possibly many other games fixed too. 

git-svn-id: http://pcsx2-playground.googlecode.com/svn/trunk@276 a6443dda-0b58-4228-96e9-037be469359c
This commit is contained in:
Jake.Stine 2008-11-02 16:44:54 +00:00 committed by Gregory Hainaut
parent 09c0225740
commit aa48345c70
3 changed files with 13 additions and 8 deletions
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2
plugins/spu2ghz/config.h
View File

@ -42,7 +42,7 @@ static __forceinline bool MsgToConsole() { return _MsgToConsole & DebugEnabled;
static __forceinline bool MsgKeyOnOff() { return _MsgKeyOnOff & MsgToConsole(); }
static __forceinline bool MsgVoiceOff() { return _MsgVoiceOff & MsgToConsole(); }
static __forceinline bool MsgDMA() { return _MsgDMA & MsgToConsole(); }
static __forceinline bool MsgAutoDMA() { return _MsgAutoDMA & MsgToConsole(); }
static __forceinline bool MsgAutoDMA() { return _MsgAutoDMA & MsgDMA(); }
static __forceinline bool MsgOverruns() { return _MsgOverruns & MsgToConsole(); }
static __forceinline bool MsgCache() { return _MsgCache & MsgToConsole(); }

11
plugins/spu2ghz/dma.cpp
View File

@ -193,15 +193,20 @@ void DoDMAWrite(int core,u16 *pMem,u32 size)
{
// Perform an alignment check.
// Not really important. Everythign should work regardless,
// Not really important. Everything should work regardless,
// but it could be indicative of an emulation foopah elsewhere.
uptr pa = ((uptr)pMem)&7;
uptr pm = Cores[core].TSA&0x7;
if(pa || pm)
if( pa )
{
fprintf(stderr, "* SPU2 : Missaligned addr in DMA write!\n");
fprintf(stderr, "* SPU2 DMA Write > Missaligned SOURCE! Core: %d TSA: 0x%x TDA: 0x%x Size: 0x%x\n", core, Cores[core].TSA, Cores[core].TDA, size);
}
if( pm )
{
fprintf(stderr, "* SPU2 DMA Write > Missaligned TARGET! Core: %d TSA: 0x%x TDA: 0x%x Size: 0x%x\n", core, Cores[core].TSA, Cores[core].TDA, size );
}
}

8
plugins/spu2ghz/spu2.cpp
View File

@ -695,7 +695,7 @@ void __fastcall TimeUpdate(u32 cClocks, u32 syncType)
//Update DMA4 interrupt delay counter
if(Cores[0].DMAICounter>0)
{
Cores[0].DMAICounter-=TickInterval;
Cores[0].DMAICounter-=1;
if(Cores[0].DMAICounter<=0)
{
Cores[0].MADR=Cores[0].TADR;
@ -703,14 +703,14 @@ void __fastcall TimeUpdate(u32 cClocks, u32 syncType)
if(dma4callback) dma4callback();
}
else {
Cores[0].MADR+=TickInterval<<1;
Cores[0].MADR+=2;
}
}
//Update DMA7 interrupt delay counter
if(Cores[1].DMAICounter>0)
{
Cores[1].DMAICounter-=TickInterval;
Cores[1].DMAICounter-=1;
if(Cores[1].DMAICounter<=0)
{
Cores[1].MADR=Cores[1].TADR;
@ -718,7 +718,7 @@ void __fastcall TimeUpdate(u32 cClocks, u32 syncType)
if(dma7callback) dma7callback();
}
else {
Cores[1].MADR+=TickInterval<<1;
Cores[1].MADR+=2;
}
}