diff --git a/plugins/spu2ghz/config.h b/plugins/spu2ghz/config.h index 082df50474..27b5722b05 100644 --- a/plugins/spu2ghz/config.h +++ b/plugins/spu2ghz/config.h @@ -42,7 +42,7 @@ static __forceinline bool MsgToConsole() { return _MsgToConsole & DebugEnabled; static __forceinline bool MsgKeyOnOff() { return _MsgKeyOnOff & MsgToConsole(); } static __forceinline bool MsgVoiceOff() { return _MsgVoiceOff & MsgToConsole(); } static __forceinline bool MsgDMA() { return _MsgDMA & MsgToConsole(); } -static __forceinline bool MsgAutoDMA() { return _MsgAutoDMA & MsgToConsole(); } +static __forceinline bool MsgAutoDMA() { return _MsgAutoDMA & MsgDMA(); } static __forceinline bool MsgOverruns() { return _MsgOverruns & MsgToConsole(); } static __forceinline bool MsgCache() { return _MsgCache & MsgToConsole(); } diff --git a/plugins/spu2ghz/dma.cpp b/plugins/spu2ghz/dma.cpp index 69eccd41c6..e8ea61efd9 100644 --- a/plugins/spu2ghz/dma.cpp +++ b/plugins/spu2ghz/dma.cpp @@ -193,15 +193,20 @@ void DoDMAWrite(int core,u16 *pMem,u32 size) { // Perform an alignment check. - // Not really important. Everythign should work regardless, + // Not really important. Everything should work regardless, // but it could be indicative of an emulation foopah elsewhere. uptr pa = ((uptr)pMem)&7; uptr pm = Cores[core].TSA&0x7; - if(pa || pm) + if( pa ) { - fprintf(stderr, "* SPU2 : Missaligned addr in DMA write!\n"); + fprintf(stderr, "* SPU2 DMA Write > Missaligned SOURCE! Core: %d TSA: 0x%x TDA: 0x%x Size: 0x%x\n", core, Cores[core].TSA, Cores[core].TDA, size); + } + + if( pm ) + { + fprintf(stderr, "* SPU2 DMA Write > Missaligned TARGET! Core: %d TSA: 0x%x TDA: 0x%x Size: 0x%x\n", core, Cores[core].TSA, Cores[core].TDA, size ); } } diff --git a/plugins/spu2ghz/spu2.cpp b/plugins/spu2ghz/spu2.cpp index cd582bfdef..e60f338ec6 100644 --- a/plugins/spu2ghz/spu2.cpp +++ b/plugins/spu2ghz/spu2.cpp @@ -695,7 +695,7 @@ void __fastcall TimeUpdate(u32 cClocks, u32 syncType) //Update DMA4 interrupt delay counter if(Cores[0].DMAICounter>0) { - Cores[0].DMAICounter-=TickInterval; + Cores[0].DMAICounter-=1; if(Cores[0].DMAICounter<=0) { Cores[0].MADR=Cores[0].TADR; @@ -703,14 +703,14 @@ void __fastcall TimeUpdate(u32 cClocks, u32 syncType) if(dma4callback) dma4callback(); } else { - Cores[0].MADR+=TickInterval<<1; + Cores[0].MADR+=2; } } //Update DMA7 interrupt delay counter if(Cores[1].DMAICounter>0) { - Cores[1].DMAICounter-=TickInterval; + Cores[1].DMAICounter-=1; if(Cores[1].DMAICounter<=0) { Cores[1].MADR=Cores[1].TADR; @@ -718,7 +718,7 @@ void __fastcall TimeUpdate(u32 cClocks, u32 syncType) if(dma7callback) dma7callback(); } else { - Cores[1].MADR+=TickInterval<<1; + Cores[1].MADR+=2; } }