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microVU: fixed a bug in the Jump opcodes. this probably fixes a lot of problems in games (grandia 3 intro works properly now, ffxii shows more stuff in-game, etc...) 

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@1178 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
cottonvibes 2009-05-14 08:56:50 +00:00
parent b3bdaab4f0
commit 40447aabc1
2 changed files with 6 additions and 9 deletions
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5
pcsx2/x86/microVU.h
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@ -109,9 +109,8 @@ struct microVU {
u32 branch; // Holds branch compare result (IBxx) OR Holds address to Jump to (JALR/JR) u32 branch; // Holds branch compare result (IBxx) OR Holds address to Jump to (JALR/JR)
u32 p; // Holds current P instance index u32 p; // Holds current P instance index
u32 q; // Holds current Q instance index u32 q; // Holds current Q instance index
u32 espBackup; // Temp Backup for ESP u32 totalCycles; // Total Cycles that mVU is expected to run for
u32 totalCycles; u32 cycles; // Cycles Counter
u32 cycles;
PCSX2_ALIGNED16(u32 macFlag[4]); // 4 instances of mac flag (used in execution) PCSX2_ALIGNED16(u32 macFlag[4]); // 4 instances of mac flag (used in execution)
PCSX2_ALIGNED16(u32 clipFlag[4]); // 4 instances of clip flag (used in execution) PCSX2_ALIGNED16(u32 clipFlag[4]); // 4 instances of clip flag (used in execution)

10
pcsx2/x86/microVU_Lower.inl
View File

@ -1225,10 +1225,9 @@ microVUf(void) mVU_IBNE() {
microVUf(void) mVU_JR() { microVUf(void) mVU_JR() {
microVU* mVU = mVUx; microVU* mVU = mVUx;
mVUbranch = 9; mVUbranch = 9;
pass1 { mVUanalyzeBranch1<vuIndex>(_Is_); } pass1 { analyzeVIreg1(_Is_); }
pass2 { pass2 {
if (memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup[0]); mVUallocVIa<vuIndex>(gprT1, _Is_);
else mVUallocVIa<vuIndex>(gprT1, _Is_);
SHL32ItoR(gprT1, 3); SHL32ItoR(gprT1, 3);
AND32ItoR(gprT1, vuIndex ? 0x3ff8 : 0xff8); AND32ItoR(gprT1, vuIndex ? 0x3ff8 : 0xff8);
MOV32RtoM((uptr)&mVU->branch, gprT1); MOV32RtoM((uptr)&mVU->branch, gprT1);
@ -1239,10 +1238,9 @@ microVUf(void) mVU_JR() {
microVUf(void) mVU_JALR() { microVUf(void) mVU_JALR() {
microVU* mVU = mVUx; microVU* mVU = mVUx;
mVUbranch = 10; mVUbranch = 10;
pass1 { mVUanalyzeBranch1<vuIndex>(_Is_); analyzeVIreg2(_It_, 1); } pass1 { analyzeVIreg1(_Is_); analyzeVIreg2(_It_, 1); }
pass2 { pass2 {
if (memReadIs) MOV32MtoR(gprT1, (uptr)&mVU->VIbackup[0]); mVUallocVIa<vuIndex>(gprT1, _Is_);
else mVUallocVIa<vuIndex>(gprT1, _Is_);
SHL32ItoR(gprT1, 3); SHL32ItoR(gprT1, 3);
AND32ItoR(gprT1, vuIndex ? 0x3ff8 : 0xff8); AND32ItoR(gprT1, vuIndex ? 0x3ff8 : 0xff8);
MOV32RtoM((uptr)&mVU->branch, gprT1); MOV32RtoM((uptr)&mVU->branch, gprT1);