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microVU: fixed a regression from r4940 that refraction caught when reviewing changes for a bug report. Might fix line of sight in MGS2 (the reported bug)? Might have something to do with the ace combat (forget which) collision detection? Might fix nothing but I'm pretty sure this is correct now. 

git-svn-id: http://pcsx2.googlecode.com/svn/trunk@5229 96395faa-99c1-11dd-bbfe-3dabce05a288
This commit is contained in:
sudonim1@gmail.com 2012-05-25 16:23:44 +00:00
parent 2a49700977
commit 1b099aedd1
4 changed files with 13 additions and 39 deletions
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41
pcsx2/x86/microVU_Alloc.inl
View File

@ -71,37 +71,20 @@ __ri void mVUallocSFLAGc(const x32& reg, const x32& regT, int fInstance)
}
// Denormalizes Status Flag
// If setAllflags is false, then returns result in eax (gprT1)
// else all microVU flag regs (gprF0..F3) get the result.
__ri void mVUallocSFLAGd(u32* memAddr, bool setAllflags) {
__ri void mVUallocSFLAGd(u32* memAddr) {
xMOV(edx, ptr32[memAddr]);
xMOV(eax, edx);
xSHR(eax, 3);
xAND(eax, 0x18);
// When this function is used by mVU0 macro the EErec
// needs EBP (gprF1) and ESI (gprF2) to be preserved.
const xAddressReg& t0 = setAllflags ? gprT1 : gprF3;
const xAddressReg& t1 = setAllflags ? gprT2 : gprF2;
const xAddressReg& t2 = setAllflags ? gprT3 : gprF0;
xMOV(ecx, edx);
xSHL(ecx, 11);
xAND(ecx, 0x1800);
xOR (eax, ecx);
xMOV(t2, ptr32[memAddr]);
xMOV(t0, t2);
xSHR(t0, 3);
xAND(t0, 0x18);
xMOV(t1, t2);
xSHL(t1, 11);
xAND(t1, 0x1800);
xOR (t0, t1);
xSHL(t2, 14);
xAND(t2, 0x3cf0000);
xOR (t0, t2);
if (setAllflags) {
// this code should be run in mVU micro mode only, so writing to
// EBP (gprF1) and ESI (gprF2) is ok (and needed for vuMicro).
xMOV(gprF0, gprF3); // gprF3 is t0
xMOV(gprF1, gprF3);
xMOV(gprF2, gprF3);
}
xSHL(edx, 14);
xAND(edx, 0x3cf0000);
xOR (eax, edx);
}
__fi void mVUallocMFLAGa(mV, const x32& reg, int fInstance)

5
pcsx2/x86/microVU_Branch.inl
View File

@ -65,12 +65,7 @@ void mVUendProgram(mV, microFlagCycles* mFC, int isEbit) {
}
// Save Flag Instances
#if 1 // CHECK_MACROVU0 - Always on now
xMOV(ptr32[&mVU.regs().VI[REG_STATUS_FLAG].UL], getFlagReg(fStatus));
#else
mVUallocSFLAGc(gprT1, gprT2, fStatus);
xMOV(ptr32[&mVU.regs().VI[REG_STATUS_FLAG].UL], gprT1);
#endif
mVUallocMFLAGa(mVU, gprT1, fMac);
mVUallocCFLAGa(mVU, gprT2, fClip);
xMOV(ptr32[&mVU.regs().VI[REG_MAC_FLAG].UL], gprT1);

4
pcsx2/x86/microVU_Execute.inl
View File

@ -42,14 +42,10 @@ void mVUdispatcherA(mV) {
xLDMXCSR(g_sseVUMXCSR);
// Load Regs
#if 1 // CHECK_MACROVU0 - Always on now
xMOV(gprF0, ptr32[&mVU.regs().VI[REG_STATUS_FLAG].UL]);
xMOV(gprF1, gprF0);
xMOV(gprF2, gprF0);
xMOV(gprF3, gprF0);
#else
mVUallocSFLAGd((uptr)&mVU.regs().VI[REG_STATUS_FLAG].UL, 1);
#endif
xMOVAPS (xmmT1, ptr128[&mVU.regs().VI[REG_MAC_FLAG].UL]);
xSHUF.PS(xmmT1, xmmT1, 0);

2
pcsx2/x86/microVU_Macro.inl
View File

@ -306,7 +306,7 @@ static void recCTC2() {
break;
case REG_STATUS_FLAG:
if (_Rt_) { // Denormalizes flag into eax (gprT1)
mVUallocSFLAGd(&cpuRegs.GPR.r[_Rt_].UL[0], 0);
mVUallocSFLAGd(&cpuRegs.GPR.r[_Rt_].UL[0]);
xMOV(ptr32[&vu0Regs.VI[_Rd_].UL], eax);
}
else xMOV(ptr32[&vu0Regs.VI[_Rd_].UL], 0);