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mgba
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310 Commits 36 Branches 38 Tags 63 MiB
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310 Commits

Author SHA1 Message Date
Jeffrey Pfau 1c6fc26bf7 Support hflip on mode 0 edges 2013-05-02 21:51:00 -07:00
Jeffrey Pfau ebb1c08840 Fix warnings on gcc 2013-05-02 00:40:12 -07:00
Jeffrey Pfau 13a46429e2 Remove -Wno-unused and fix resulting errors 2013-05-02 00:35:32 -07:00
Jeffrey Pfau a635f4de4d Implement addressing mode 1 ASR register shift 2013-05-02 00:32:04 -07:00
Jeffrey Pfau 86c228f2e4 Implement SMLAL 2013-05-02 00:29:06 -07:00
Jeffrey Pfau a80175e689 Fix sprite variant condition 2013-05-01 23:56:59 -07:00
Jeffrey Pfau 3b3f55b14c Variant and 256-color transformed sprites 2013-05-01 23:54:39 -07:00
Jeffrey Pfau 0423656ad8 Extract more into macros 2013-05-01 23:46:15 -07:00
Jeffrey Pfau d6c88fc7cb Introduce macros for sprite drawing 2013-05-01 23:39:55 -07:00
Jeffrey Pfau e3fddc5739 Support 256-color sprites 2013-05-01 23:27:49 -07:00
Jeffrey Pfau 61c6b7186e Implement UMLAL 2013-05-01 23:11:00 -07:00
Jeffrey Pfau cd73c562ea Implement addressing mode 1 LSL/LSR with register 2013-05-01 23:08:22 -07:00
Jeffrey Pfau aeecbdb56f Draw backgrounds with variant palette when appropriate 2013-05-01 02:51:33 -07:00
Jeffrey Pfau 40e9a7ef26 Update variant palettes when writing to palette 2013-05-01 02:37:15 -07:00
Jeffrey Pfau 03361f20a2 Start drawing backdrop 2013-05-01 02:32:56 -07:00
Jeffrey Pfau 2e9a64a26e Implement Sqrt 2013-05-01 00:27:31 -07:00
Jeffrey Pfau 6ed3c18afd Support IWRAM in LZ77 2013-05-01 00:24:28 -07:00
Jeffrey Pfau 5f6cf337a0 16-bit DMA address writes 2013-04-30 23:22:39 -07:00
Jeffrey Pfau da489b90f8 Ensure shifter carry-out gets bits set right 2013-04-30 21:02:56 -07:00
Jeffrey Pfau f7fbb877e0 Fix Div output registers 2013-04-30 20:54:09 -07:00
Jeffrey Pfau 118c393d1b Fix addressing mode 2 register post-indexed 2013-04-30 02:43:12 -07:00
Jeffrey Pfau 337d4dc1e6 Implement addressing mode 1 ROR with register 2013-04-30 02:42:54 -07:00
Jeffrey Pfau e1963c6e60 Implement SMULL 2013-04-30 01:42:24 -07:00
Jeffrey Pfau 698bc0ada5 Re-add 256-color 2013-04-30 01:38:19 -07:00
Jeffrey Pfau 6cdfa43e97 hflip in fast path 2013-04-29 22:05:32 -07:00
Jeffrey Pfau 87e5973039 Proper blending on sprite targets 2013-04-29 21:27:29 -07:00
Jeffrey Pfau 2d4c1fdc2c Add back compositing 2013-04-29 21:27:05 -07:00
Jeffrey Pfau 56333d3344 Use base rendering mode 2013-04-29 21:12:56 -07:00
Jeffrey Pfau 7bb4d9d5ff Throw out slow background renderer. Let me try again. 2013-04-29 00:42:04 -07:00
Jeffrey Pfau 6c2f7b3b73 Use 32-bit color internally 2013-04-28 23:01:45 -07:00
Jeffrey Pfau 7c597d5205 Rearrange some code in preparation of adding windows 2013-04-28 02:57:06 -07:00
Jeffrey Pfau dfd360bfbb Remove accidentally left in testing code 2013-04-28 01:46:43 -07:00
Jeffrey Pfau 5f6b57734d Implement character mapping 2013-04-28 01:43:39 -07:00
Jeffrey Pfau 8072ff7d2c Rotate LDR 2013-04-28 01:33:59 -07:00
Jeffrey Pfau 6450ce16b2 Fix LDR(3) 2013-04-28 01:33:45 -07:00
Jeffrey Pfau e86f7d79fb Clean up and fix conditions for CPSR V 2013-04-28 00:19:15 -07:00
Jeffrey Pfau 19f9b72c33 Fix CPSR C being written 2013-04-28 00:06:13 -07:00
Jeffrey Pfau 682684cb6d Output MUL into the right register 2013-04-27 23:44:33 -07:00
Jeffrey Pfau 2c8786ae4c Use LE instead of GE where appropriate 2013-04-27 23:44:17 -07:00
Jeffrey Pfau dd4e6b0ce1 Stub RegisterRamReset 2013-04-27 22:54:41 -07:00
Jeffrey Pfau ca959c640a Implement EEPROM 2013-04-27 21:51:58 -07:00
Jeffrey Pfau f4fa423135 EEPROM only works in DMAs 2013-04-27 20:39:14 -07:00
Jeffrey Pfau 4380ec0260 Start implementing EEPROM 2013-04-27 20:25:31 -07:00
Jeffrey Pfau e02059947c Start implementing save games 2013-04-27 19:59:41 -07:00
Jeffrey Pfau dab27463a9 Implement DivArm 2013-04-27 19:58:21 -07:00
Jeffrey Pfau fd5661e941 Fix alpha blending when neither target 1 or target 2 are set 2013-04-27 03:09:23 -07:00
Jeffrey Pfau 2e78381e55 Implement SWI 2013-04-27 02:56:34 -07:00
Jeffrey Pfau 6c44cf8dfc Implement BL 2013-04-27 02:54:16 -07:00
Jeffrey Pfau 21b9222357 Fix entering SWI mode 2013-04-27 02:50:35 -07:00
Jeffrey Pfau bd9714b540 Implement STR(2)/STRH(2) 2013-04-27 02:42:42 -07:00