af09e37d53
attempt at twl timings
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also rework main ram's early finish handling
2024-10-21 11:38:26 -04:00
e254ac3240
fix ldrd/strd itcm timings
2024-10-19 12:35:27 -04:00
8fff17f03f
fix resets
2024-10-19 11:01:16 -04:00
e33d19cf14
fix a few misc things?
2024-10-18 21:08:56 -04:00
9ed4c66592
add support for 1 reg ldm/stm a9 timings and fix a bug
2024-10-18 17:56:56 -04:00
8ff0946b8a
mrc causes interlocks
2024-10-18 17:10:00 -04:00
0e6d3fd834
fix bad logical leaps
2024-10-18 16:32:02 -04:00
e2a810147f
re-add interlocks
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breaks gcc debug builds for ??? reason
2024-10-18 15:00:55 -04:00
d7212643f1
move arm9 code fetches into the cycle add routine
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setting up for re-adding interlocks
2024-10-16 12:21:48 -04:00
52ddaa73cf
fix resets
2024-10-15 22:36:21 -04:00
c00b188c05
im dumb
2024-10-15 21:08:07 -04:00
05c153e9ab
Merge branch 'interpreter-fixes' into less-ambitious-timing-rework
2024-10-15 20:23:14 -04:00
5f003eb967
fix builds with jit disabled
2024-10-15 20:23:03 -04:00
263dd20ec3
nvmnvmnvm
2024-10-14 22:48:25 -04:00
026719acef
improve timing model
2024-10-14 20:15:03 -04:00
801f43dfc5
reimplement codemem
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i dont feel like i actually had a good reason for disabling this...
2024-10-13 20:06:39 -04:00
206fc94d68
Merge branch 'interpreter-fixes' into less-ambitious-timing-rework
2024-10-12 14:35:28 -04:00
e0e78a2bc8
make empty r-list instructions a bit nicer
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pass bools as a single u8 instead and combine thumb and restore cpsr flags since they're mutually exclusive
2024-10-12 11:10:06 -04:00
9f6cbd8e84
implement drain write buffer cache command
2024-10-10 23:24:20 -04:00
3d246ddf73
tcms just aren't bufferable
2024-10-10 22:54:33 -04:00
34bba2589e
tcm (and cache?) reads dont trigger write buffer drains
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additionally drains are triggered even in no cache + no buffer regions despite documentation not specifying such
2024-10-10 20:52:47 -04:00
5c120f45ee
Merge branch 'interpreter-fixes' into less-ambitious-timing-rework
2024-10-10 20:34:00 -04:00
787d0c9afc
mrc r15 updates flags
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also my prior implementation made mrc w/ r15 raise an exception by accident
oops!
2024-10-10 11:09:07 -04:00
93dce82b07
implement cmp with "rd == 15" on arm9
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cmp and friends with bits 12-15 set to 1 borrow characteristics from their legacy 26 bit p variants
thumb version does nothing of note
2024-10-10 10:48:17 -04:00
3870216fd0
correction:
2024-10-10 03:53:51 -04:00
53b38c363f
ok no it didn't lie to me
2024-10-10 03:32:53 -04:00
e25dca0030
writing to the write buffer has a 1 cycle delay before it can be done again
2024-10-10 03:14:01 -04:00
2c3ef9f903
writing to the write buffer seems to require bus cycle alignment
2024-10-10 02:20:02 -04:00
746f6edb0a
should addr writes to the fifo take 1 cycle? probably?
2024-10-09 18:06:17 -04:00
35c382acab
jit
2024-10-09 17:51:00 -04:00
9cf065e54f
idk
2024-10-09 17:47:08 -04:00
6e30cf3bfb
functional write buffer prototype
2024-10-09 17:46:50 -04:00
c62f0f1244
Merge branch 'interpreter-fixes' into less-ambitious-timing-rework
2024-09-29 22:42:40 -04:00
19e0b18d15
Merge remote-tracking branch 'upstream/master' into interpreter-fixes
2024-09-29 22:41:52 -04:00
e9446fa9dc
implement 3 configurable and toggleable framerate targets ( #2159 )
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This pr allows for configuring the framerate target and adds support for two other framerate targets, a "fastforward" and "slowmo" target which can be enabled via either a toggle or holding a button.
this allows for supporting a more accurate framerate target and allows for users to slow down the speed of gameplay if they so desire
2024-09-29 09:30:13 +02:00
a11208ec6d
oops
2024-09-24 21:02:17 -04:00
3065141ed7
probably not faster
2024-09-24 17:04:52 -04:00
2eb6d44c2c
prevent use after free through focusOutEvent when window is closed
2024-09-24 20:08:07 +02:00
e1d4fbef75
i can't reproduce this anymore
2024-09-24 09:47:32 -04:00
7fb18b1155
clean up code
2024-09-23 20:03:58 -04:00
3b73f21bb7
str r15 is incremented by +2/+4 oop
2024-09-23 16:12:23 -04:00
8af790beee
ldm/str with empty rlist
2024-09-23 15:00:35 -04:00
7b0d71dbbe
Revert T bit changing support for arm7
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i cannot comprehend what is happening currently
2024-09-22 19:57:33 -04:00
8d451dff48
misaligned pc..........
2024-09-20 23:47:40 -04:00
157e9c5b04
reimplement changing t bit with arm7
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kinda slow though?
2024-09-20 13:37:58 -04:00
7afa805afc
slightly better code
2024-09-20 05:37:51 -04:00
c133814713
some day i will remember to test before pushing
2024-09-20 04:39:16 -04:00
45f87a1c8d
prevent t bit changes without pipeline flush on arm7
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idk what's happening fully and its gonna be slow to emulate most likely
we'll figure this out later
2024-09-19 21:02:54 -04:00
6ebabde392
implement changing thumb bit. and bkpt ig
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probably wrong
2024-09-19 04:37:01 -04:00
2179ca2a41
Set the correct save type for Puzzler World USA ( #2156 )
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Fixes #1804
2024-09-18 20:58:55 +02:00
Jaklyy