2013-12-19 17:10:14 +00:00
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#include "ta.h"
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#include "ta_ctx.h"
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2019-09-11 13:09:23 +00:00
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#include "hw/holly/holly_intc.h"
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2013-12-19 17:10:14 +00:00
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/*
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Threaded TA Implementation
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Main thread -> ta data -> stored (tactx)
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Render/TA thread -> ta data -> draw lists -> draw
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*/
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2017-04-25 11:20:33 +00:00
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#if HOST_CPU == CPU_X86
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#include <xmmintrin.h>
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2017-05-16 11:33:37 +00:00
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struct simd256_t
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{
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2020-02-19 22:20:32 +00:00
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alignas(32) __m128 data[2];
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2017-05-16 11:33:37 +00:00
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};
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2017-04-25 11:20:33 +00:00
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#elif HOST_CPU == CPU_ARM && defined(__ARM_NEON__)
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#include <arm_neon.h>
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2017-05-16 11:33:37 +00:00
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struct simd256_t
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{
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2020-02-19 22:20:32 +00:00
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alignas(32) uint64x2_t data[2];
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2017-05-16 11:33:37 +00:00
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};
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2017-04-25 11:20:33 +00:00
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#else
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2017-05-16 11:33:37 +00:00
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struct simd256_t
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2017-04-25 11:20:33 +00:00
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{
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2020-02-19 22:20:32 +00:00
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alignas(32) u64 data[4];
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2017-04-25 11:20:33 +00:00
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};
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2013-12-19 17:10:14 +00:00
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#endif
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/*
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Partial TA parsing for in emu-side handling. Properly tracks 32/64 byte state, and
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Calls a helper function every time something important (SOL/EOL, etc) happens
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Uses a state machine, with 3 bits state and 8 bits (PT:OBJ[6:2]) input
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*/
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enum ta_state
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{
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2013-12-24 00:56:44 +00:00
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// -> TAS_NS, TAS_PLV32, TAS_PLHV32, TAS_PLV64, TAS_PLHV64, TAS_MLV64
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TAS_NS, //
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2013-12-19 17:10:14 +00:00
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2013-12-24 00:56:44 +00:00
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// -> TAS_NS, TAS_PLV32, TAS_PLHV32, TAS_PLV64, TAS_PLHV64
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TAS_PLV32, //polygon list PMV<?>, V32
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2013-12-19 17:10:14 +00:00
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2013-12-24 00:56:44 +00:00
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// -> TAS_NS, TAS_PLV32, TAS_PLHV32, TAS_PLV64, TAS_PLHV64
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TAS_PLV64, //polygon list PMV<?>, V64
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2013-12-19 17:10:14 +00:00
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2013-12-24 00:56:44 +00:00
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// -> TAS_NS, TAS_MLV64, TAS_MLV64_H
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TAS_MLV64, //mv list
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2013-12-19 17:10:14 +00:00
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2013-12-24 00:56:44 +00:00
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// -> TAS_PLV32
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TAS_PLHV32, //polygon list PMV<64> 2nd half -> V32
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2013-12-19 17:10:14 +00:00
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2013-12-24 00:56:44 +00:00
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// -> TAS_PLV64
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TAS_PLHV64, //polygon list PMV<64> 2nd half -> V64
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2013-12-19 17:10:14 +00:00
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2013-12-24 00:56:44 +00:00
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// -> TAS_PLV64_H
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TAS_PLV64_H, //polygon list V64 2nd half
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2013-12-19 17:10:14 +00:00
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2013-12-24 00:56:44 +00:00
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// -> TAS_MLV64
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TAS_MLV64_H, //mv list, 64 bit half
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2013-12-19 17:10:14 +00:00
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};
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/* state | PTEOS | OBJ -> next, proc*/
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#define ta_cur_state (ta_fsm[2048])
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u8 ta_fsm[2049]; //[2048] stores the current state
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u32 ta_fsm_cl=7;
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2019-08-31 15:36:34 +00:00
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static void fill_fsm(ta_state st, s8 pt, s8 obj, ta_state next, u32 proc=0, u32 sz64=0)
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2013-12-19 17:10:14 +00:00
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{
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for (int i=0;i<8;i++)
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{
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if (pt != -1) i=pt;
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for (int j=0;j<32;j++)
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{
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if (obj != -1) j=obj;
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verify(ta_fsm[(st<<8)+(i<<5)+j]==(0x80+st));
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ta_fsm[(st<<8)+(i<<5)+j]=next | proc*16 /*| sz64*32*/;
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if (obj != -1) break;
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}
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if (pt != -1) break;
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}
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}
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2019-09-11 13:09:23 +00:00
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static void fill_fsm()
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2013-12-19 17:10:14 +00:00
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{
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//initialise to invalid
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for (int i=0;i<2048;i++)
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ta_fsm[i]=(i>>8) | 0x80;
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for (int i=0;i<8;i++)
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{
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switch(i)
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{
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case ParamType_End_Of_List:
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{
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//End of list -> process it !
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fill_fsm(TAS_NS,ParamType_End_Of_List,-1,TAS_NS,1);
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fill_fsm(TAS_PLV32,ParamType_End_Of_List,-1,TAS_NS,1);
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fill_fsm(TAS_PLV64,ParamType_End_Of_List,-1,TAS_NS,1);
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fill_fsm(TAS_MLV64,ParamType_End_Of_List,-1,TAS_NS,1);
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}
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break;
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case ParamType_User_Tile_Clip:
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case ParamType_Object_List_Set:
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{
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//32B commands, no state change
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fill_fsm(TAS_NS,i,-1,TAS_NS);
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fill_fsm(TAS_PLV32,i,-1,TAS_PLV32);
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fill_fsm(TAS_PLV64,i,-1,TAS_PLV64);
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fill_fsm(TAS_MLV64,i,-1,TAS_MLV64);
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}
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break;
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case 3:
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case 6:
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//invalid
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break;
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case ParamType_Polygon_or_Modifier_Volume:
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{
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//right .. its complicated alirte
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for (int k=0;k<32;k++)
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{
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2021-03-26 17:39:19 +00:00
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u32 uid = TaTypeLut::instance().table[k * 4];
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2013-12-19 17:10:14 +00:00
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u32 vt=uid & 0x7f;
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bool v64 = vt == 5 || vt == 6 || vt == 11 || vt == 12 || vt == 13 || vt == 14;
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bool p64 = uid >> 31;
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ta_state nxt = p64 ? (v64 ? TAS_PLHV64 : TAS_PLHV32) :
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(v64 ? TAS_PLV64 : TAS_PLV32 ) ;
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fill_fsm(TAS_PLV32,i,k,nxt,0,p64);
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fill_fsm(TAS_PLV64,i,k,nxt,0,p64);
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}
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//32B command, no state change
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fill_fsm(TAS_MLV64,i,-1,TAS_MLV64);
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//process and start list
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fill_fsm(TAS_NS,i,-1,TAS_NS,1);
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}
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break;
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case ParamType_Sprite:
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{
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//SPR: 32B -> expect 64B data (PL*)
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fill_fsm(TAS_PLV32,i,-1,TAS_PLV64);
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fill_fsm(TAS_PLV64,i,-1,TAS_PLV64);
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//invalid for ML
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//process and start list
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fill_fsm(TAS_NS,i,-1,TAS_NS,1);
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}
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break;
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case ParamType_Vertex_Parameter:
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{
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//VTX: 32 B -> Expect more of it
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fill_fsm(TAS_PLV32,i,-1,TAS_PLV32,0,0);
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//VTX: 64 B -> Expect next 32B
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fill_fsm(TAS_PLV64,i,-1,TAS_PLV64_H,0,1);
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//MVO: 64B -> expect next 32B
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fill_fsm(TAS_MLV64,i,-1,TAS_MLV64_H,0,1);
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//invalid for NS
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}
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break;
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}
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}
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//?
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2013-12-24 00:56:44 +00:00
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fill_fsm(TAS_PLHV32,-1,-1,TAS_PLV32); //64 PH -> expect V32
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fill_fsm(TAS_PLHV64,-1,-1,TAS_PLV64); //64 PH -> expect V64
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2013-12-19 17:10:14 +00:00
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fill_fsm(TAS_PLV64_H,-1,-1,TAS_PLV64); //64 VH -> expect V64
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2013-12-24 00:56:44 +00:00
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fill_fsm(TAS_MLV64_H,-1,-1,TAS_MLV64); //64 MH -> expect M64
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2013-12-19 17:10:14 +00:00
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}
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2019-09-11 13:09:23 +00:00
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static const HollyInterruptID ListEndInterrupt[5]=
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2013-12-19 17:10:14 +00:00
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{
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holly_OPAQUE,
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holly_OPAQUEMOD,
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holly_TRANS,
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holly_TRANSMOD,
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holly_PUNCHTHRU
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};
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2019-09-11 13:09:23 +00:00
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static NOINLINE void DYNACALL ta_handle_cmd(u32 trans)
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2013-12-19 17:10:14 +00:00
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{
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Ta_Dma* dat=(Ta_Dma*)(ta_tad.thd_data-32);
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u32 cmd = trans>>4;
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trans&=7;
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//printf("Process state transition: %d || %d -> %d \n",cmd,state_in,trans&0xF);
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if (cmd == 8)
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{
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//printf("Invalid TA Param %d\n", dat->pcw.ParaType);
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}
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else
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{
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if (dat->pcw.ParaType == ParamType_End_Of_List)
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{
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if (ta_fsm_cl==7)
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ta_fsm_cl=dat->pcw.ListType;
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//printf("List %d ended\n",ta_fsm_cl);
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asic_RaiseInterrupt( ListEndInterrupt[ta_fsm_cl]);
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ta_fsm_cl=7;
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trans=TAS_NS;
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}
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else if (dat->pcw.ParaType == ParamType_Polygon_or_Modifier_Volume)
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{
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if (ta_fsm_cl==7)
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ta_fsm_cl=dat->pcw.ListType;
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if (!IsModVolList(ta_fsm_cl))
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trans=TAS_PLV32;
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else
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trans=TAS_MLV64;
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}
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else if (dat->pcw.ParaType == ParamType_Sprite)
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{
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if (ta_fsm_cl==7)
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ta_fsm_cl=dat->pcw.ListType;
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2019-06-25 17:10:20 +00:00
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//verify(!IsModVolList(ta_fsm_cl)); // fails with "F1 World Grand Prix for Dreamcast" and only with dynarec...
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2013-12-19 17:10:14 +00:00
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trans=TAS_PLV32;
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}
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else
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{
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die("WTF ?\n");
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}
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}
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u32 state_in = (trans<<8) | (dat->pcw.ParaType<<5) | (dat->pcw.obj_ctrl>>2)%32;
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ta_cur_state=(ta_state)(ta_fsm[state_in]&0xF);
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verify(ta_cur_state<=7);
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}
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static OnLoad ol_fillfsm(&fill_fsm);
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void ta_vtx_ListCont()
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{
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2018-08-26 14:31:41 +00:00
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SetCurrentTARC(TA_CURRENT_CTX);
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2018-05-10 19:28:20 +00:00
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ta_tad.Continue();
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2013-12-19 17:10:14 +00:00
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ta_cur_state=TAS_NS;
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2019-09-21 20:53:09 +00:00
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ta_fsm_cl = 7;
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2013-12-19 17:10:14 +00:00
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}
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void ta_vtx_ListInit()
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{
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2018-08-26 14:31:41 +00:00
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SetCurrentTARC(TA_CURRENT_CTX);
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2014-04-25 16:57:34 +00:00
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ta_tad.ClearPartial();
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2013-12-19 17:10:14 +00:00
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ta_cur_state=TAS_NS;
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2019-09-21 20:53:09 +00:00
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ta_fsm_cl = 7;
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2013-12-19 17:10:14 +00:00
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}
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void ta_vtx_SoftReset()
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{
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ta_cur_state=TAS_NS;
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}
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2019-09-11 13:09:23 +00:00
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static INLINE
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2021-03-23 15:07:53 +00:00
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void DYNACALL ta_thd_data32_i(const simd256_t *data)
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2017-04-25 11:20:33 +00:00
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{
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2018-07-03 13:24:48 +00:00
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if (ta_ctx == NULL)
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{
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2019-09-12 13:07:57 +00:00
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INFO_LOG(PVR, "Warning: data sent to TA prior to ListInit. Ignored");
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return;
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2018-07-03 13:24:48 +00:00
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}
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2019-12-23 11:25:45 +00:00
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if (ta_tad.End() - ta_tad.thd_root >= TA_DATA_SIZE)
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{
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INFO_LOG(PVR, "Warning: TA data buffer overflow");
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asic_RaiseInterrupt(holly_MATR_NOMEM);
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return;
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}
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2018-07-03 13:24:48 +00:00
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2017-05-16 11:33:37 +00:00
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simd256_t* dst = (simd256_t*)ta_tad.thd_data;
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2017-04-25 11:20:33 +00:00
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2017-05-16 11:33:37 +00:00
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// First byte is PCW
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2021-03-23 15:07:53 +00:00
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PCW pcw = *(const PCW*)data;
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2017-04-25 11:20:33 +00:00
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2017-05-16 11:33:37 +00:00
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// Copy the TA data
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2021-03-23 15:07:53 +00:00
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*dst = *data;
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2013-12-19 17:10:14 +00:00
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2017-04-25 11:20:33 +00:00
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ta_tad.thd_data += 32;
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2013-12-19 17:10:14 +00:00
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2017-05-16 11:33:37 +00:00
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//process TA state
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2017-04-25 11:20:33 +00:00
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u32 state_in = (ta_cur_state << 8) | (pcw.ParaType << 5) | ((pcw.obj_ctrl >> 2) & 31);
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2013-12-19 17:10:14 +00:00
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2017-04-25 11:20:33 +00:00
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u32 trans = ta_fsm[state_in];
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ta_cur_state = (ta_state)trans;
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|
|
|
bool must_handle = trans & 0xF0;
|
2013-12-19 17:10:14 +00:00
|
|
|
|
|
|
|
|
2017-05-16 11:33:37 +00:00
|
|
|
if (likely(!must_handle))
|
2017-04-25 11:20:33 +00:00
|
|
|
{
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2013-12-19 17:10:14 +00:00
|
|
|
ta_handle_cmd(trans);
|
2017-04-25 11:20:33 +00:00
|
|
|
}
|
2013-12-19 17:10:14 +00:00
|
|
|
}
|
|
|
|
|
2021-03-23 15:07:53 +00:00
|
|
|
void DYNACALL ta_vtx_data32(const SQBuffer *data)
|
2013-12-19 17:10:14 +00:00
|
|
|
{
|
2021-03-23 15:07:53 +00:00
|
|
|
ta_thd_data32_i((const simd256_t *)data);
|
2013-12-19 17:10:14 +00:00
|
|
|
}
|
|
|
|
|
2021-03-23 15:07:53 +00:00
|
|
|
void ta_vtx_data(const SQBuffer *data, u32 size)
|
2013-12-19 17:10:14 +00:00
|
|
|
{
|
2021-03-23 15:07:53 +00:00
|
|
|
while (size >= 4)
|
2013-12-19 17:10:14 +00:00
|
|
|
{
|
2021-03-23 15:07:53 +00:00
|
|
|
ta_thd_data32_i((simd256_t *)data);
|
|
|
|
data++;
|
|
|
|
ta_thd_data32_i((simd256_t *)data);
|
|
|
|
data++;
|
|
|
|
ta_thd_data32_i((simd256_t *)data);
|
|
|
|
data++;
|
|
|
|
ta_thd_data32_i((simd256_t *)data);
|
|
|
|
data++;
|
|
|
|
size -= 4;
|
2013-12-19 17:10:14 +00:00
|
|
|
}
|
|
|
|
|
2021-03-23 15:07:53 +00:00
|
|
|
while (size > 0)
|
2013-12-19 17:10:14 +00:00
|
|
|
{
|
2021-03-23 15:07:53 +00:00
|
|
|
ta_thd_data32_i((simd256_t *)data);
|
|
|
|
data++;
|
2013-12-19 17:10:14 +00:00
|
|
|
size--;
|
|
|
|
}
|
2018-07-03 12:22:44 +00:00
|
|
|
}
|