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Get rid of time_sync timer. Clean-up

This commit is contained in:
Flyinghead 2019-09-11 15:09:23 +02:00
parent a19c73de7b
commit 8b949e1dca
33 changed files with 82 additions and 316 deletions
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3
core/hw/arm7/arm_mem.h
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@ -51,9 +51,6 @@ static inline void DYNACALL WriteMemArm(u32 addr,T data)
#define arm_WriteMem16 WriteMemArm<2,u16>
#define arm_WriteMem32 WriteMemArm<4,u32>
u32 sh4_ReadMem_reg(u32 addr,u32 size);
void sh4_WriteMem_reg(u32 addr,u32 data,u32 size);
extern bool aica_interr;
extern u32 aica_reg_L;
extern bool e68k_out;

4
core/hw/holly/sb.h
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@ -10,7 +10,7 @@
u32 sb_ReadMem(u32 addr,u32 sz);
void sb_WriteMem(u32 addr,u32 data,u32 sz);
void sb_Init();
void sb_Reset(bool Manual);
void sb_Reset(bool hard);
void sb_Term();
extern Array<RegisterStruct> sb_regs;
@ -781,4 +781,4 @@ extern u32 SB_ISTNRM;
*/
void sb_rio_register(u32 reg_addr, RegIO flags, RegReadAddrFP* rf=0, RegWriteAddrFP* wf=0);
void sb_rio_register(u32 reg_addr, RegIO flags, RegReadAddrFP* rf=0, RegWriteAddrFP* wf=0);

1
core/hw/maple/maple_cfg.cpp
View File

@ -26,7 +26,6 @@ void UpdateInputState(u32 port);
void UpdateVibration(u32 port, float power, float inclination, u32 duration_ms);
extern u16 kcode[4];
extern u32 vks[4];
extern s8 joyx[4],joyy[4];
extern u8 rt[4],lt[4];

20
core/hw/maple/maple_devs.cpp
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@ -1480,26 +1480,6 @@ extern u8 rt[4], lt[4];
char EEPROM[0x100];
bool EEPROM_loaded = false;
static u16 getJoystickXAxis()
{
return (joyx[0] + 128) << 8;
}
static u16 getJoystickYAxis()
{
return (joyy[0] + 128) << 8;
}
static u16 getLeftTriggerAxis()
{
return lt[0] << 8;
}
static u16 getRightTriggerAxis()
{
return rt[0] << 8;
}
u32 naomi_button_mapping[] = {
NAOMI_SERVICE_KEY, // DC_BTN_C
NAOMI_BTN1_KEY, // DC_BTN_B

4
core/hw/maple/maple_helper.cpp
View File

@ -1,4 +1,4 @@
#include "types.h"
#include "maple_helper.h"
#include "maple_if.h"
u32 maple_GetBusId(u32 addr)
@ -34,4 +34,4 @@ u32 maple_GetAddress(u32 bus,u32 port)
rv|=1<<port;
return rv;
}
}

102
core/hw/mem/_vmem.cpp
View File

@ -2,48 +2,27 @@
#include "vmem32.h"
#include "hw/aica/aica_if.h"
#include "hw/sh4/dyna/blockmanager.h"
#include "hw/pvr/pvr_mem.h"
#include "hw/sh4/sh4_mem.h"
#define HANDLER_MAX 0x1F
#define HANDLER_COUNT (HANDLER_MAX+1)
//top registered handler
_vmem_handler _vmem_lrp;
static _vmem_handler _vmem_lrp;
//handler tables
_vmem_ReadMem8FP* _vmem_RF8[HANDLER_COUNT];
_vmem_WriteMem8FP* _vmem_WF8[HANDLER_COUNT];
static _vmem_ReadMem8FP* _vmem_RF8[HANDLER_COUNT];
static _vmem_WriteMem8FP* _vmem_WF8[HANDLER_COUNT];
_vmem_ReadMem16FP* _vmem_RF16[HANDLER_COUNT];
_vmem_WriteMem16FP* _vmem_WF16[HANDLER_COUNT];
static _vmem_ReadMem16FP* _vmem_RF16[HANDLER_COUNT];
static _vmem_WriteMem16FP* _vmem_WF16[HANDLER_COUNT];
_vmem_ReadMem32FP* _vmem_RF32[HANDLER_COUNT];
_vmem_WriteMem32FP* _vmem_WF32[HANDLER_COUNT];
static _vmem_ReadMem32FP* _vmem_RF32[HANDLER_COUNT];
static _vmem_WriteMem32FP* _vmem_WF32[HANDLER_COUNT];
//upper 8b of the address
void* _vmem_MemInfo_ptr[0x100];
void _vmem_get_ptrs(u32 sz,bool write,void*** vmap,void*** func)
{
*vmap=_vmem_MemInfo_ptr;
switch(sz)
{
case 1:
*func=write?(void**)_vmem_WF8:(void**)_vmem_RF8;
return;
case 2:
*func=write?(void**)_vmem_WF16:(void**)_vmem_RF16;
return;
case 4:
case 8:
*func=write?(void**)_vmem_WF32:(void**)_vmem_RF32;
return;
default:
die("invalid size");
}
}
static void* _vmem_MemInfo_ptr[0x100];
void* _vmem_get_ptr2(u32 addr,u32& mask)
{
@ -137,47 +116,6 @@ void* _vmem_write_const(u32 addr,bool& ismem,u32 sz)
return 0;
}
void* _vmem_page_info(u32 addr,bool& ismem,u32 sz,u32& page_sz,bool rw)
{
u32 page=addr>>24;
unat iirf=(unat)_vmem_MemInfo_ptr[page];
void* ptr=(void*)(iirf&~HANDLER_MAX);
if (ptr==0)
{
ismem=false;
const unat id=iirf;
page_sz=24;
if (sz==1)
{
return rw?(void*)_vmem_RF8[id/4]:(void*)_vmem_WF8[id/4];
}
else if (sz==2)
{
return rw?(void*)_vmem_RF16[id/4]:(void*)_vmem_WF16[id/4];
}
else if (sz==4)
{
return rw?(void*)_vmem_RF32[id/4]:(void*)_vmem_WF32[id/4];
}
else
{
die("Invalid size");
}
}
else
{
ismem=true;
page_sz=32-(iirf&0x1F);
return ptr;
}
die("Invalid memory size");
return 0;
}
template<typename T,typename Trv>
INLINE Trv DYNACALL _vmem_readt(u32 addr)
{
@ -297,31 +235,31 @@ void DYNACALL _vmem_WriteMem64(u32 Address,u64 data) { _vmem_writet<u64>(Address
//phew .. that was lota asm code ;) lets go back to C :D
//default mem handlers ;)
//default read handlers
u8 DYNACALL _vmem_ReadMem8_not_mapped(u32 addresss)
static u8 DYNACALL _vmem_ReadMem8_not_mapped(u32 addresss)
{
INFO_LOG(MEMORY, "[sh4]Read8 from 0x%X, not mapped [_vmem default handler]", addresss);
return (u8)MEM_ERROR_RETURN_VALUE;
}
u16 DYNACALL _vmem_ReadMem16_not_mapped(u32 addresss)
static u16 DYNACALL _vmem_ReadMem16_not_mapped(u32 addresss)
{
INFO_LOG(MEMORY, "[sh4]Read16 from 0x%X, not mapped [_vmem default handler]", addresss);
return (u16)MEM_ERROR_RETURN_VALUE;
}
u32 DYNACALL _vmem_ReadMem32_not_mapped(u32 address)
static u32 DYNACALL _vmem_ReadMem32_not_mapped(u32 address)
{
INFO_LOG(MEMORY, "[sh4]Read32 from 0x%X, not mapped [_vmem default handler]", address);
return (u32)MEM_ERROR_RETURN_VALUE;
}
//default write handers
void DYNACALL _vmem_WriteMem8_not_mapped(u32 addresss,u8 data)
static void DYNACALL _vmem_WriteMem8_not_mapped(u32 addresss,u8 data)
{
INFO_LOG(MEMORY, "[sh4]Write8 to 0x%X=0x%X, not mapped [_vmem default handler]", addresss, data);
}
void DYNACALL _vmem_WriteMem16_not_mapped(u32 addresss,u16 data)
static void DYNACALL _vmem_WriteMem16_not_mapped(u32 addresss,u16 data)
{
INFO_LOG(MEMORY, "[sh4]Write16 to 0x%X=0x%X, not mapped [_vmem default handler]", addresss, data);
}
void DYNACALL _vmem_WriteMem32_not_mapped(u32 addresss,u32 data)
static void DYNACALL _vmem_WriteMem32_not_mapped(u32 addresss,u32 data)
{
INFO_LOG(MEMORY, "[sh4]Write32 to 0x%X=0x%X, not mapped [_vmem default handler]", addresss, data);
}
@ -351,7 +289,8 @@ _vmem_handler _vmem_register_handler(
return rv;
}
u32 FindMask(u32 msk)
static u32 FindMask(u32 msk)
{
u32 s=-1;
u32 rv=0;
@ -436,14 +375,11 @@ void _vmem_reset()
void _vmem_term() {}
#include "hw/pvr/pvr_mem.h"
#include "hw/sh4/sh4_mem.h"
u8* virt_ram_base;
bool vmem_4gb_space;
static VMemType vmemstatus;
void* malloc_pages(size_t size) {
static void* malloc_pages(size_t size) {
#ifdef _WIN32
return _aligned_malloc(size, PAGE_SIZE);
#elif defined(_ISOC11_SOURCE)

1
core/hw/mem/_vmem.h
View File

@ -104,7 +104,6 @@ bool _vmem_reserve();
void _vmem_release();
//dynarec helpers
void _vmem_get_ptrs(u32 sz,bool write,void*** vmap,void*** func);
void* _vmem_get_ptr2(u32 addr,u32& mask);
void* _vmem_read_const(u32 addr,bool& ismem,u32 sz);
void* _vmem_write_const(u32 addr,bool& ismem,u32 sz);

12
core/hw/pvr/config.h
View File

@ -1,12 +0,0 @@
#define OP_ON 1
#define OP_OFF 2
//Debugging stuff
#define DO_VERIFY OP_OFF
//DO NOT EDIT -- overrides for default according to build options
#ifdef _DEBUG
#undef DO_VERIFY
#define DO_VERIFY OP_ON
#endif

2
core/hw/pvr/drkPvr.cpp
View File

@ -11,10 +11,8 @@
#include "drkPvr.h"
#include "ta.h"
#include "spg.h"
#include "pvr_regs.h"
#include "pvr_mem.h"
#include "Renderer_if.h"
#include "rend/TexCache.h"

8
core/hw/pvr/drkPvr.h
View File

@ -1,14 +1,6 @@
#pragma once
#include "config.h"
//bleh stupid windoze header
#include "types.h"
#include <cstdlib>
#include <cstdio>
#include <cstring>
#include "helper_classes.h"
extern int render_end_schid;

55
core/hw/pvr/pvr_mem.cpp
View File

@ -4,17 +4,12 @@
Most of this was hacked together when i needed support for YUV-dma for thps2 ;)
*/
#include "types.h"
#include "pvr_mem.h"
#include "ta.h"
#include "pvr_regs.h"
#include "Renderer_if.h"
#include "hw/mem/_vmem.h"
//TODO : move code later to a plugin
//TODO : Fix registers arrays , they must be smaller now doe to the way SB registers are handled
#include "hw/holly/holly_intc.h"
#include "hw/holly/sb.h"
#include "hw/holly/holly_intc.h"
static u32 pvr_map32(u32 offset32);
//YUV converter code :)
//inits the YUV converter
@ -37,7 +32,7 @@ void YUV_init()
YUV_x_curr=0;
YUV_y_curr=0;
YUV_dest=TA_YUV_TEX_BASE&VRAM_MASK;//TODO : add the masking needed
YUV_dest = TA_YUV_TEX_BASE & VRAM_MASK;
TA_YUV_TEX_CNT=0;
YUV_blockcount = (TA_YUV_TEX_CTRL.yuv_u_size + 1) * (TA_YUV_TEX_CTRL.yuv_v_size + 1);
@ -47,7 +42,7 @@ void YUV_init()
YUV_x_size=16;
YUV_y_size=16;
}
else // yesh!!!
else
{
YUV_x_size = (TA_YUV_TEX_CTRL.yuv_u_size + 1) * 16;
YUV_y_size = (TA_YUV_TEX_CTRL.yuv_v_size + 1) * 16;
@ -55,34 +50,7 @@ void YUV_init()
YUV_index = 0;
}
static INLINE u8 GetY420(int x, int y,u8* base)
{
//u32 base=0;
if (x > 7)
{
x -= 8;
base += 64;
}
if (y > 7)
{
y -= 8;
base += 128;
}
return base[x+y*8];
}
static INLINE u8 GetUV420(int x, int y,u8* base)
{
int realx=x>>1;
int realy=y>>1;
return base[realx+realy*8];
}
void YUV_Block8x8(u8* inuv,u8* iny, u8* out)
static void YUV_Block8x8(u8* inuv, u8* iny, u8* out)
{
u8* line_out_0=out+0;
u8* line_out_1=out+YUV_x_size*2;
@ -269,8 +237,6 @@ void TAWrite(u32 address,u32* data,u32 count)
}
}
#include "hw/sh4/sh4_mmr.h"
void NOINLINE MemWrite32(void* dst, void* src)
{
memcpy((u64*)dst,(u64*)src,32);
@ -313,16 +279,9 @@ extern "C" void DYNACALL TAWriteSQ(u32 address,u8* sqb)
//Misc interface
//Reset -> Reset - Initialise to default values
void pvr_Reset(bool Manual)
{
if (!Manual)
vram.Zero();
}
#define VRAM_BANK_BIT 0x400000
u32 pvr_map32(u32 offset32)
static u32 pvr_map32(u32 offset32)
{
//64b wide bus is achieved by interleaving the banks every 32 bits
const u32 bank_bit = VRAM_BANK_BIT;

11
core/hw/pvr/pvr_mem.h
View File

@ -1,7 +1,6 @@
#pragma once
#include "types.h"
u32 pvr_map32(u32 offset32);
f32 vrf(u32 addr);
u32 vri(u32 addr);
@ -20,17 +19,7 @@ void DYNACALL pvr_write_area1_32(u32 addr,u32 data);
u32 pvr_ReadReg(u32 addr);
void pvr_WriteReg(u32 paddr,u32 data);
void pvr_Update(u32 cycles);
//Init/Term , global
void pvr_Init();
void pvr_Term();
//Reset -> Reset - Initialise
void pvr_Reset(bool Manual);
void TAWrite(u32 address,u32* data,u32 count);
extern "C" void DYNACALL TAWriteSQ(u32 address,u8* sqb);
void YUV_init();
//registers
#define PVR_BASE 0x005F8000

2
core/hw/pvr/pvr_sb_regs.h
View File

@ -5,4 +5,4 @@
void pvr_sb_Init();
void pvr_sb_Term();
//Reset -> Reset - Initialise
void pvr_sb_Reset(bool Manual);
void pvr_sb_Reset(bool hard);

9
core/hw/pvr/spg.cpp
View File

@ -23,7 +23,6 @@ u32 Line_Cycles=0;
u32 Frame_Cycles=0;
int render_end_schid;
int vblank_schid;
int time_sync;
void CalculateSync()
{
@ -68,11 +67,6 @@ void CalculateSync()
sh4_sched_request(vblank_schid,Line_Cycles);
}
int elapse_time(int tag, int cycl, int jit)
{
return min(max(Frame_Cycles,(u32)1*1000*1000),(u32)8*1000*1000);
}
double speed_load_mspdf;
int mips_counter;
@ -268,9 +262,6 @@ bool spg_Init()
{
render_end_schid=sh4_sched_register(0,&rend_end_sch);
vblank_schid=sh4_sched_register(0,&spg_line_sched);
time_sync=sh4_sched_register(0,&elapse_time);
sh4_sched_request(time_sync,8*1000*1000);
return true;
}

9
core/hw/pvr/ta.cpp
View File

@ -1,5 +1,6 @@
#include "ta.h"
#include "ta_ctx.h"
#include "hw/holly/holly_intc.h"
extern u32 ta_type_lut[256];
@ -91,7 +92,7 @@ static void fill_fsm(ta_state st, s8 pt, s8 obj, ta_state next, u32 proc=0, u32
}
}
void fill_fsm()
static void fill_fsm()
{
//initialise to invalid
for (int i=0;i<2048;i++)
@ -194,7 +195,7 @@ void fill_fsm()
fill_fsm(TAS_MLV64_H,-1,-1,TAS_MLV64); //64 MH -> expect M64
}
const HollyInterruptID ListEndInterrupt[5]=
static const HollyInterruptID ListEndInterrupt[5]=
{
holly_OPAQUE,
holly_OPAQUEMOD,
@ -204,7 +205,7 @@ const HollyInterruptID ListEndInterrupt[5]=
};
NOINLINE void DYNACALL ta_handle_cmd(u32 trans)
static NOINLINE void DYNACALL ta_handle_cmd(u32 trans)
{
Ta_Dma* dat=(Ta_Dma*)(ta_tad.thd_data-32);
@ -283,7 +284,7 @@ void ta_vtx_SoftReset()
ta_cur_state=TAS_NS;
}
INLINE
static INLINE
void DYNACALL ta_thd_data32_i(void* data)
{
if (ta_ctx == NULL)

9
core/hw/pvr/ta.h
View File

@ -1,17 +1,8 @@
#pragma once
#include "drkPvr.h"
#include "hw/holly/holly_intc.h"
#include "hw/sh4/sh4_if.h"
#include "oslib/oslib.h"
#include "ta_structs.h"
struct TA_context;
void ta_init();
void ta_reset();
void ta_term();
void ta_vtx_ListCont();
void ta_vtx_ListInit();
void ta_vtx_SoftReset();

7
core/hw/pvr/ta_ctx.cpp
View File

@ -2,6 +2,7 @@
#include "ta_ctx.h"
#include "hw/sh4/sh4_sched.h"
#include "oslib/oslib.h"
extern u32 fskip;
extern u32 FrameCount;
@ -191,10 +192,10 @@ void FinishRender(TA_context* ctx)
frame_finished.Set();
}
cMutex mtx_pool;
static cMutex mtx_pool;
vector<TA_context*> ctx_pool;
vector<TA_context*> ctx_list;
static vector<TA_context*> ctx_pool;
static vector<TA_context*> ctx_list;
TA_context* tactx_Alloc()
{

2
core/hw/pvr/ta_structs.h
View File

@ -1,6 +1,8 @@
//structs were getting tooo many , so i moved em here !
#pragma once
#include "types.h"
//bits that affect drawing (for caching params)
#define PCW_DRAW_MASK (0x000000CE)

8
core/hw/pvr/ta_vtx.cpp
View File

@ -745,10 +745,10 @@ public:
static void glob_param_bdc_(T* pp)
{
if (CurrentPP == NULL
|| CurrentPP->pcw.full != pp->pcw.full ||
CurrentPP->tcw.full != pp->tcw.full ||
CurrentPP->tsp.full != pp->tsp.full ||
CurrentPP->isp.full != pp->isp.full)
|| CurrentPP->pcw.full != pp->pcw.full
|| CurrentPP->tcw.full != pp->tcw.full
|| CurrentPP->tsp.full != pp->tsp.full
|| CurrentPP->isp.full != pp->isp.full)
{
PolyParam* d_pp = CurrentPP;
if (d_pp == NULL || d_pp->count != 0)

49
core/hw/sh4/sh4_mem.cpp
View File

@ -10,7 +10,6 @@
#include "modules/modules.h"
#include "hw/pvr/pvr_mem.h"
#include "hw/sh4/sh4_core.h"
//#include "hw/sh4/rec_v1/blockmanager.h"
#include "hw/mem/_vmem.h"
#include "modules/mmu.h"
@ -22,14 +21,15 @@ VArray2 mem_b;
//MEM MAPPINNGG
//AREA 1
_vmem_handler area1_32b;
void map_area1_init()
static _vmem_handler area1_32b;
static void map_area1_init()
{
area1_32b = _vmem_register_handler(pvr_read_area1_8,pvr_read_area1_16,pvr_read_area1_32,
pvr_write_area1_8,pvr_write_area1_16,pvr_write_area1_32);
}
void map_area1(u32 base)
static void map_area1(u32 base)
{
//map vram
@ -45,35 +45,35 @@ void map_area1(u32 base)
}
//AREA 2
void map_area2_init()
static void map_area2_init()
{
//nothing to map :p
}
void map_area2(u32 base)
static void map_area2(u32 base)
{
//nothing to map :p
}
//AREA 3
void map_area3_init()
static void map_area3_init()
{
}
void map_area3(u32 base)
static void map_area3(u32 base)
{
//32x2 or 16x4
_vmem_map_block_mirror(mem_b.data,0x0C | base,0x0F | base,RAM_SIZE);
}
//AREA 4
void map_area4_init()
static void map_area4_init()
{
}
void map_area4(u32 base)
static void map_area4(u32 base)
{
//TODO : map later
@ -98,23 +98,23 @@ void DYNACALL WriteMem_extdev_T(u32 addr,T data)
}
_vmem_handler area5_handler;
void map_area5_init()
static void map_area5_init()
{
area5_handler = _vmem_register_handler_Template(ReadMem_extdev_T,WriteMem_extdev_T);
}
void map_area5(u32 base)
static void map_area5(u32 base)
{
//map whole region to plugin handler :)
_vmem_map_handler(area5_handler,base|0x14,base|0x17);
}
//AREA 6 -- Unassigned
void map_area6_init()
static void map_area6_init()
{
//nothing to map :p
}
void map_area6(u32 base)
static void map_area6(u32 base)
{
//nothing to map :p
}
@ -297,14 +297,6 @@ void WriteMemBlock_nommu_sq(u32 dst,u32* src)
}
}
void WriteMemBlock_ptr(u32 addr,u32* data,u32 size)
{
#ifndef NO_MMU
die("failed\n");
#endif
WriteMemBlock_nommu_ptr(addr,data,size);
}
//Get pointer to ram area , 0 if error
//For debugger(gdb) - dynarec
u8* GetMemPtr(u32 Addr,u32 size)
@ -328,13 +320,6 @@ u8* GetMemPtr(u32 Addr,u32 size)
}
}
//Get information about an area , eg ram /size /anything
//For dynarec - needs to be done
void GetMemInfo(u32 addr,u32 size)
{
//needs to be done
}
bool IsOnRam(u32 addr)
{
if (((addr>>26)&0x7)==3)
@ -347,9 +332,3 @@ bool IsOnRam(u32 addr)
return false;
}
u32 GetRamPageFromAddress(u32 RamAddress)
{
verify(IsOnRam(RamAddress));
return (RamAddress & RAM_MASK)/PAGE_SIZE;
}

32
core/hw/sh4/sh4_mem.h
View File

@ -13,13 +13,11 @@ extern VArray2 mem_b;
#define IReadMem16 ReadMem16
#define ReadMem32 _vmem_ReadMem32
#define ReadMem64 _vmem_ReadMem64
//#define ReadMem64(addr,reg) { ((u32*)reg)[0]=_vmem_ReadMem32(addr);((u32*)reg)[1]=_vmem_ReadMem32((addr)+4); }
#define WriteMem8 _vmem_WriteMem8
#define WriteMem16 _vmem_WriteMem16
#define WriteMem32 _vmem_WriteMem32
#define WriteMem64 _vmem_WriteMem64
//#define WriteMem64(addr,reg) { _vmem_WriteMem32(addr,((u32*)reg)[0]);_vmem_WriteMem32((addr)+4, ((u32*)reg)[1]); }
#else
#ifdef _MSC_VER
@ -62,54 +60,26 @@ extern WriteMem64Func WriteMem64;
#define IReadMem16_nommu _vmem_IReadMem16
#define ReadMem32_nommu _vmem_ReadMem32
#define WriteMem8_nommu _vmem_WriteMem8
#define WriteMem16_nommu _vmem_WriteMem16
#define WriteMem32_nommu _vmem_WriteMem32
void WriteMemBlock_ptr(u32 dst,u32* src,u32 size);
void WriteMemBlock_nommu_ptr(u32 dst,u32* src,u32 size);
void WriteMemBlock_nommu_sq(u32 dst,u32* src);
void WriteMemBlock_nommu_dma(u32 dst,u32 src,u32 size);
//Init/Res/Term
void mem_Init();
void mem_Term();
void mem_Reset(bool Manual);
void mem_map_default();
//Generic read/write functions for debugger
bool ReadMem_DB(u32 addr,u32& data,u32 size );
bool WriteMem_DB(u32 addr,u32 data,u32 size );
//Get pointer to ram area , 0 if error
//For debugger(gdb) - dynarec
u8* GetMemPtr(u32 Addr,u32 size);
//Get infomation about an area , eg ram /size /anything
//For dynarec - needs to be done
struct MemInfo
{
//MemType:
//Direct ptr , just read/write to the ptr
//Direct call , just call for read , ecx=data on write (no address)
//Generic call , ecx=addr , call for read , edx=data for write
u32 MemType;
//todo
u32 Flags;
void* read_ptr;
void* write_ptr;
};
void GetMemInfo(u32 addr,u32 size,MemInfo* meminfo);
bool IsOnRam(u32 addr);
u32 GetRamPageFromAddress(u32 RamAddress);
bool LoadRomFiles(const string& root);
void SaveRomFiles(const string& root);
bool LoadHle(const string& root);

1
core/linux-dist/main.cpp
View File

@ -64,7 +64,6 @@ void* libPvr_GetRenderSurface()
u16 kcode[4] = {0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF};
u8 rt[4] = {0, 0, 0, 0};
u8 lt[4] = {0, 0, 0, 0};
u32 vks[4];
s8 joyx[4], joyy[4];
void emit_WriteCodeCache();

1
core/linux-dist/main.h
View File

@ -2,7 +2,6 @@
#include "types.h"
extern u16 kcode[4];
extern u32 vks[4];
extern u8 rt[4], lt[4];
extern s8 joyx[4], joyy[4];

11
core/rend/TexCache.cpp
View File

@ -27,7 +27,7 @@ u32 detwiddle[2][8][1024];
//twiddle works on 64b words
u32 twiddle_slow(u32 x,u32 y,u32 x_sz,u32 y_sz)
static u32 twiddle_slow(u32 x,u32 y,u32 x_sz,u32 y_sz)
{
u32 rv=0;//low 2 bits are directly passed -> needs some misc stuff to work.However
//Pvr internally maps the 64b banks "as if" they were twiddled :p
@ -59,7 +59,7 @@ u32 twiddle_slow(u32 x,u32 y,u32 x_sz,u32 y_sz)
return rv;
}
void BuildTwiddleTables()
static void BuildTwiddleTables()
{
for (u32 s=0;s<8;s++)
{
@ -174,13 +174,6 @@ added_it:
cMutex vramlist_lock;
//simple IsInRange test
inline bool IsInRange(vram_block* block,u32 offset)
{
return (block->start<=offset) && (block->end>=offset);
}
vram_block* libCore_vramlock_Lock(u32 start_offset64,u32 end_offset64,void* userdata)
{
vram_block* block=(vram_block* )malloc(sizeof(vram_block));

5
core/rend/gl4/gldraw.cpp
View File

@ -497,6 +497,11 @@ void gl4DrawStrips(GLuint output_fbo, int width, int height)
previous_pass = current_pass;
continue;
}
DEBUG_LOG(RENDERER, "Render pass %d OP %d PT %d TR %d", render_pass + 1,
current_pass.op_count - previous_pass.op_count,
current_pass.pt_count - previous_pass.pt_count,
current_pass.tr_count - previous_pass.tr_count);
glBindVertexArray(gl4.vbo.main_vao);
if (!skip_op_pt)

5
core/rend/gles/gldraw.cpp
View File

@ -1093,6 +1093,11 @@ void DrawStrips()
for (int render_pass = 0; render_pass < pvrrc.render_passes.used(); render_pass++) {
const RenderPass& current_pass = pvrrc.render_passes.head()[render_pass];
DEBUG_LOG(RENDERER, "Render pass %d OP %d PT %d TR %d", render_pass + 1,
current_pass.op_count - previous_pass.op_count,
current_pass.pt_count - previous_pass.pt_count,
current_pass.tr_count - previous_pass.tr_count);
//initial state
glcache.Enable(GL_DEPTH_TEST);
glcache.DepthMask(GL_TRUE);

19
core/serialize.cpp
View File

@ -140,7 +140,6 @@ extern u32 in_vblank;
extern u32 clc_pvr_scanline;
extern int render_end_schid;
extern int vblank_schid;
extern int time_sync;
//./core/hw/pvr/ta.o
extern u8 ta_fsm[2049]; //[2048] stores the current state
@ -488,9 +487,9 @@ bool dc_serialize(void **data, unsigned int *total_size)
REICAST_S(sch_list[vblank_schid].start) ;
REICAST_S(sch_list[vblank_schid].end) ;
REICAST_S(sch_list[time_sync].tag) ;
REICAST_S(sch_list[time_sync].start) ;
REICAST_S(sch_list[time_sync].end) ;
REICAST_S(i); // sch_list[time_sync].tag
REICAST_S(i); // sch_list[time_sync].start
REICAST_S(i); // sch_list[time_sync].end
#ifdef ENABLE_MODEM
REICAST_S(sch_list[modem_sched].tag) ;
@ -800,9 +799,9 @@ static bool dc_unserialize_libretro(void **data, unsigned int *total_size)
REICAST_US(sch_list[vblank_schid].start) ;
REICAST_US(sch_list[vblank_schid].end) ;
REICAST_US(sch_list[time_sync].tag) ;
REICAST_US(sch_list[time_sync].start) ;
REICAST_US(sch_list[time_sync].end) ;
REICAST_US(i); // sch_list[time_sync].tag
REICAST_US(i); // sch_list[time_sync].start
REICAST_US(i); // sch_list[time_sync].end
#ifdef ENABLE_MODEM
REICAST_US(sch_list[modem_sched].tag) ;
REICAST_US(sch_list[modem_sched].start) ;
@ -1164,9 +1163,9 @@ bool dc_unserialize(void **data, unsigned int *total_size)
REICAST_US(sch_list[vblank_schid].start) ;
REICAST_US(sch_list[vblank_schid].end) ;
REICAST_US(sch_list[time_sync].tag) ;
REICAST_US(sch_list[time_sync].start) ;
REICAST_US(sch_list[time_sync].end) ;
REICAST_US(i); // sch_list[time_sync].tag
REICAST_US(i); // sch_list[time_sync].start
REICAST_US(i); // sch_list[time_sync].end
#ifdef ENABLE_MODEM
REICAST_US(sch_list[modem_sched].tag) ;

1
core/windows/winmain.cpp
View File

@ -197,7 +197,6 @@ void SetupPath()
// Gamepads
u16 kcode[4] = { 0xffff, 0xffff, 0xffff, 0xffff };
u32 vks[4];
s8 joyx[4],joyy[4];
u8 rt[4],lt[4];
// Mouse

1
shell/android-studio/reicast/src/main/jni/src/Android.cpp
View File

@ -143,7 +143,6 @@ extern int screen_width,screen_height;
static char gamedisk[256];
u16 kcode[4] = { 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF };
u32 vks[4];
s8 joyx[4],joyy[4];
u8 rt[4],lt[4];
float vjoy_pos[14][8];

1
shell/apple/emulator-ios/emulator/EmulatorView.mm
View File

@ -12,7 +12,6 @@
#include "types.h"
extern u16 kcode[4];
extern u32 vks[4];
extern s8 joyx[4],joyy[4];
extern u8 rt[4],lt[4];

1
shell/apple/emulator-ios/emulator/EmulatorViewController.mm
View File

@ -23,7 +23,6 @@
#define USE_CRT_SHADER 0
extern u16 kcode[4];
extern u32 vks[4];
extern s8 joyx[4],joyy[4];
extern u8 rt[4],lt[4];

1
shell/apple/emulator-ios/emulator/ios_main.mm
View File

@ -43,7 +43,6 @@ int dc_init(int argc,wchar* argv[]);
void dc_run();
u16 kcode[4];
u32 vks[4];
s8 joyx[4],joyy[4];
u8 rt[4],lt[4];

1
shell/apple/emulator-osx/emulator-osx/osx-main.mm
View File

@ -39,7 +39,6 @@ int darw_printf(const wchar* text, ...)
}
u16 kcode[4] = { 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF };
u32 vks[4];
s8 joyx[4],joyy[4];
u8 rt[4],lt[4];