In addition protect against their use on 32 bit and the use of [ABCD]H
together with a REX prefix on 64 bit.
This assumes that the customOp parameter of WriteREX and operandReg of
OpArg always are registers, and thus needs to give something valid to
WriteREX when that is not the case (WriteShift).
In addition to the patch i sent to the ML, there are a few changes to the
error reporting(mostly whitespace).
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@7202 8ced0084-cf51-0410-be5f-012b33b47a6e
stacks), addition of a register cache(currently accumulators on 64bit only).
It feels a bit slower, but the numbers are about the same.
Caching accumulators doesn't change speed either.
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@6848 8ced0084-cf51-0410-be5f-012b33b47a6e
(acc and ax) and product register with one read/write.
Gives a minuscule speedup of not more than 4%. In exchange, breaks all
your out-of-tree changes to dsp. Tests are not building again, yet.
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@6680 8ced0084-cf51-0410-be5f-012b33b47a6e
* Optimised the updating of g_dsp.pc in the compile loop (code by kiesel-stein)
* Added JIT version of LRI (code by kiesel-stein)
* Added JIT versions of the branch instructions (code by Jack Frost)
* DSP_SendAIBuffer fix (code by Mylek)
* Marked instructions that update g_dsp.pc in the DSP table and updated PC based on the table (speed up)
* Fixed the signed bits not being set properly in the addr instruction
* Created a MainOpFallback function to use interpreted versions of the instructions if necessary (code by kiesel-stein)
* Disabled the jit versions of subarn and addarn as they are slowing down NSMBW
The above work in both x86 and x64 modes.
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@6582 8ced0084-cf51-0410-be5f-012b33b47a6e
still experimental, not totally optimized but must bring a nice speed up
please test for regressions an error. an please Linux people fix scons :)
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@6149 8ced0084-cf51-0410-be5f-012b33b47a6e
* Improved constants folding in load/store instructions
* Merged load instructions
This is almost the same commit as r6076/r6077 but x64 build has been fixed.
Thanks a lot to skidau and BHaaL!!
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@6120 8ced0084-cf51-0410-be5f-012b33b47a6e
* Improved constants folding in load instructions
* Merged load instructions
* Fixed the register allocator so that it can restore the registers state after jumping to the dispatcher (in case of a conditional jump)
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@6076 8ced0084-cf51-0410-be5f-012b33b47a6e
And to help test things like that: DSPJitTester (use with caution on x64, most likely fails there; r5250 might be why)
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@5306 8ced0084-cf51-0410-be5f-012b33b47a6e
* must use a truncating float-to-int conversion, for example.
* introduce optimized variants of the single value psq_st operation (JIT only).
* fix bug in SafeWriteRegToReg when swap = false
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@4861 8ced0084-cf51-0410-be5f-012b33b47a6e
There's some cleanup still to be done, but hey, it works. There shouldn't be a noticable speed difference.
I hope GCC doesn't have a problem with the "member function pointers" I used.
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@1594 8ced0084-cf51-0410-be5f-012b33b47a6e
pierre