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35404 Commits

Author SHA1 Message Date
Pokechu22 332bb6fd55 docs/DSP: Fix operation for LSR/ASR 2021-08-21 16:05:06 -07:00
Pokechu22 2eb791d5e1 docs/DSP: Note that ADDAXL is unsigned 2021-08-21 16:05:06 -07:00
Pokechu22 953670b057 docs/DSP: Fix operation of ADDR and SUBR 2021-08-21 16:05:06 -07:00
Pokechu22 8881ecef19 docs/DSP: Adjust operation for CMPI and CMPIS 
This more clearly indicates what it is supposed to do.
 2021-08-21 16:05:06 -07:00
Pokechu22 79664d419c docs/DSP: Document rounding behavior of CLRL 2021-08-21 16:05:06 -07:00
Pokechu22 1bcea561e9 docs/DSP: Add 'NOP 2021-08-21 16:05:05 -07:00
Pokechu22 29b61d463e docs/DSP: Document 'LD and 'LDAX 2021-08-21 16:05:05 -07:00
Pokechu22 031621bf51 docs/DSP: Document behavior and instructions when the first nybble is 3 2021-08-21 16:05:05 -07:00
Pokechu22 211c2b5d99 docs/DSP: Add most missing instructions 
These instructions were already implememented by Dolphin, but never added to the manual.  Extension instructions will be handled in a later commit, as wlil instructions that were not previously implememented by Dolphin.
 2021-08-21 16:05:05 -07:00
Pokechu22 446b1d2f13 docs/DSP: Adjust bit names in opcode table 
The old names did not match the ones used by the instructions themselves, and were generally fairly inconsistent.
 2021-08-21 16:05:05 -07:00
Pokechu22 16da6e214d docs/DSP: Hyperlink opcode names 2021-08-21 16:05:03 -07:00
Pokechu22 ccc5085988 docs/DSP: Rename 'SLMN to 'SLNM 
This is for consistency with Dolphin, the opcode table, and 'LSNM.
 2021-08-21 16:03:50 -07:00
Pokechu22 2a9e1a3b5d docs/DSP: Document accelerator hardware registers 2021-08-21 16:03:50 -07:00
Pokechu22 c9ed9dd0a7 docs/DSP: Adjust formatting of RegisterBitOverview 2021-08-21 16:03:50 -07:00
Pokechu22 9a269929ec docs/DSP: Improve DMA hardware register information 2021-08-21 16:03:50 -07:00
Pokechu22 b99fbf7e9c docs/DSP: Sort hardware registers by address 
The actual documentation for registers is not changed in this commit; nor are any new registers added.  This is purely to make later diffs more readable.
 2021-08-21 16:03:50 -07:00
Pokechu22 6df892dca7 docs/DSP: Expand DSP Memory Map section 2021-08-21 16:03:50 -07:00
Pokechu22 cfc6de8545 docs/DSP: Fix LOOPI, BLOOP, Jcc, and CALLcc opcode table operands 2021-08-21 16:03:50 -07:00
Pokechu22 5a0155a1cb docs/DSP: Fix ANDCF and ANDF being swapped 
This was implemented in Dolphin in 7c4e654253.  That change also noted that JZR/JNZ were swapped; this was already fixed in facd1dca12.
 2021-08-21 16:03:50 -07:00
Pokechu22 000f7b102a docs/DSP: Fix SBCLR and SBSET being backwards 
Dolphin has them with SBCLR as 1200 and SBSET as 1300 since the inital megacommit: 775dc8a9c0/Source/Plugins/Plugin_DSP_LLE/Src/opcodes.cpp (L67-L68)
 2021-08-21 16:03:49 -07:00
Pokechu22 13051ee291 docs/DSP: Elaborate on SBSET and SBCLR 2021-08-21 16:03:49 -07:00
Pokechu22 bb1ecd2a81 docs/DSP: Add RTI to opcode list 2021-08-21 16:03:41 -07:00
Pokechu22 2c73de7ada docs/DSP: Add missing already-documented instructions to opcode table 2021-08-21 11:40:54 -07:00
Pokechu22 d9f8df3cbe docs/DSP: Fix typo in HALT encoding 
"I think I saw a two"
 2021-08-21 11:40:54 -07:00
Pokechu22 35720284f3 docs/DSP: Fix various spelling/grammar/punctuation issues 2021-08-21 11:40:54 -07:00
Pokechu22 2df33ddbbc docs/DSP: Create .gitignore 
This is from https://github.com/github/gitignore/blob/master/TeX.gitignore (CC0)
 2021-08-21 11:40:54 -07:00
Pokechu22 c1242fbd6c docs/DSP: Update version and history 
The GFDL requires the history section to be updated.  Although there was no actual release, this makes it attribution clearer and separates it from my changes.
 2021-08-21 11:40:22 -07:00
Mai M 17a01c894b
Merge pull request #10044 from AdmiralCurtiss/invalidate-icache-lines-fix 
PowerPC: Fix for calling InvalidateICacheLines() with a count of 1 causing a (harmless) second invalidation.
 2021-08-19 19:23:11 -04:00
Admiral H. Curtiss f5cd17925a PowerPC: Fix for calling InvalidateICacheLines() with a count of 1 causing a (harmless) second invalidation. 2021-08-19 22:54:34 +02:00
Tilka 3aaab25810
Merge pull request #10032 from Pokechu22/dsp-lle-masks 
DSP masking and sign extension fixes
 2021-08-18 20:20:31 +01:00
Mai M 33154de614
Merge pull request #10039 from OatmealDome/spdx-leftovers 
Fix some missed items from SPDX transition
 2021-08-17 23:02:32 -04:00
Mai M 6863b7ae9e
Merge pull request #10036 from JosJuice/jitarm64-psq-x 
JitArm64: Implement indexed paired loadstore instructions
 2021-08-17 23:00:57 -04:00
Mai M 437b475254
Merge pull request #10037 from OatmealDome/min-macos-bump 
Bump minimum macOS to 10.13 High Sierra
 2021-08-17 22:59:43 -04:00
OatmealDome 5c5c3b8856 DolphinQt: Copy COPYING and Licenses directory to output 2021-08-17 22:40:27 -04:00
OatmealDome 6aa2a6b466 UISettings: Remove missed comment about license.txt 2021-08-17 22:35:42 -04:00
OatmealDome 0a6ac4d993 AboutDialog: Fix broken license link 2021-08-17 22:34:53 -04:00
OatmealDome e5a80995dc Bump minimum macOS to 10.13 High Sierra 2021-08-17 16:27:22 -04:00
JosJuice b24b79e373 JitArm64: Implement indexed paired loadstore instructions 
After writing 23b81ef without realizing that we hadn't actually
implemented the indexed paired loadstore instructions yet,
I am now implementing them.
 2021-08-17 11:29:38 +02:00
JMC47 a36855c983
Merge pull request #9818 from JosJuice/jits-cdts-double 
Jits: Don't use fast double-to-single when input is double precision
 2021-08-17 05:21:08 -04:00
JMC47 d162015112
Merge pull request #10007 from AdmiralCurtiss/x64-dcbx-in-loop 
Jit64: dcbx loop detection for improved performance when invalidating large memory regions.
 2021-08-16 21:27:16 -04:00
Admiral H. Curtiss 8b2f5d5006 Jit64: Optimize dcbx being called in a loop over a large memory region. 2021-08-17 02:38:00 +02:00
Pokechu22 439bf1597b DSPJitUtil: Remove redundant handling of ac0.h and ac1.h 
m_gpr.WriteReg calls PutReg which already handles the sign extension.
 2021-08-16 15:09:20 -07:00
Pokechu22 3b4bc9852f DSPInterpreter: Fix sign extension of accumulators 
The extension needs to happen in SetLongAcc, not GetLongAcc, as the extension needs to always be reflected in acS.h.

There is no functional difference with the write handler for acS.h, but it is more readable than 4 casts in a row.
 2021-08-16 15:09:20 -07:00
Pokechu22 858d0675b9 DSPLLE: Handle cr, sr, and prod.h masking 2021-08-16 15:09:20 -07:00
Mai M 62c3c1a23b
Merge pull request #10034 from JosJuice/jitarm64-w 
JitArm64: Fix paired loadstore instruction decoding
 2021-08-16 17:08:43 -04:00
Mai M d48d6f280a
Merge pull request #10033 from Pokechu22/dsp-jit-table-masking 
DSP/Jit: simplify opcode table by masking
 2021-08-16 17:08:18 -04:00
JosJuice 23b81ef495 JitArm64: Fix paired loadstore instruction decoding 
One of those fun "how did this ever work" bugs.
 2021-08-16 22:08:30 +02:00
Pokechu22 6772d26935 DSP/Jit: simplify opcode table by masking 
This was done for the interpreter in aaa19acbd0.
 2021-08-16 12:47:31 -07:00
Tilka 0f628ff882
Merge pull request #10028 from GerbilSoft/bugfix/RVT-firmware-filenames 
VolumeVerifier: Use correct IOS filename for development discs.
 2021-08-16 20:47:07 +01:00
Pokechu22 3d6ff60a96 DSPSpy: Handle modified wr0 and cr registers correctly 2021-08-16 09:51:16 -07:00