DSPSpy: Handle modified wr0 and cr registers correctly
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@ -173,6 +173,9 @@ send_back:
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; first, store $sr so we can modify it
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sr @(REGS_BASE + 19), $sr
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set16
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; Now store $wr0, as it must be 0xffff for srri to work as we expect
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sr @(REGS_BASE + 8), $wr0
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lri $wr0, #0xffff
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; store registers to reg table
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sr @REGS_BASE, $ar0
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lri $ar0, #(REGS_BASE + 1)
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@ -183,7 +186,8 @@ send_back:
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srri @$ar0, $ix1
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srri @$ar0, $ix2
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srri @$ar0, $ix3
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srri @$ar0, $wr0
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; skip $wr0 since we already stored and modified it
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iar $ar0
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srri @$ar0, $wr1
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srri @$ar0, $wr2
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srri @$ar0, $wr3
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@ -210,6 +214,9 @@ send_back:
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srri @$ar0, $ac1.m
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; Regs are stored. Prepare DMA.
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; $cr must be 0x00ff because the ROM uses lrs and srs with the assumption that
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; they will modify hardware registers.
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lri $cr, #0x00ff
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lri $ax0.l, #0x0000
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lri $ax1.l, #1 ;(DSP_CR_IMEM | DSP_CR_TO_CPU)
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lri $ax0.h, #0x200
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@ -246,7 +253,8 @@ dma_copy:
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lrri $ix1, @$ar0
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lrri $ix2, @$ar0
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lrri $ix3, @$ar0
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lrri $wr0, @$ar0
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; leave $wr for later
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iar $ar0
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lrri $wr1, @$ar0
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lrri $wr2, @$ar0
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lrri $wr3, @$ar0
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@ -272,6 +280,7 @@ dma_copy:
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lrri $ac0.m, @$ar0
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lrri $ac1.m, @$ar0
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lr $ar0, @REGS_BASE
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lr $wr0, @(REGS_BASE+8)
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lr $sr, @(REGS_BASE+19)
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ret ; from send_back
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