Fiora
6603f98d04
JIT: add 64-bit write support to FIFO functions
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Also fix 64-bit values passed to CallAC and otherwise correct immediate
handling in FIFO writes.
Fixes 007 Nightfire.
2014-11-09 21:24:30 -08:00
skidau
9ddbdeb39f
Merge pull request #995 from FioraAeterna/fma
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Add FMA support to emitter and use it in the JIT
2014-10-12 13:56:18 +11:00
Henrik Rydgård
877081c7df
Be consistent with braces.
2014-10-10 22:34:03 +02:00
Henrik Rydgård
9bca1a00d7
x64 emitter: Add some more missing ops (MOVDQA, MOVDQU, PSHUFHW)
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Also constify some pointers.
2014-10-10 18:30:05 +02:00
Henrik Rydgård
a2c46665c5
x64 emitter: Add a few missing instructions
2014-10-10 18:30:04 +02:00
Fiora
019657cd93
X64Emitter: add FMA3 support
2014-10-07 18:21:07 -07:00
Fiora
7a2dd3a3c6
x64Emitter: refactor, add some new AVX instructions
2014-10-03 10:05:10 -07:00
Fiora
ac1fc9ad03
JIT+Emitter: support locking flags
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This helps us avoid accidentally clobbering flags between two instructions
when the flags are expected to be maintained. Dolphin will of course crash
immediately, but at least it will crash loudly and alert us of the mistake,
instead of forcing hours of bisecting to find the subtle way in which the JIT
has managed to sneak a flag-modifying instruction where there shouldn't be one.
2014-09-26 20:47:06 -07:00
Fiora
3c49200b22
X64Emitter: add MOVHLPS/MOVLHPS
2014-09-18 17:57:27 -07:00
comex
7ad9027593
Be pedantic about stack overflow on Linux and OS X.
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Add some magic to the fault handler to handle stack overflow due to BLR
optimization, and disable the optimization if fastmem is not enabled.
2014-09-17 20:08:09 -04:00
Fiora
02dce5dbbf
x64Emitter: fix silent failure if WriteNormalOp is passed two memory operands
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Should now fail loudly and clearly instead.
2014-09-15 07:08:08 -07:00
Fiora
997c5c2d0e
x64Emitter: add LZCNT/TZCNT support and detection
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Also add a unit test.
2014-09-14 05:31:22 -07:00
Fiora
18d83a310e
X64Emitter: support shorter mov reg, imm opcodes
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Also refactor WriteNormalOp a little bit and add comments.
2014-09-11 11:40:30 -07:00
Rohit Nirmal
fbc64984ca
Include CommonTypes.h instead of Common.h.
2014-09-08 15:39:58 -04:00
Rohit Nirmal
629ceaf2b1
Split some parts of UpdateBoundingBox into multiple lines. Also,
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fix issues causing failure on Lint.
2014-09-06 09:49:27 -05:00
Rohit Nirmal
1ecb318bcc
Fix some formatting (new lines on collapsed single-line conditionals,
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new lines for opening braces).
2014-09-06 01:23:05 -05:00
Fiora
5088a2b4e2
x64Emitter: add BMI1/BMI2 support
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TZCNT and LZCNT use a completely different encoding scheme, so they should
probably go in a separate patch.
Also add some tests.
2014-09-03 10:04:01 -07:00
shuffle2
532b7bb7da
Merge pull request #893 from rohitnirmal/scan-build-fixes
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Scan build fixes
2014-09-02 23:15:18 -07:00
Fiora
9e4419e786
x64Emitter: add support for shorter EAX forms of instructions
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Should save a few bytes of code size here and there.
2014-09-02 21:52:41 -07:00
Pierre Bourdon
e72146d19c
x64Emitter: Do not assert-fail on redundant MOVs, instead show an error log
2014-09-02 10:17:32 +02:00
Pierre Bourdon
cc0b048c0b
x64Emitter: Support FLD/FSTP with 80 bits operands
2014-09-02 09:52:59 +02:00
Pierre Bourdon
f99f302c91
x64Emitter: assert instead of crashing when generating MOVZX with a wrong size
2014-09-02 09:52:04 +02:00
Pierre Bourdon
b1738b60fc
x64Emitter: Fix MUL with AH/BH/CH/DH registers.
2014-09-02 09:52:04 +02:00
Pierre Bourdon
f0e8b1fda8
x64Emitter: Error out on 8 bits CMOV, and emit 16 bits CMOV properly
2014-09-02 09:52:04 +02:00
Pierre Bourdon
d4ec9737bd
x64Emitter: Assert when using an invalid POP instead of generating an INT3
2014-09-02 09:52:04 +02:00
Pierre Bourdon
9c4daac3a4
x64Emitter: RDTSC now without a typo'd name
2014-09-02 09:52:04 +02:00
Lioncash
ec9fc6bfc1
Common: Remove unnecessary "using namespace Gen;" from x64emitter
2014-09-01 23:10:56 -04:00
Lioncash
ba4934b75e
Common: Clean up brace placements
2014-08-30 18:06:35 -04:00
Fiora
f9d4ff0d5d
x64Emitter: add support for some missing CVT instructions
2014-08-27 20:15:42 -07:00
Rohit Nirmal
4c14ebdf32
Remove pointless initializations.
2014-08-27 20:36:49 -05:00
Tillmann Karras
80be585fef
x64Emitter: remove redundant "Gen::"
2014-08-20 02:56:07 +02:00
Tillmann Karras
a363f4fa3e
x64Emitter: make 'packed' parameter a bool
2014-08-20 02:54:30 +02:00
Fiora
802b28daf9
x64Emitter: refactor to support longer opcodes
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Also add some new SSE4 opcodes.
2014-08-17 04:48:17 -07:00
Fiora
75b3e425fd
x64Emitter: optimize immediate sizes
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A nice alternative than trying to do it throughout the JIT.
2014-08-07 13:07:27 -04:00
Ryan Houdek
0c24e1dcf2
Remove the rest of x86_32 support from Common.
2014-08-03 13:49:46 -05:00
Pierre Bourdon
9b9817f927
x64Emitter: Fix REX encoding for SETcc
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Previously using the new "lower 8 bits" registers (SIL, SPL, ...) caused SETcc
to write to other registers (for example, SETcc SIL would generate SETcc DH).
2014-07-30 06:41:29 -07:00
Tillmann Karras
6df48ed432
x64Emitter: add CVTTPD2DQ
2014-07-15 23:53:56 +02:00
Lioncash
bd377b9580
Merge pull request #443 from magumagu/loadstore-cleanup
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Loadstore cleanup
2014-06-26 21:32:59 -04:00
Lioncash
ca5340ebde
Centralize the logging code into its own folder in Common.
2014-06-25 22:11:42 -04:00
magumagu
06864e9fee
JIT: Clean up float loads and stores.
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Less code is good, and this should make future changes to memory handling
easier.
2014-06-20 12:52:39 -07:00
Tillmann Karras
f8280401f6
x64Emitter: J_CC: use 32 bit offset automatically
2014-06-03 23:08:58 +02:00
Tillmann Karras
e659f5ac58
JitBackpatch: fix NOP padding
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The new NOP emitter breaks when called with a negative count. As it
turns out, it did happen when deoptimizing 8 bit MOVs because they are
only 4 bytes long and need no BSWAP.
2014-04-30 15:26:11 +02:00
Tillmann Karras
957649b7af
Optimize NOPs
2014-04-23 21:15:09 +02:00
Pierre Bourdon
b2597739ff
x64Emitter: Add the MOVBE instruction.
2014-04-11 23:33:21 +02:00
Pierre Bourdon
664c8d30a0
Remove all trailing whitespaces from our codebase.
2014-03-29 11:05:44 +01:00
magumagu
03292eabc2
Fix OpArg::WriteRex with 8-bit memory operand.
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Previously he function was misbehaving because of a missing check for
whether an 8-bit operand was a register operand; it would therefore
emit unnecessary REX prefixes, incorrectly assert on 32-bit targets, and
could potentially emit wrong code in rare cases (like a memory to register
operation involving AH.)
Also, some cleanup while I was in the area to make the function easier to
read.
2014-03-25 14:09:15 -07:00
Matthew Parlane
31cfc73a09
Fixes spacing for "for", "while", "switch" and "if"
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Also moved && and || to ends of lines instead of start.
Fixed misc vertical alignments and some { needed newlining.
2014-03-11 00:35:07 +13:00
Ryan Houdek
4f02132f93
Make our architecture defines less stupid.
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Our defines were never clear between what meant 64bit or x86_64
This makes a clear cut between bitness and architecture.
This commit also has the side effect of bringing up aarch64 compiling support.
2014-03-04 09:36:59 -06:00
Pierre Bourdon
311caef094
Merge pull request #25 from Tilka/ppc_fp
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Fix non-IEEE mode
2014-02-23 04:15:37 +01:00
Pierre Bourdon
83b7bb64aa
Make Common/ mostly IWYU clean (and fix errors in rest of the project detected by this change).
2014-02-22 23:37:29 +01:00