Commit Graph

25159 Commits

Author SHA1 Message Date
Lioncash e1f41bab1c DSP: Make mailboxes use std::array
Makes the array strongly typed and prevents pointer decay. This also
allows for tuning bounds checks with various implementations.
2020-12-29 12:27:56 -05:00
Lioncash f9d8d06037 DSP: Make mailboxes private
These aren't used externally anywhere and can be made private.
2020-12-29 12:27:40 -05:00
Lioncash 024e983c3a DSP: Make Mailbox enum strongly typed
Avoids implicit conversions and also prevents dumping identifiers into
the current namespace.
2020-12-29 12:20:00 -05:00
Léo Lam ee048ad83c
Merge pull request #9377 from lioncash/analyzer
DSPAnalyzer: Migrate off file-scope state
2020-12-29 18:04:54 +01:00
Léo Lam 5ff2cb9a74
Merge pull request #9383 from lioncash/cr-fn
DSP: Eliminate some magic values related to the CR register
2020-12-29 17:37:24 +01:00
Léo Lam 15d4ddf5da
Merge pull request #9379 from Pokechu22/audio-latency-disable
Fix latency field being initially enabled on audio backends not supporting it
2020-12-29 17:28:10 +01:00
Léo Lam 5e186f4830
Merge pull request #9382 from lioncash/precise
DSPCore: Move PRECISE_BACKLOG define to the interpreter code
2020-12-29 17:17:59 +01:00
Léo Lam f21e1d1859
Merge pull request #9381 from JosJuice/fix-core-filters
Fix Core.vcxproj.filters
2020-12-29 17:16:56 +01:00
Lioncash 359fe0d8c3 DSPCore: Move PRECISE_BACKLOG define to the interpreter code
The only usages of this define are within this source file.
2020-12-29 09:50:40 -05:00
Lioncash 64f93610ee DSP: Eliminate some magic values related to the CR register
Makes some values more immediately readable.
2020-12-29 09:43:04 -05:00
JosJuice 732887ec85 Fix Core.vcxproj.filters
Without this, Visual Studio will try to fix the problem on
its own any time the file is changed.
2020-12-29 13:50:37 +01:00
Pokechu22 147636986d Fix latency field being initially enabled on audio backends not supporting it 2020-12-28 17:06:02 -08:00
Lioncash 8aecaf784c DSPAnalyzer: Separate instruction searching and idle skip finding
Places them into their own function to keep their functionality isolated
and self-documenting.
2020-12-28 13:15:48 -05:00
Lioncash cc512a7524 DSPAnalyzer: Break tight coupling to SDSP
Allows the analyzer to exist independently of the DSP structure. This
allows for unit-tests to be created in a nicer manner.

SDSP is only necessary during the analysis phase, so we only need to
keep a reference around to it then as opposed to the entire lifecycle of
the analyzer.

This also allows the copy/move assignment operators to be defaulted, as
a reference member variable prevents that.
2020-12-28 13:15:48 -05:00
Lioncash f9c488f0d9 DSPAnalyzer: Merge Analyzer namespace into DSP namespace
Now that the Analyzer class fully encapsulates all analyzer state, the
namespace is no longer necessary.
2020-12-28 13:15:48 -05:00
Lioncash 9d1c8fe492 DSPAnalyzer: Make CodeFlags private to the analyzer
Now that we have the convenience functions around the flag
bit manipulations, there's no external usages of the flags, so we can
make these private to the analyzer implementation.

Now the Analyzer namespace is largely unnecessary and can be merged with
the DSP namespace in the next commit.
2020-12-28 13:15:48 -05:00
Lioncash 2ff4d04785 DSPAnalyzer: Add convenience functions over bit tests
Makes it harder to accidentally misuse and increases readability.
2020-12-28 13:15:45 -05:00
Lioncash 5756ece7ce DSPAnalyzer: Implement DSP analyzer skeleton and use it
Attempts to simply make use of the interface. Cleanup will follow in
subsequent commits to make for nicer review.
2020-12-28 11:37:29 -05:00
Lioncash 8f4c6ad7b1 DSPAnalyzer: Add basic class skeleton
Adds the non-functional skeleton for the to-be Analyzer interface with
deglobalized components.
2020-12-28 10:47:12 -05:00
Léo Lam 3f68aceaca
Merge pull request #9348 from lioncash/dsp-deglobal
DSP: Eliminate most global state
2020-12-28 15:48:11 +01:00
iWeaker4you a636fcf230
BitUtils: Fix uint64_t gcc compile (Linux) 2020-12-28 11:50:57 +01:00
LC 28a666a35f
Merge pull request #9363 from MerryMage/rorx
Jit_Integer: Use RORX where possible
2020-12-27 22:25:03 -05:00
LC 4b24215efb
Merge pull request #9371 from MerryMage/rlwinmx-BEXTR
Jit_Integer: rlwinmx: Use BEXTR where possible
2020-12-27 22:24:17 -05:00
LC fcd86e9b21
Merge pull request #9370 from MerryMage/rlwinmx
Jit_Integer: rlwinmx: Generalize byte/word extract plus shift case
2020-12-27 22:23:18 -05:00
LC d06d59e9c2
Merge pull request #9262 from Sintendo/jit64imm
Jit64: More constant propagation optimizations
2020-12-27 22:21:25 -05:00
MerryMage e415580f54 Jit_Integer: Use Common::CountLeadingZeros in cntlzwx 2020-12-28 01:08:50 +00:00
MerryMage 7e9824611e Interpreter_Integer: Use Common::CountLeadingZeros in cntlzwx 2020-12-28 01:08:50 +00:00
MerryMage d695fcb126 BitUtils: Add CountLeadingZeros 2020-12-27 22:56:43 +00:00
Léo Lam 4705af59c6
Merge pull request #9355 from JosJuice/perfmon
Call UpdatePerformanceMonitor when needed
2020-12-27 16:13:36 +01:00
MerryMage 73b6166f18 Jit_Integer: rlwinmx: Use BEXTR where possible 2020-12-27 15:08:45 +00:00
MerryMage 11643ee2f0 Jit_Integer: rlwinmx: Generalize byte/word extract plus shift case 2020-12-27 14:43:51 +00:00
JosJuice 74ba993b4a
Merge pull request #9364 from MerryMage/AndWithMask
Jit_Integer: Add trivial AndWithMask cases
2020-12-27 12:45:34 +01:00
Lioncash 5f65bad68c DSP: Migrate code that modifies m_dsp into SDSP itself
Localizes code that modifies m_dsp into the struct itself. This reduces
the overal coupling between DSPCore and SDSP by reducing access to its
member variables.

This commit is only code movement and has no functional changes.
2020-12-27 06:38:23 -05:00
Lioncash 7d1bd565a6 DSP: Eliminate most global state
An unfortunately large single commit that deglobalizes the DSP code.
(which I'm very sorry about).

This would have otherwise been extremely difficult to separate due to
extensive use of the globals in very coupling ways that would result in
more scaffolding to work around than is worth it.

Aside from the video code, I believe only the DSP code is the hairiest
to deal with in terms of globals, so I guess it's best to get this dealt
with right off the bat.

A summary of what this commit does:
  - Turns the DSPInterpreter into its own class
    This is the most involved portion of this change.
    The bulk of the changes are turning non-member functions into member
    functions that would be situated into the Interpreter class.

  - Eliminates all usages to globals within DSPCore.
    This generally involves turning a lot of non-member functions into
    member functions that are either situated within SDSP or DSPCore.

  - Discards DSPDebugInterface (it wasn't hooked up to anything,
    and for the sake of eliminating global state, I'd rather get rid of
    it than think up ways for this class to be integrated with
    everything else.

  - Readjusts the DSP JIT to handle calling out to member functions.
    In most cases, this just means wrapping respective member function
    calles into thunk functions.

Surprisingly, this doesn't even make use of the introduced System class.
It was possible all along to do this without it. We can house everything
within the DSPLLE class, which is quite nice =)
2020-12-27 06:38:02 -05:00
Léo Lam 2917af03ec
Merge pull request #9362 from iwubcode/freelook_fix_crash
VideoCommon: Fix crash that occurs on loading a fifo log when Free Look is enabled
2020-12-27 11:37:50 +01:00
MerryMage bea6a86893 Jit_Integer: Add trivial AndWithMask cases
Add cases to handle all one and all zero masks.
2020-12-27 00:18:06 +00:00
MerryMage 946e1b9054 Jit_Integer: Missed AndWithMask in rlwimix 2020-12-26 23:33:33 +00:00
iwubcode 16dc2fa379 VideoCommon: Fix crash that occurs on loading a fifo log due to uninitialized Free Look control type 2020-12-26 17:26:21 -06:00
MerryMage e1024fc6ba Jit_Integer: Use RORX where possible 2020-12-26 23:00:04 +00:00
JosJuice ce599f9f46
Merge pull request #9359 from leoetlino/gdbstub-on
Fix GDBStub build and build it by default
2020-12-26 12:02:36 +01:00
Léo Lam dcc313fd96
Merge pull request #9346 from Sintendo/jitarm64ub
JitArm64: Fix signed bitwise left shift UB
2020-12-26 11:56:33 +01:00
Léo Lam d2f9991b0f
Merge pull request #9360 from Minty-Meeo/osreport-split
Split OSREPORT logging type
2020-12-26 11:41:18 +01:00
Sintendo 67d2fa11f1 Jit64: srawx - Handle constant zero input
Shifting zero by any amount always gives zero.

Before:
41 B9 00 00 00 00    mov         r9d,0
41 8B CF             mov         ecx,r15d
49 C1 E1 20          shl         r9,20h
49 D3 F9             sar         r9,cl
49 C1 E9 20          shr         r9,20h

After:
Nothing, register is set to constant zero.

Before:
41 B8 00 00 00 00    mov         r8d,0
41 8B CF             mov         ecx,r15d
49 C1 E0 20          shl         r8,20h
49 D3 F8             sar         r8,cl
41 8B C0             mov         eax,r8d
49 C1 E8 20          shr         r8,20h
44 85 C0             test        eax,r8d
0F 95 45 58          setne       byte ptr [rbp+58h]

After:
C6 45 58 00          mov         byte ptr [rbp+58h],0

Occurs a bunch of times in Super Mario Sunshine. Since this is an
arithmetic shift a similar optimization can be done for constant -1
(0xFFFFFFFF), but I couldn't find any game where this happens.
2020-12-25 19:30:51 +01:00
Sintendo 10d65519f9 Jit64: slwx - Handle constant zero input
Shifting zero by any amount always gives zero.

Before:
41 BF 00 00 00 00    mov         r15d,0
8B CF                mov         ecx,edi
49 D3 E7             shl         r15,cl
45 8B FF             mov         r15d,r15d

After:
Nothing, register is set to constant zero.

All games I've tried hit this optimization on launch. In Soul Calibur II
it occurs very frequently during gameplay.
2020-12-25 19:30:51 +01:00
Sintendo 1a52fdf7e3 Jit64: rlwnmx - Optimize rotate by constant
Only removes the scratch register and a MOV, but hey.

Before:
B9 02 00 00 00       mov         ecx,2
41 8B F5             mov         esi,r13d
D3 C6                rol         esi,cl
83 E6 01             and         esi,1

After:
41 8B F5             mov         esi,r13d
C1 C6 02             rol         esi,2
83 E6 01             and         esi,1
2020-12-25 19:30:51 +01:00
Sintendo cb70d5ee4f Jit64: srawix - Handle constant input register
Much like we did for srawx. This was already implemented on JitArm64.

Before:
B8 00 00 00 00       mov         eax,0
8B F0                mov         esi,eax
C1 E8 1F             shr         eax,1Fh
23 C6                and         eax,esi
D1 FE                sar         esi,1
88 45 58             mov         byte ptr [rbp+58h],al

After:
C6 45 58 00          mov         byte ptr [rbp+58h],0
2020-12-25 19:30:51 +01:00
Sintendo 8ac40162da Jit64: srawx - Handle constant input registers
If both input registers hold known values at compile time, we can just
calculate the result on the spot.

Code has mostly been copied from JitArm64 where it had already been implemented.

Before:
BF FF FF FF FF       mov         edi,0FFFFFFFFh
8B C7                mov         eax,edi
C1 FF 10             sar         edi,10h
C1 E0 10             shl         eax,10h
85 F8                test        eax,edi
0F 95 45 58          setne       byte ptr [rbp+58h]

After:
C6 45 58 01          mov         byte ptr [rbp+58h],1
2020-12-25 19:30:51 +01:00
Sintendo b968120f8a Jit64: srawx - Optimize shift by constant
More efficient code can be generated if the shift amount is known at
compile time. We can once again take advantage of shifts with the shift
amount in an 8-bit immediate to eliminate ECX as a scratch register,
reducing register pressure and removing the occasional spill. We can
also do 32-bit shifts instead of 64-bit operations.

We recognize four distinct cases:

- The special case where we're dealing with the PowerPC's quirky shift
  amount masking. If the shift amount is a number from 32 to 63, all
  bits are shifted out and the result it either all zeroes or all ones.

Before:
B9 F0 FF FF FF       mov         ecx,0FFFFFFF0h
8B F7                mov         esi,edi
48 C1 E6 20          shl         rsi,20h
48 D3 FE             sar         rsi,cl
8B C6                mov         eax,esi
48 C1 EE 20          shr         rsi,20h
85 F0                test        eax,esi
0F 95 45 58          setne       byte ptr [rbp+58h]

After:
8B F7                mov         esi,edi
C1 FE 1F             sar         esi,1Fh
0F 95 45 58          setne       byte ptr [rbp+58h]

- The shift amount is zero. Not calculation needs to be done, just clear
  the carry flag.

Before:
B9 00 00 00 00       mov         ecx,0
49 C1 E5 20          shl         r13,20h
49 D3 FD             sar         r13,cl
41 8B C5             mov         eax,r13d
49 C1 ED 20          shr         r13,20h
44 85 E8             test        eax,r13d
0F 95 45 58          setne       byte ptr [rbp+58h]

After:
C6 45 58 00          mov         byte ptr [rbp+58h],0

- The carry flag doesn't need to be computed. Just do the arithmetic
  shift.

Before:
B9 02 00 00 00       mov         ecx,2
48 C1 E7 20          shl         rdi,20h
48 D3 FF             sar         rdi,cl
48 C1 EF 20          shr         rdi,20h

After:
C1 FF 02             sar         edi,2

- The carry flag must be computed. In addition to the arithmetic shift,
  we do a shift to the left and and them together to know if any ones
  were shifted out. It's still better than before, because we can do
  32-bit shifts.

Before:
B9 02 00 00 00       mov         ecx,2
49 C1 E5 20          shl         r13,20h
49 D3 FD             sar         r13,cl
41 8B C5             mov         eax,r13d
49 C1 ED 20          shr         r13,20h
44 85 E8             test        eax,r13d
0F 95 45 58          setne       byte ptr [rbp+58h]

After:
41 8B C5             mov         eax,r13d
41 C1 FD 02          sar         r13d,2
C1 E0 1E             shl         eax,1Eh
44 85 E8             test        eax,r13d
0F 95 45 58          setne       byte ptr [rbp+58h]
2020-12-25 19:30:51 +01:00
Sintendo 17dc870847 Jit64: slwx - Optimize shift by constant
More efficient code can be generated if the shift amount is known at
compile time. Similar optimizations were present in JitArm64 already,
but were missing in Jit64.

- By using an 8-bit immediate we can eliminate the need for ECX as a
  scratch register, thereby reducing register pressure and occasionally
  eliminating a spill.

Before:
B9 18 00 00 00       mov         ecx,18h
41 8B F7             mov         esi,r15d
48 D3 E6             shl         rsi,cl
8B F6                mov         esi,esi

After:
41 8B CF             mov         ecx,r15d
C1 E1 18             shl         ecx,18h

- PowerPC has strange shift amount masking behavior which is emulated
  using 64-bit shifts, even though we only care about a 32-bit result.
  If the shift amount is known, we can handle this special case
  separately, and use 32-bit shift instructions otherwise. We also no
  longer need to clear the upper 32 bits of the register.

Before:
BE F8 FF FF FF       mov         esi,0FFFFFFF8h
8B CE                mov         ecx,esi
41 8B F4             mov         esi,r12d
48 D3 E6             shl         rsi,cl
8B F6                mov         esi,esi

After:
Nothing, register is set to constant zero.

- A shift by zero becomes a simple MOV.

Before:
BE 00 00 00 00       mov         esi,0
8B CE                mov         ecx,esi
41 8B F3             mov         esi,r11d
48 D3 E6             shl         rsi,cl
8B F6                mov         esi,esi

After:
41 8B FB             mov         edi,r11d
2020-12-25 19:30:51 +01:00
Sintendo 17db359979 Jit64: srwx - Optimize shift by constant
More efficient code can be generated if the shift amount is known at
compile time. Similar optimizations were present in JitArm64 already,
but were missing in Jit64.

- By using an 8-bit immediate we can eliminate the need for ECX as a
  scratch register, thereby reducing register pressure and occasionally
  eliminating a spill.

Before:
B9 18 00 00 00       mov         ecx,18h
45 8B C1             mov         r8d,r9d
49 D3 E8             shr         r8,cl

After:
45 8B C1             mov         r8d,r9d
41 C1 E8 18          shr         r8d,18h

- PowerPC has strange shift amount masking behavior which is emulated
  using 64-bit shifts, even though we only care about a 32-bit result.
  If the shift amount is known, we can handle this special case
  separately, and use 32-bit shift instructions otherwise.

Before:
B9 F8 FF FF FF       mov         ecx,0FFFFFFF8h
45 8B C1             mov         r8d,r9d
49 D3 E8             shr         r8,cl

After:
Nothing, register is set to constant zero.

- A shift by zero becomes a simple MOV.

Before:
B9 00 00 00 00       mov         ecx,0
45 8B C1             mov         r8d,r9d
49 D3 E8             shr         r8,cl

After:
45 8B C1             mov         r8d,r9d
2020-12-25 19:30:51 +01:00