Jit_Integer: Use RORX where possible
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@ -103,6 +103,8 @@ public:
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void ComputeRC(preg_t preg, bool needs_test = true, bool needs_sext = true);
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void AndWithMask(Gen::X64Reg reg, u32 mask);
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void RotateLeft(int bits, Gen::X64Reg regOp, const Gen::OpArg& arg, u8 rotate);
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bool CheckMergedBranch(u32 crf) const;
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void DoMergedBranch();
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void DoMergedBranchCondition();
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@ -202,6 +202,27 @@ void Jit64::AndWithMask(X64Reg reg, u32 mask)
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AND(32, R(reg), Imm32(mask));
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}
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void Jit64::RotateLeft(int bits, X64Reg regOp, const OpArg& arg, u8 rotate)
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{
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const bool is_same_reg = arg.IsSimpleReg(regOp);
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if (cpu_info.bBMI2 && !is_same_reg && rotate != 0)
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{
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RORX(bits, regOp, arg, bits - rotate);
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return;
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}
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if (!is_same_reg)
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{
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MOV(bits, R(regOp), arg);
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}
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if (rotate != 0)
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{
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ROL(bits, R(regOp), Imm8(rotate));
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}
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}
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// Following static functions are used in conjunction with regimmop
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static u32 Add(u32 a, u32 b)
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{
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@ -1560,34 +1581,34 @@ void Jit64::rlwinmx(UGeckoInstruction inst)
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SHL(32, Ra, Imm8(inst.SH));
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needs_sext = inst.SH + mask_size >= 32;
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}
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else
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else if (left_shift)
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{
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if (a != s)
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MOV(32, Ra, Rs);
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if (left_shift)
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SHL(32, Ra, Imm8(inst.SH));
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}
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else if (right_shift)
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{
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if (a != s)
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MOV(32, Ra, Rs);
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SHR(32, Ra, Imm8(inst.MB));
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needs_sext = false;
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}
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else
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{
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RotateLeft(32, Ra, Rs, inst.SH);
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if (!(inst.MB == 0 && inst.ME == 31))
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{
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SHL(32, Ra, Imm8(inst.SH));
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}
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else if (right_shift)
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{
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SHR(32, Ra, Imm8(inst.MB));
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needs_sext = false;
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}
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else
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{
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if (inst.SH != 0)
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ROL(32, Ra, Imm8(inst.SH));
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if (!(inst.MB == 0 && inst.ME == 31))
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{
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// we need flags if we're merging the branch
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if (inst.Rc && CheckMergedBranch(0))
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AND(32, Ra, Imm32(mask));
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else
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AndWithMask(Ra, mask);
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needs_sext = inst.MB == 0;
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needs_test = false;
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}
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// we need flags if we're merging the branch
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if (inst.Rc && CheckMergedBranch(0))
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AND(32, Ra, Imm32(mask));
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else
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AndWithMask(Ra, mask);
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needs_sext = inst.MB == 0;
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needs_test = false;
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}
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}
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@ -1627,10 +1648,7 @@ void Jit64::rlwimix(UGeckoInstruction inst)
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RCOpArg Rs = gpr.Use(s, RCMode::Read);
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RCX64Reg Ra = gpr.Bind(a, RCMode::Read);
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RegCache::Realize(Rs, Ra);
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if (a != s)
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MOV(32, Ra, Rs);
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if (inst.SH)
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ROL(32, Ra, Imm8(inst.SH));
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RotateLeft(32, Ra, Rs, inst.SH);
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needs_test = true;
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}
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else if (gpr.IsImm(s))
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@ -1652,18 +1670,19 @@ void Jit64::rlwimix(UGeckoInstruction inst)
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RCX64Reg Ra = gpr.Bind(a, RCMode::Write);
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RegCache::Realize(Rs, Ra);
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MOV(32, Ra, Rs);
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if (isLeftShift)
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{
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MOV(32, Ra, Rs);
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SHL(32, Ra, Imm8(inst.SH));
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}
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else if (isRightShift)
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{
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MOV(32, Ra, Rs);
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SHR(32, Ra, Imm8(32 - inst.SH));
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}
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else
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{
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ROL(32, Ra, Imm8(inst.SH));
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RotateLeft(32, Ra, Rs, inst.SH);
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AND(32, Ra, Imm32(mask));
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}
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OR(32, Ra, Imm32(maskA));
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@ -1675,22 +1694,23 @@ void Jit64::rlwimix(UGeckoInstruction inst)
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RCX64Reg Ra = gpr.Bind(a, RCMode::ReadWrite);
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RegCache::Realize(Rs, Ra);
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MOV(32, R(RSCRATCH), Rs);
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if (isLeftShift)
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{
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MOV(32, R(RSCRATCH), Rs);
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SHL(32, R(RSCRATCH), Imm8(inst.SH));
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AndWithMask(Ra, ~mask);
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OR(32, Ra, R(RSCRATCH));
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}
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else if (isRightShift)
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{
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MOV(32, R(RSCRATCH), Rs);
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SHR(32, R(RSCRATCH), Imm8(32 - inst.SH));
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AndWithMask(Ra, ~mask);
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OR(32, Ra, R(RSCRATCH));
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}
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else
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{
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ROL(32, R(RSCRATCH), Imm8(inst.SH));
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RotateLeft(32, RSCRATCH, Rs, inst.SH);
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XOR(32, R(RSCRATCH), Ra);
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AndWithMask(RSCRATCH, mask);
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XOR(32, Ra, R(RSCRATCH));
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