JitArm64: Merge ps_mulsX.
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09af32c063
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@ -154,8 +154,7 @@ public:
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void ps_mergeXX(UGeckoInstruction inst);
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void ps_mr(UGeckoInstruction inst);
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void ps_msub(UGeckoInstruction inst);
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void ps_muls0(UGeckoInstruction inst);
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void ps_muls1(UGeckoInstruction inst);
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void ps_mulsX(UGeckoInstruction inst);
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void ps_nabs(UGeckoInstruction inst);
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void ps_nmadd(UGeckoInstruction inst);
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void ps_nmsub(UGeckoInstruction inst);
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@ -140,7 +140,7 @@ void JitArm64::ps_mr(UGeckoInstruction inst)
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m_float_emit.ORR(VD, VB, VB);
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}
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void JitArm64::ps_muls0(UGeckoInstruction inst)
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void JitArm64::ps_mulsX(UGeckoInstruction inst)
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{
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INSTRUCTION_START
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JITDISABLE(bJITPairedOff);
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@ -149,32 +149,14 @@ void JitArm64::ps_muls0(UGeckoInstruction inst)
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u32 a = inst.FA, c = inst.FC, d = inst.FD;
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ARM64Reg VA = fpr.R(a, REG_REG);
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ARM64Reg VC = fpr.R(c, REG_REG);
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ARM64Reg VD = fpr.RW(d, REG_REG);
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ARM64Reg V0 = fpr.GetReg();
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m_float_emit.DUP(64, V0, VC, 0);
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m_float_emit.FMUL(64, VD, VA, V0);
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fpr.FixSinglePrecision(d);
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fpr.Unlock(V0);
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}
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void JitArm64::ps_muls1(UGeckoInstruction inst)
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{
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INSTRUCTION_START
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JITDISABLE(bJITPairedOff);
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FALLBACK_IF(inst.Rc);
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FALLBACK_IF(SConfig::GetInstance().bFPRF && js.op->wantsFPRF);
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u32 a = inst.FA, c = inst.FC, d = inst.FD;
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bool upper = inst.SUBOP5 == 13;
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ARM64Reg VA = fpr.R(a, REG_REG);
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ARM64Reg VC = fpr.R(c, REG_REG);
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ARM64Reg VD = fpr.RW(d, REG_REG);
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ARM64Reg V0 = fpr.GetReg();
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m_float_emit.DUP(64, V0, VC, 1);
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m_float_emit.DUP(64, V0, VC, upper ? 1 : 0);
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m_float_emit.FMUL(64, VD, VA, V0);
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fpr.FixSinglePrecision(d);
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fpr.Unlock(V0);
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@ -122,8 +122,8 @@ static GekkoOPTemplate table4_2[] =
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{
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{10, &JitArm64::ps_sum0}, // ps_sum0
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{11, &JitArm64::ps_sum1}, // ps_sum1
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{12, &JitArm64::ps_muls0}, // ps_muls0
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{13, &JitArm64::ps_muls1}, // ps_muls1
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{12, &JitArm64::ps_mulsX}, // ps_muls0
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{13, &JitArm64::ps_mulsX}, // ps_muls1
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{14, &JitArm64::ps_maddsX}, // ps_madds0
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{15, &JitArm64::ps_maddsX}, // ps_madds1
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{18, &JitArm64::fp_arith}, // ps_div
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