From 157404fd1e761db1ea329c7b0a37cef7547d4671 Mon Sep 17 00:00:00 2001 From: degasus Date: Thu, 11 Feb 2016 00:16:29 +0100 Subject: [PATCH] JitArm64: Merge ps_mulsX. --- Source/Core/Core/PowerPC/JitArm64/Jit.h | 3 +-- .../Core/PowerPC/JitArm64/JitArm64_Paired.cpp | 24 +++---------------- .../Core/PowerPC/JitArm64/JitArm64_Tables.cpp | 4 ++-- 3 files changed, 6 insertions(+), 25 deletions(-) diff --git a/Source/Core/Core/PowerPC/JitArm64/Jit.h b/Source/Core/Core/PowerPC/JitArm64/Jit.h index c4b5df628f..cdff0ebdde 100644 --- a/Source/Core/Core/PowerPC/JitArm64/Jit.h +++ b/Source/Core/Core/PowerPC/JitArm64/Jit.h @@ -154,8 +154,7 @@ public: void ps_mergeXX(UGeckoInstruction inst); void ps_mr(UGeckoInstruction inst); void ps_msub(UGeckoInstruction inst); - void ps_muls0(UGeckoInstruction inst); - void ps_muls1(UGeckoInstruction inst); + void ps_mulsX(UGeckoInstruction inst); void ps_nabs(UGeckoInstruction inst); void ps_nmadd(UGeckoInstruction inst); void ps_nmsub(UGeckoInstruction inst); diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_Paired.cpp b/Source/Core/Core/PowerPC/JitArm64/JitArm64_Paired.cpp index a516a22c87..b815f3e593 100644 --- a/Source/Core/Core/PowerPC/JitArm64/JitArm64_Paired.cpp +++ b/Source/Core/Core/PowerPC/JitArm64/JitArm64_Paired.cpp @@ -140,7 +140,7 @@ void JitArm64::ps_mr(UGeckoInstruction inst) m_float_emit.ORR(VD, VB, VB); } -void JitArm64::ps_muls0(UGeckoInstruction inst) +void JitArm64::ps_mulsX(UGeckoInstruction inst) { INSTRUCTION_START JITDISABLE(bJITPairedOff); @@ -149,32 +149,14 @@ void JitArm64::ps_muls0(UGeckoInstruction inst) u32 a = inst.FA, c = inst.FC, d = inst.FD; - ARM64Reg VA = fpr.R(a, REG_REG); - ARM64Reg VC = fpr.R(c, REG_REG); - ARM64Reg VD = fpr.RW(d, REG_REG); - ARM64Reg V0 = fpr.GetReg(); - - m_float_emit.DUP(64, V0, VC, 0); - m_float_emit.FMUL(64, VD, VA, V0); - fpr.FixSinglePrecision(d); - fpr.Unlock(V0); -} - -void JitArm64::ps_muls1(UGeckoInstruction inst) -{ - INSTRUCTION_START - JITDISABLE(bJITPairedOff); - FALLBACK_IF(inst.Rc); - FALLBACK_IF(SConfig::GetInstance().bFPRF && js.op->wantsFPRF); - - u32 a = inst.FA, c = inst.FC, d = inst.FD; + bool upper = inst.SUBOP5 == 13; ARM64Reg VA = fpr.R(a, REG_REG); ARM64Reg VC = fpr.R(c, REG_REG); ARM64Reg VD = fpr.RW(d, REG_REG); ARM64Reg V0 = fpr.GetReg(); - m_float_emit.DUP(64, V0, VC, 1); + m_float_emit.DUP(64, V0, VC, upper ? 1 : 0); m_float_emit.FMUL(64, VD, VA, V0); fpr.FixSinglePrecision(d); fpr.Unlock(V0); diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_Tables.cpp b/Source/Core/Core/PowerPC/JitArm64/JitArm64_Tables.cpp index 49c8967dfd..f704ffd0c2 100644 --- a/Source/Core/Core/PowerPC/JitArm64/JitArm64_Tables.cpp +++ b/Source/Core/Core/PowerPC/JitArm64/JitArm64_Tables.cpp @@ -122,8 +122,8 @@ static GekkoOPTemplate table4_2[] = { {10, &JitArm64::ps_sum0}, // ps_sum0 {11, &JitArm64::ps_sum1}, // ps_sum1 - {12, &JitArm64::ps_muls0}, // ps_muls0 - {13, &JitArm64::ps_muls1}, // ps_muls1 + {12, &JitArm64::ps_mulsX}, // ps_muls0 + {13, &JitArm64::ps_mulsX}, // ps_muls1 {14, &JitArm64::ps_maddsX}, // ps_madds0 {15, &JitArm64::ps_maddsX}, // ps_madds1 {18, &JitArm64::fp_arith}, // ps_div