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fix spurious RRX variant selection in several disassembly macros (fixes #652 maybe)

This commit is contained in:
zeromus 2023-04-10 11:43:46 -04:00
parent ab17945377
commit c97ba8fb16
1 changed files with 6 additions and 2 deletions
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8
desmume/src/frontend/modules/Disassembler.cpp
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@ -93,8 +93,10 @@ const char MSR_FIELD[16][5] = {
Registre[REG_POS(i,0)],\
tmp);
#define DATAPROC_ROR_IMM(nom, s) char tmp[10] = "";\
if(((i>>7)&0x1F)!=0)\
if(((i>>7)&0x1F)==0)\
sprintf(tmp, ", RRX");\
else\
sprintf(tmp, ", ROR %d", (int)((i>>7)&0x1F));\
sprintf(txt, "%s%s%s %s, %s, %s%s",\
#nom,\
Condition[CONDITION(i)],\
@ -208,8 +210,10 @@ const char MSR_FIELD[16][5] = {
tmp,\
op3);
#define LDRSTR_ROR_IMM(nom, op, op2, op3) char tmp[10] = "";\
if(((i>>7)&0x1F)!=0)\
if(((i>>7)&0x1F)==0)\
sprintf(tmp, ", RRX");\
else\
sprintf(tmp, ", ROR %d", (int)((i>>7)&0x1F));\
sprintf(txt, "%s%s %s, [%s%s, %s%s%s%s",\
#nom,\
Condition[CONDITION(i)],\