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desmume
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- Encapsulated all the GDB STUB stuff to be only enabled when the GDB_STUB macro is defined (as a projection option), as it's causing regression. I know I didn't do it the cleanest way, but it's the fastest one that I could do, anyone feel free to do a better way to enable/disable it properly to avoid aforementioned regression. 

- Clean up of the read/write macros, so we don't have two names for the same stuff
This commit is contained in:
shashclp 2007-10-19 09:31:53 +00:00
parent a8849f34f5
commit 7339fb71c1
14 changed files with 664 additions and 512 deletions
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4
desmume/src/MMU.c
View File

@ -2918,14 +2918,14 @@ void FASTCALL MMU_doDMA(u32 proc, u32 num)
if ((MMU.DMACrt[proc][num]>>26)&1) if ((MMU.DMACrt[proc][num]>>26)&1)
for(; i < taille; ++i) for(; i < taille; ++i)
{ {
MMU_writeWord(proc, dst, MMU_readWord(proc, src)); MMU_write32(proc, dst, MMU_read32(proc, src));
dst += dstinc; dst += dstinc;
src += srcinc; src += srcinc;
} }
else else
for(; i < taille; ++i) for(; i < taille; ++i)
{ {
MMU_write16(proc, dst, MMU_readHWord(proc, src)); MMU_write16(proc, dst, MMU_read16(proc, src));
dst += dstinc; dst += dstinc;
src += srcinc; src += srcinc;
} }

20
desmume/src/MMU.h
View File

@ -145,13 +145,10 @@ void MMU_clearMem( void);
void MMU_setRom(u8 * rom, u32 mask); void MMU_setRom(u8 * rom, u32 mask);
void MMU_unsetRom( void); void MMU_unsetRom( void);
#define MMU_readByte MMU_read8
#define MMU_readHWord MMU_read16
#define MMU_readWord MMU_read32
#define MMU_readByteACL MMU_read8_acl
#define MMU_readHWordACL MMU_read16_acl
#define MMU_readWordACL MMU_read32_acl
/**
* Memory reading
*/
u8 FASTCALL MMU_read8(u32 proc, u32 adr); u8 FASTCALL MMU_read8(u32 proc, u32 adr);
u16 FASTCALL MMU_read16(u32 proc, u32 adr); u16 FASTCALL MMU_read16(u32 proc, u32 adr);
u32 FASTCALL MMU_read32(u32 proc, u32 adr); u32 FASTCALL MMU_read32(u32 proc, u32 adr);
@ -166,17 +163,12 @@ u32 FASTCALL MMU_read32(u32 proc, u32 adr);
#define MMU_read32_acl(proc,adr,access) MMU_read32(proc,adr) #define MMU_read32_acl(proc,adr,access) MMU_read32(proc,adr)
#endif #endif
#define MMU_writeByte MMU_write8 /**
#define MMU_writeHWord MMU_write16 * Memory writing
#define MMU_writeWord MMU_write32 */
#define MMU_writeByteACL MMU_write8_acl
#define MMU_writeHWordACL MMU_write16_acl
#define MMU_writeWordACL MMU_write32_acl
void FASTCALL MMU_write8(u32 proc, u32 adr, u8 val); void FASTCALL MMU_write8(u32 proc, u32 adr, u8 val);
void FASTCALL MMU_write16(u32 proc, u32 adr, u16 val); void FASTCALL MMU_write16(u32 proc, u32 adr, u16 val);
void FASTCALL MMU_write32(u32 proc, u32 adr, u32 val); void FASTCALL MMU_write32(u32 proc, u32 adr, u32 val);
void FASTCALL MMU_writeXX(u32 proc, u32 adr, u32 val, u8 nbbytes);
#ifdef MMU_ENABLE_ACL #ifdef MMU_ENABLE_ACL
void FASTCALL MMU_write8_acl(u32 proc, u32 adr, u8 val); void FASTCALL MMU_write8_acl(u32 proc, u32 adr, u8 val);

143
desmume/src/NDSSystem.c
View File

@ -136,10 +136,14 @@ copy_firmware_user_data( u8 *dest_buffer, const u8 *fw_data) {
} }
#ifdef GDB_STUB
int NDS_Init( struct armcpu_memory_iface *arm9_mem_if, int NDS_Init( struct armcpu_memory_iface *arm9_mem_if,
struct armcpu_ctrl_iface **arm9_ctrl_iface, struct armcpu_ctrl_iface **arm9_ctrl_iface,
struct armcpu_memory_iface *arm7_mem_if, struct armcpu_memory_iface *arm7_mem_if,
struct armcpu_ctrl_iface **arm7_ctrl_iface) { struct armcpu_ctrl_iface **arm7_ctrl_iface) {
#else
int NDS_Init( void) {
#endif
nds.ARM9Cycle = 0; nds.ARM9Cycle = 0;
nds.ARM7Cycle = 0; nds.ARM7Cycle = 0;
nds.cycles = 0; nds.cycles = 0;
@ -151,8 +155,13 @@ int NDS_Init( struct armcpu_memory_iface *arm9_mem_if,
if (Screen_Init(GFXCORE_DUMMY) != 0) if (Screen_Init(GFXCORE_DUMMY) != 0)
return -1; return -1;
#ifdef GDB_STUB
armcpu_new(&NDS_ARM7,1, arm7_mem_if, arm7_ctrl_iface); armcpu_new(&NDS_ARM7,1, arm7_mem_if, arm7_ctrl_iface);
armcpu_new(&NDS_ARM9,0, arm9_mem_if, arm9_ctrl_iface); armcpu_new(&NDS_ARM9,0, arm9_mem_if, arm9_ctrl_iface);
#else
armcpu_new(&NDS_ARM7,1);
armcpu_new(&NDS_ARM9,0);
#endif
if (SPU_Init(SNDCORE_DUMMY, 735) != 0) if (SPU_Init(SNDCORE_DUMMY, 735) != 0)
return -1; return -1;
@ -429,7 +438,7 @@ void NDS_Reset( void)
for(i = 0; i < (header->ARM9binSize>>2); ++i) for(i = 0; i < (header->ARM9binSize>>2); ++i)
{ {
MMU_writeWord(0, dst, T1ReadLong(MMU.CART_ROM, src)); MMU_write32(0, dst, T1ReadLong(MMU.CART_ROM, src));
dst += 4; dst += 4;
src += 4; src += 4;
} }
@ -439,7 +448,7 @@ void NDS_Reset( void)
for(i = 0; i < (header->ARM7binSize>>2); ++i) for(i = 0; i < (header->ARM7binSize>>2); ++i)
{ {
MMU_writeWord(1, dst, T1ReadLong(MMU.CART_ROM, src)); MMU_write32(1, dst, T1ReadLong(MMU.CART_ROM, src));
dst += 4; dst += 4;
src += 4; src += 4;
} }
@ -459,9 +468,9 @@ void NDS_Reset( void)
nds.lignerendu = FALSE; nds.lignerendu = FALSE;
nds.touchX = nds.touchY = 0; nds.touchX = nds.touchY = 0;
MMU_writeHWord(0, 0x04000130, 0x3FF); MMU_write16(0, 0x04000130, 0x3FF);
MMU_writeHWord(1, 0x04000130, 0x3FF); MMU_write16(1, 0x04000130, 0x3FF);
MMU_writeByte(1, 0x04000136, 0x43); MMU_write8(1, 0x04000136, 0x43);
/* /*
* Setup a copy of the firmware user settings in memory. * Setup a copy of the firmware user settings in memory.
@ -473,63 +482,63 @@ void NDS_Reset( void)
if ( copy_firmware_user_data( temp_buffer, MMU.fw.data)) { if ( copy_firmware_user_data( temp_buffer, MMU.fw.data)) {
for ( fw_index = 0; fw_index < NDS_FW_USER_SETTINGS_MEM_BYTE_COUNT; fw_index++) { for ( fw_index = 0; fw_index < NDS_FW_USER_SETTINGS_MEM_BYTE_COUNT; fw_index++) {
MMU_writeByte( 0, 0x027FFC80 + fw_index, temp_buffer[fw_index]); MMU_write8( 0, 0x027FFC80 + fw_index, temp_buffer[fw_index]);
} }
} }
} }
MMU_writeWord(0, 0x027FFE40, header->FNameTblOff); MMU_write32(0, 0x027FFE40, header->FNameTblOff);
MMU_writeWord(0, 0x027FFE44, header->FNameTblSize); MMU_write32(0, 0x027FFE44, header->FNameTblSize);
MMU_writeWord(0, 0x027FFE48, header->FATOff); MMU_write32(0, 0x027FFE48, header->FATOff);
MMU_writeWord(0, 0x027FFE4C, header->FATSize); MMU_write32(0, 0x027FFE4C, header->FATSize);
MMU_writeWord(0, 0x027FFE50, header->ARM9OverlayOff); MMU_write32(0, 0x027FFE50, header->ARM9OverlayOff);
MMU_writeWord(0, 0x027FFE54, header->ARM9OverlaySize); MMU_write32(0, 0x027FFE54, header->ARM9OverlaySize);
MMU_writeWord(0, 0x027FFE58, header->ARM7OverlayOff); MMU_write32(0, 0x027FFE58, header->ARM7OverlayOff);
MMU_writeWord(0, 0x027FFE5C, header->ARM7OverlaySize); MMU_write32(0, 0x027FFE5C, header->ARM7OverlaySize);
MMU_writeWord(0, 0x027FFE60, header->unknown2a); MMU_write32(0, 0x027FFE60, header->unknown2a);
MMU_writeWord(0, 0x027FFE64, header->unknown2b); //merci <20>EACKiX MMU_write32(0, 0x027FFE64, header->unknown2b); //merci <20>EACKiX
MMU_writeWord(0, 0x027FFE70, header->ARM9unk); MMU_write32(0, 0x027FFE70, header->ARM9unk);
MMU_writeWord(0, 0x027FFE74, header->ARM7unk); MMU_write32(0, 0x027FFE74, header->ARM7unk);
MMU_writeWord(0, 0x027FFF9C, 0x027FFF90); // ?????? besoin d'avoir la vrai valeur sur ds MMU_write32(0, 0x027FFF9C, 0x027FFF90); // ?????? besoin d'avoir la vrai valeur sur ds
MainScreen.offset = 192; MainScreen.offset = 192;
SubScreen.offset = 0; SubScreen.offset = 0;
//MMU_writeWord(0, 0x02007FFC, 0xE92D4030); //MMU_write32(0, 0x02007FFC, 0xE92D4030);
//ARM7 BIOS IRQ HANDLER //ARM7 BIOS IRQ HANDLER
MMU_writeWord(1, 0x00, 0xE25EF002); MMU_write32(1, 0x00, 0xE25EF002);
MMU_writeWord(1, 0x04, 0xEAFFFFFE); MMU_write32(1, 0x04, 0xEAFFFFFE);
MMU_writeWord(1, 0x18, 0xEA000000); MMU_write32(1, 0x18, 0xEA000000);
MMU_writeWord(1, 0x20, 0xE92D500F); MMU_write32(1, 0x20, 0xE92D500F);
MMU_writeWord(1, 0x24, 0xE3A00301); MMU_write32(1, 0x24, 0xE3A00301);
MMU_writeWord(1, 0x28, 0xE28FE000); MMU_write32(1, 0x28, 0xE28FE000);
MMU_writeWord(1, 0x2C, 0xE510F004); MMU_write32(1, 0x2C, 0xE510F004);
MMU_writeWord(1, 0x30, 0xE8BD500F); MMU_write32(1, 0x30, 0xE8BD500F);
MMU_writeWord(1, 0x34, 0xE25EF004); MMU_write32(1, 0x34, 0xE25EF004);
//ARM9 BIOS IRQ HANDLER //ARM9 BIOS IRQ HANDLER
MMU_writeWord(0, 0xFFFF0018, 0xEA000000); MMU_write32(0, 0xFFFF0018, 0xEA000000);
MMU_writeWord(0, 0xFFFF0020, 0xE92D500F); MMU_write32(0, 0xFFFF0020, 0xE92D500F);
MMU_writeWord(0, 0xFFFF0024, 0xEE190F11); MMU_write32(0, 0xFFFF0024, 0xEE190F11);
MMU_writeWord(0, 0xFFFF0028, 0xE1A00620); MMU_write32(0, 0xFFFF0028, 0xE1A00620);
MMU_writeWord(0, 0xFFFF002C, 0xE1A00600); MMU_write32(0, 0xFFFF002C, 0xE1A00600);
MMU_writeWord(0, 0xFFFF0030, 0xE2800C40); MMU_write32(0, 0xFFFF0030, 0xE2800C40);
MMU_writeWord(0, 0xFFFF0034, 0xE28FE000); MMU_write32(0, 0xFFFF0034, 0xE28FE000);
MMU_writeWord(0, 0xFFFF0038, 0xE510F004); MMU_write32(0, 0xFFFF0038, 0xE510F004);
MMU_writeWord(0, 0xFFFF003C, 0xE8BD500F); MMU_write32(0, 0xFFFF003C, 0xE8BD500F);
MMU_writeWord(0, 0xFFFF0040, 0xE25EF004); MMU_write32(0, 0xFFFF0040, 0xE25EF004);
MMU_writeWord(0, 0x0000004, 0xE3A0010E); MMU_write32(0, 0x0000004, 0xE3A0010E);
MMU_writeWord(0, 0x0000008, 0xE3A01020); MMU_write32(0, 0x0000008, 0xE3A01020);
// MMU_writeWord(0, 0x000000C, 0xE1B02110); // MMU_write32(0, 0x000000C, 0xE1B02110);
MMU_writeWord(0, 0x000000C, 0xE1B02040); MMU_write32(0, 0x000000C, 0xE1B02040);
MMU_writeWord(0, 0x0000010, 0xE3B02020); MMU_write32(0, 0x0000010, 0xE3B02020);
// MMU_writeWord(0, 0x0000010, 0xE2100202); // MMU_write32(0, 0x0000010, 0xE2100202);
free(header); free(header);
@ -1449,27 +1458,31 @@ NDS_exec(s32 nb, BOOL force)
MMU.DMAing[1][3] = FALSE; MMU.DMAing[1][3] = FALSE;
} }
if((MMU.reg_IF[0]&MMU.reg_IE[0]) && (MMU.reg_IME[0])) if((MMU.reg_IF[0]&MMU.reg_IE[0]) && (MMU.reg_IME[0]))
//if(NDS_ARM9.irqExeption()) {
if ( armcpu_flagIrq( &NDS_ARM9)) { #ifdef GDB_STUB
nds.ARM9Cycle = nds.cycles; if ( armcpu_flagIrq( &NDS_ARM9))
} #else
/* if ( armcpu_irqExeption(&NDS_ARM9))
if(armcpu_irqExeption(&NDS_ARM9)) #endif
{ {
nds.ARM9Cycle = nds.cycles; nds.ARM9Cycle = nds.cycles;
} }
*/ }
if((MMU.reg_IF[1]&MMU.reg_IE[1]) && (MMU.reg_IME[1])) if((MMU.reg_IF[1]&MMU.reg_IE[1]) && (MMU.reg_IME[1]))
if ( armcpu_flagIrq( &NDS_ARM7)) { {
nds.ARM7Cycle = nds.cycles; #ifdef GDB_STUB
} if ( armcpu_flagIrq( &NDS_ARM7))
/* #else
if (armcpu_irqExeption(&NDS_ARM7)) if ( armcpu_irqExeption(&NDS_ARM7))
nds.ARM7Cycle = nds.cycles; #endif
*/ {
nds.ARM7Cycle = nds.cycles;
}
}
} }
return nds.cycles;
return nds.cycles;
} }

5
desmume/src/NDSSystem.h
View File

@ -166,10 +166,15 @@ struct NDS_fw_config_data {
extern NDSSystem nds; extern NDSSystem nds;
#ifdef GDB_STUB
int NDS_Init( struct armcpu_memory_iface *arm9_mem_if, int NDS_Init( struct armcpu_memory_iface *arm9_mem_if,
struct armcpu_ctrl_iface **arm9_ctrl_iface, struct armcpu_ctrl_iface **arm9_ctrl_iface,
struct armcpu_memory_iface *arm7_mem_if, struct armcpu_memory_iface *arm7_mem_if,
struct armcpu_ctrl_iface **arm7_ctrl_iface); struct armcpu_ctrl_iface **arm7_ctrl_iface);
#else
int NDS_Init ( void);
#endif
void NDS_DeInit(void); void NDS_DeInit(void);
void void
NDS_FillDefaultFirmwareConfigData( struct NDS_fw_config_data *fw_config); NDS_FillDefaultFirmwareConfigData( struct NDS_fw_config_data *fw_config);

504
desmume/src/arm_instructions.c
View File

File diff suppressed because it is too large Load Diff

2
desmume/src/arm_instructions.h
View File

@ -25,7 +25,7 @@
#include "types.h" #include "types.h"
#include "armcpu.h" #include "armcpu.h"
extern u32 (*FASTCALL arm_instructions_set[4096])(armcpu_t * cpu); extern u32 (FASTCALL* arm_instructions_set[4096])(armcpu_t * cpu);
#endif #endif

217
desmume/src/armcpu.c
View File

@ -29,8 +29,6 @@
armcpu_t NDS_ARM7; armcpu_t NDS_ARM7;
armcpu_t NDS_ARM9; armcpu_t NDS_ARM9;
#define STALLED_CYCLE_COUNT 10
#define SWAP(a, b, c) do \ #define SWAP(a, b, c) do \
{ \ { \
c=a; \ c=a; \
@ -39,6 +37,10 @@ armcpu_t NDS_ARM9;
} \ } \
while(0) while(0)
#ifdef GDB_STUB
#define STALLED_CYCLE_COUNT 10
static void static void
stall_cpu( void *instance) { stall_cpu( void *instance) {
armcpu_t *armcpu = (armcpu_t *)instance; armcpu_t *armcpu = (armcpu_t *)instance;
@ -46,7 +48,6 @@ stall_cpu( void *instance) {
armcpu->stalled = 1; armcpu->stalled = 1;
} }
static void static void
unstall_cpu( void *instance) { unstall_cpu( void *instance) {
armcpu_t *armcpu = (armcpu_t *)instance; armcpu_t *armcpu = (armcpu_t *)instance;
@ -70,6 +71,7 @@ remove_post_exec_fn( void *instance) {
armcpu->post_ex_fn = NULL; armcpu->post_ex_fn = NULL;
} }
#endif
static u32 static u32
read_cpu_reg( void *instance, u32 reg_num) { read_cpu_reg( void *instance, u32 reg_num) {
@ -105,31 +107,38 @@ set_cpu_reg( void *instance, u32 reg_num, u32 value) {
} }
} }
#ifdef GDB_STUB
int armcpu_new( armcpu_t *armcpu, u32 id, int armcpu_new( armcpu_t *armcpu, u32 id,
struct armcpu_memory_iface *mem_if, struct armcpu_memory_iface *mem_if,
struct armcpu_ctrl_iface **ctrl_iface_ret) struct armcpu_ctrl_iface **ctrl_iface_ret)
#else
int armcpu_new( armcpu_t *armcpu, u32 id)
#endif
{ {
armcpu->proc_ID = id; armcpu->proc_ID = id;
if(id==0) armcpu->swi_tab = ARM9_swi_tab; if(id==0)
else armcpu->swi_tab = ARM7_swi_tab; armcpu->swi_tab = ARM9_swi_tab;
armcpu->mem_if = mem_if; else
armcpu->swi_tab = ARM7_swi_tab;
/* populate the control interface */ #ifdef GDB_STUB
armcpu->ctrl_iface.stall = stall_cpu; armcpu->mem_if = mem_if;
armcpu->ctrl_iface.unstall = unstall_cpu;
armcpu->ctrl_iface.read_reg = read_cpu_reg;
armcpu->ctrl_iface.set_reg = set_cpu_reg;
armcpu->ctrl_iface.install_post_ex_fn = install_post_exec_fn;
armcpu->ctrl_iface.remove_post_ex_fn = remove_post_exec_fn;
armcpu->ctrl_iface.data = armcpu;
*ctrl_iface_ret = &armcpu->ctrl_iface; /* populate the control interface */
armcpu->ctrl_iface.stall = stall_cpu;
armcpu->ctrl_iface.unstall = unstall_cpu;
armcpu->ctrl_iface.read_reg = read_cpu_reg;
armcpu->ctrl_iface.set_reg = set_cpu_reg;
armcpu->ctrl_iface.install_post_ex_fn = install_post_exec_fn;
armcpu->ctrl_iface.remove_post_ex_fn = remove_post_exec_fn;
armcpu->ctrl_iface.data = armcpu;
armcpu->stalled = 0; *ctrl_iface_ret = &armcpu->ctrl_iface;
armcpu->post_ex_fn = NULL;
armcpu->stalled = 0;
armcpu->post_ex_fn = NULL;
#endif
armcpu_init(armcpu, 0); armcpu_init(armcpu, 0);
@ -144,7 +153,10 @@ void armcpu_init(armcpu_t *armcpu, u32 adr)
armcpu->intVector = 0xFFFF0000 * (armcpu->proc_ID==0); armcpu->intVector = 0xFFFF0000 * (armcpu->proc_ID==0);
armcpu->waitIRQ = FALSE; armcpu->waitIRQ = FALSE;
armcpu->wirq = FALSE; armcpu->wirq = FALSE;
armcpu->irq_flag = 0;
#ifdef GDB_STUB
armcpu->irq_flag = 0;
#endif
if(armcpu->coproc[15]) free(armcpu->coproc[15]); if(armcpu->coproc[15]) free(armcpu->coproc[15]);
@ -164,12 +176,21 @@ void armcpu_init(armcpu_t *armcpu, u32 adr)
armcpu->R8_fiq = armcpu->R9_fiq = armcpu->R10_fiq = armcpu->R11_fiq = armcpu->R12_fiq = armcpu->R13_fiq = armcpu->R14_fiq = 0; armcpu->R8_fiq = armcpu->R9_fiq = armcpu->R10_fiq = armcpu->R11_fiq = armcpu->R12_fiq = armcpu->R13_fiq = armcpu->R14_fiq = 0;
armcpu->SPSR_svc.val = armcpu->SPSR_abt.val = armcpu->SPSR_und.val = armcpu->SPSR_irq.val = armcpu->SPSR_fiq.val = 0; armcpu->SPSR_svc.val = armcpu->SPSR_abt.val = armcpu->SPSR_und.val = armcpu->SPSR_irq.val = armcpu->SPSR_fiq.val = 0;
armcpu->instruct_adr = adr;
armcpu->next_instruction = adr; #ifdef GDB_STUB
armcpu->instruct_adr = adr;
armcpu->R[15] = adr + 8; armcpu->R[15] = adr + 8;
#else
armcpu->R[15] = adr;
#endif
armcpu->next_instruction = adr;
armcpu->coproc[15] = (armcp_t*)armcp15_new(armcpu); armcpu->coproc[15] = (armcp_t*)armcp15_new(armcpu);
//armcpu_prefetch(armcpu); #ifndef GDB_STUB
armcpu_prefetch(armcpu);
#endif
} }
u32 armcpu_switchMode(armcpu_t *armcpu, u8 mode) u32 armcpu_switchMode(armcpu_t *armcpu, u8 mode)
@ -282,31 +303,51 @@ u32 armcpu_switchMode(armcpu_t *armcpu, u8 mode)
static u32 static u32
armcpu_prefetch(armcpu_t *armcpu) armcpu_prefetch(armcpu_t *armcpu)
{ {
u32 temp_instruction; u32 temp_instruction;
if(armcpu->CPSR.bits.T == 0) if(armcpu->CPSR.bits.T == 0)
{ {
temp_instruction = #ifdef GDB_STUB
armcpu->mem_if->prefetch32( armcpu->mem_if->data, temp_instruction =
armcpu->next_instruction); armcpu->mem_if->prefetch32( armcpu->mem_if->data,
armcpu->next_instruction);
if ( !armcpu->stalled) { if ( !armcpu->stalled) {
armcpu->instruction = temp_instruction; armcpu->instruction = temp_instruction;
armcpu->instruct_adr = armcpu->next_instruction; armcpu->instruct_adr = armcpu->next_instruction;
armcpu->next_instruction += 4; armcpu->next_instruction += 4;
armcpu->R[15] = armcpu->next_instruction + 4; armcpu->R[15] = armcpu->next_instruction + 4;
} }
return MMU.MMU_WAIT32[armcpu->proc_ID][(armcpu->instruct_adr>>24)&0xF]; #else
armcpu->instruction = MMU_read32_acl(armcpu->proc_ID, armcpu->next_instruction,CP15_ACCESS_EXECUTE);
armcpu->instruct_adr = armcpu->next_instruction;
armcpu->next_instruction += 4;
armcpu->R[15] = armcpu->next_instruction + 4;
#endif
return MMU.MMU_WAIT32[armcpu->proc_ID][(armcpu->instruct_adr>>24)&0xF];
} }
#ifdef GDB_STUB
temp_instruction = temp_instruction =
armcpu->mem_if->prefetch16( armcpu->mem_if->data, armcpu->mem_if->prefetch16( armcpu->mem_if->data,
armcpu->next_instruction); armcpu->next_instruction);
if ( !armcpu->stalled) {
armcpu->instruction = temp_instruction; if ( !armcpu->stalled) {
armcpu->instruct_adr = armcpu->next_instruction; armcpu->instruction = temp_instruction;
armcpu->next_instruction = armcpu->next_instruction + 2; armcpu->instruct_adr = armcpu->next_instruction;
armcpu->R[15] = armcpu->next_instruction + 2; armcpu->next_instruction = armcpu->next_instruction + 2;
} armcpu->R[15] = armcpu->next_instruction + 2;
}
#else
armcpu->instruction = MMU_read16_acl(armcpu->proc_ID, armcpu->next_instruction,CP15_ACCESS_EXECUTE);
armcpu->instruct_adr = armcpu->next_instruction;
armcpu->next_instruction += 2;
armcpu->R[15] = armcpu->next_instruction + 2;
#endif
return MMU.MMU_WAIT16[armcpu->proc_ID][(armcpu->instruct_adr>>24)&0xF]; return MMU.MMU_WAIT16[armcpu->proc_ID][(armcpu->instruct_adr>>24)&0xF];
} }
@ -327,7 +368,7 @@ static BOOL FASTCALL test_GT(Status_Reg CPSR) { return (!CPSR.bits.Z) && (CPSR.b
static BOOL FASTCALL test_LE(Status_Reg CPSR) { return ( CPSR.bits.Z) || (CPSR.bits.N!=CPSR.bits.V); } static BOOL FASTCALL test_LE(Status_Reg CPSR) { return ( CPSR.bits.Z) || (CPSR.bits.N!=CPSR.bits.V); }
static BOOL FASTCALL test_AL(Status_Reg CPSR) { return 1; } static BOOL FASTCALL test_AL(Status_Reg CPSR) { return 1; }
static BOOL (*FASTCALL test_conditions[])(Status_Reg CPSR)= { static BOOL (FASTCALL* test_conditions[])(Status_Reg CPSR)= {
test_EQ , test_NE , test_EQ , test_NE ,
test_CS , test_CC , test_CS , test_CC ,
test_MI , test_PL , test_MI , test_PL ,
@ -341,23 +382,38 @@ static BOOL (*FASTCALL test_conditions[])(Status_Reg CPSR)= {
(cond<15&&test_conditions[cond](CPSR)) (cond<15&&test_conditions[cond](CPSR))
static BOOL armcpu_irqExeption(armcpu_t *armcpu) BOOL armcpu_irqExeption(armcpu_t *armcpu)
{ {
Status_Reg tmp; Status_Reg tmp;
if(armcpu->CPSR.bits.I) return FALSE; if(armcpu->CPSR.bits.I) return FALSE;
#ifdef GDB_STUB
armcpu->irq_flag = 0; armcpu->irq_flag = 0;
tmp = armcpu->CPSR; #endif
tmp = armcpu->CPSR;
armcpu_switchMode(armcpu, IRQ); armcpu_switchMode(armcpu, IRQ);
#ifdef GDB_STUB
armcpu->R[14] = armcpu->next_instruction + 4; armcpu->R[14] = armcpu->next_instruction + 4;
#else
armcpu->R[14] = armcpu->instruct_adr + 4;
#endif
armcpu->SPSR = tmp; armcpu->SPSR = tmp;
armcpu->CPSR.bits.T = 0; armcpu->CPSR.bits.T = 0;
armcpu->CPSR.bits.I = 1; armcpu->CPSR.bits.I = 1;
armcpu->next_instruction = armcpu->intVector + 0x18; armcpu->next_instruction = armcpu->intVector + 0x18;
//armcpu->R[15] = armcpu->next_instruction + 8;
armcpu->waitIRQ = 0; armcpu->waitIRQ = 0;
#ifndef GDB_STUB
armcpu->R[15] = armcpu->next_instruction + 8;
armcpu_prefetch(armcpu);
#endif
return TRUE; return TRUE;
} }
/*
static BOOL armcpu_prefetchExeption(armcpu_t *armcpu) static BOOL armcpu_prefetchExeption(armcpu_t *armcpu)
{ {
Status_Reg tmp; Status_Reg tmp;
@ -373,20 +429,56 @@ static BOOL armcpu_prefetchExeption(armcpu_t *armcpu)
armcpu->waitIRQ = 0; armcpu->waitIRQ = 0;
return TRUE; return TRUE;
} }
*/
static BOOL armcpu_prefetchExeption(armcpu_t *armcpu)
{
Status_Reg tmp;
if(armcpu->CPSR.bits.I) return FALSE;
tmp = armcpu->CPSR;
armcpu_switchMode(armcpu, ABT);
#ifdef GDB_STUB
armcpu->R[14] = armcpu->next_instruction + 4;
#else
armcpu->R[14] = armcpu->instruct_adr + 4;
#endif
armcpu->SPSR = tmp;
armcpu->CPSR.bits.T = 0;
armcpu->CPSR.bits.I = 1;
armcpu->next_instruction = armcpu->intVector + 0xC;
armcpu->waitIRQ = 0;
#ifdef GDB_STUB
armcpu->R[15] = armcpu->next_instruction + 8;
#else
armcpu->R[15] = armcpu->next_instruction;
armcpu_prefetch(armcpu);
#endif
return TRUE;
}
BOOL BOOL
armcpu_flagIrq( armcpu_t *armcpu) { armcpu_flagIrq( armcpu_t *armcpu) {
if(armcpu->CPSR.bits.I) return FALSE; if(armcpu->CPSR.bits.I) return FALSE;
armcpu->waitIRQ = 0; armcpu->waitIRQ = 0;
#ifdef GDB_STUB
armcpu->irq_flag = 1; armcpu->irq_flag = 1;
#endif
return TRUE; return TRUE;
} }
u32 armcpu_exec(armcpu_t *armcpu) u32 armcpu_exec(armcpu_t *armcpu)
{ {
u32 c; u32 c = 1;
#ifdef GDB_STUB
if ( armcpu->stalled) if ( armcpu->stalled)
return STALLED_CYCLE_COUNT; return STALLED_CYCLE_COUNT;
@ -400,6 +492,7 @@ u32 armcpu_exec(armcpu_t *armcpu)
if ( armcpu->stalled) { if ( armcpu->stalled) {
return c; return c;
} }
#endif
if(armcpu->CPSR.bits.T == 0) if(armcpu->CPSR.bits.T == 0)
{ {
@ -407,22 +500,28 @@ u32 armcpu_exec(armcpu_t *armcpu)
{ {
c += arm_instructions_set[INSTRUCTION_INDEX(armcpu->instruction)](armcpu); c += arm_instructions_set[INSTRUCTION_INDEX(armcpu->instruction)](armcpu);
} }
#ifdef GDB_STUB
if ( armcpu->post_ex_fn != NULL) { if ( armcpu->post_ex_fn != NULL) {
/* call the external post execute function */ /* call the external post execute function */
armcpu->post_ex_fn( armcpu->post_ex_fn_data, armcpu->post_ex_fn( armcpu->post_ex_fn_data,
armcpu->instruct_adr, 0); armcpu->instruct_adr, 0);
} }
#else
c += armcpu_prefetch(armcpu);
#endif
return c; return c;
} }
c += thumb_instructions_set[armcpu->instruction>>6](armcpu); c += thumb_instructions_set[armcpu->instruction>>6](armcpu);
if ( armcpu->post_ex_fn != NULL) { #ifdef GDB_STUB
/* call the external post execute function */ if ( armcpu->post_ex_fn != NULL) {
armcpu->post_ex_fn( armcpu->post_ex_fn_data, armcpu->instruct_adr, 1); /* call the external post execute function */
} armcpu->post_ex_fn( armcpu->post_ex_fn_data, armcpu->instruct_adr, 1);
}
#else
c += armcpu_prefetch(armcpu);
#endif
return c; return c;
} }

10
desmume/src/armcpu.h
View File

@ -195,6 +195,7 @@ typedef struct armcpu_t
u32 (* *swi_tab)(struct armcpu_t * cpu); u32 (* *swi_tab)(struct armcpu_t * cpu);
#ifdef GDB_STUB
/** there is a pending irq for the cpu */ /** there is a pending irq for the cpu */
int irq_flag; int irq_flag;
@ -204,6 +205,7 @@ typedef struct armcpu_t
/** data for the post executed function */ /** data for the post executed function */
void *post_ex_fn_data; void *post_ex_fn_data;
/** flag indicating if the processor is stalled */ /** flag indicating if the processor is stalled */
int stalled; int stalled;
@ -212,14 +214,18 @@ typedef struct armcpu_t
/** the ctrl interface */ /** the ctrl interface */
struct armcpu_ctrl_iface ctrl_iface; struct armcpu_ctrl_iface ctrl_iface;
#endif
} armcpu_t; } armcpu_t;
#ifdef GDB_STUB
int armcpu_new( armcpu_t *armcpu, u32 id, struct armcpu_memory_iface *mem_if, int armcpu_new( armcpu_t *armcpu, u32 id, struct armcpu_memory_iface *mem_if,
struct armcpu_ctrl_iface **ctrl_iface_ret); struct armcpu_ctrl_iface **ctrl_iface_ret);
#else
int armcpu_new( armcpu_t *armcpu, u32 id);
#endif
void armcpu_init(armcpu_t *armcpu, u32 adr); void armcpu_init(armcpu_t *armcpu, u32 adr);
u32 armcpu_switchMode(armcpu_t *armcpu, u8 mode); u32 armcpu_switchMode(armcpu_t *armcpu, u8 mode);
//u32 armcpu_prefetch(armcpu_t *armcpu); u32 armcpu_prefetch(armcpu_t *armcpu);
u32 armcpu_exec(armcpu_t *armcpu); u32 armcpu_exec(armcpu_t *armcpu);
//BOOL armcpu_irqExeption(armcpu_t *armcpu); //BOOL armcpu_irqExeption(armcpu_t *armcpu);
//BOOL armcpu_prefetchExeption(armcpu_t *armcpu); //BOOL armcpu_prefetchExeption(armcpu_t *armcpu);

142
desmume/src/bios.c
View File

@ -219,7 +219,7 @@ u32 intrWaitARM(armcpu_t * cpu)
} else { } else {
intrFlagAdr = (((armcp15_t *)(cpu->coproc[15]))->DTCMRegion&0xFFFFF000)+0x3FF8; intrFlagAdr = (((armcp15_t *)(cpu->coproc[15]))->DTCMRegion&0xFFFFF000)+0x3FF8;
} }
intr = MMU_readWord(cpu->proc_ID, intrFlagAdr); intr = MMU_read32(cpu->proc_ID, intrFlagAdr);
intrFlag = cpu->R[1] & intr; intrFlag = cpu->R[1] & intr;
if(intrFlag) if(intrFlag)
@ -227,7 +227,7 @@ u32 intrWaitARM(armcpu_t * cpu)
// si une(ou plusieurs) des interruptions que l'on attend s'est(se sont) produite(s) // si une(ou plusieurs) des interruptions que l'on attend s'est(se sont) produite(s)
// on efface son(les) occurence(s). // on efface son(les) occurence(s).
intr ^= intrFlag; intr ^= intrFlag;
MMU_writeWord(cpu->proc_ID, intrFlagAdr, intr); MMU_write32(cpu->proc_ID, intrFlagAdr, intr);
//cpu->switchMode(oldmode[cpu->proc_ID]); //cpu->switchMode(oldmode[cpu->proc_ID]);
return 1; return 1;
} }
@ -253,7 +253,7 @@ u32 waitVBlankARM(armcpu_t * cpu)
} else { } else {
intrFlagAdr = (((armcp15_t *)(cpu->coproc[15]))->DTCMRegion&0xFFFFF000)+0x3FF8; intrFlagAdr = (((armcp15_t *)(cpu->coproc[15]))->DTCMRegion&0xFFFFF000)+0x3FF8;
} }
intr = MMU_readWord(cpu->proc_ID, intrFlagAdr); intr = MMU_read32(cpu->proc_ID, intrFlagAdr);
intrFlag = 1 & intr; intrFlag = 1 & intr;
if(intrFlag) if(intrFlag)
@ -261,7 +261,7 @@ u32 waitVBlankARM(armcpu_t * cpu)
// si une(ou plusieurs) des interruptions que l'on attend s'est(se sont) produite(s) // si une(ou plusieurs) des interruptions que l'on attend s'est(se sont) produite(s)
// on efface son(les) occurence(s). // on efface son(les) occurence(s).
intr ^= intrFlag; intr ^= intrFlag;
MMU_writeWord(cpu->proc_ID, intrFlagAdr, intr); MMU_write32(cpu->proc_ID, intrFlagAdr, intr);
//cpu->switchMode(oldmode[cpu->proc_ID]); //cpu->switchMode(oldmode[cpu->proc_ID]);
return 1; return 1;
} }
@ -329,7 +329,7 @@ u32 copy(armcpu_t* cpu)
cnt &= 0x1FFFFF; cnt &= 0x1FFFFF;
while(cnt) while(cnt)
{ {
MMU_writeHWord(cpu->proc_ID, dst, MMU_readHWord(cpu->proc_ID, src)); MMU_write16(cpu->proc_ID, dst, MMU_read16(cpu->proc_ID, src));
cnt--; cnt--;
dst+=2; dst+=2;
src+=2; src+=2;
@ -337,11 +337,11 @@ u32 copy(armcpu_t* cpu)
break; break;
case 1: case 1:
{ {
u32 val = MMU_readHWord(cpu->proc_ID, src); u32 val = MMU_read16(cpu->proc_ID, src);
cnt &= 0x1FFFFF; cnt &= 0x1FFFFF;
while(cnt) while(cnt)
{ {
MMU_writeHWord(cpu->proc_ID, dst, val); MMU_write16(cpu->proc_ID, dst, val);
cnt--; cnt--;
dst+=2; dst+=2;
} }
@ -358,7 +358,7 @@ u32 copy(armcpu_t* cpu)
cnt &= 0x1FFFFF; cnt &= 0x1FFFFF;
while(cnt) while(cnt)
{ {
MMU_writeWord(cpu->proc_ID, dst, MMU_readWord(cpu->proc_ID, src)); MMU_write32(cpu->proc_ID, dst, MMU_read32(cpu->proc_ID, src));
cnt--; cnt--;
dst+=4; dst+=4;
src+=4; src+=4;
@ -366,11 +366,11 @@ u32 copy(armcpu_t* cpu)
break; break;
case 1: case 1:
{ {
u32 val = MMU_readWord(cpu->proc_ID, src); u32 val = MMU_read32(cpu->proc_ID, src);
cnt &= 0x1FFFFF; cnt &= 0x1FFFFF;
while(cnt) while(cnt)
{ {
MMU_writeWord(cpu->proc_ID, dst, val); MMU_write32(cpu->proc_ID, dst, val);
cnt--; cnt--;
dst+=4; dst+=4;
} }
@ -394,7 +394,7 @@ u32 fastCopy(armcpu_t* cpu)
cnt &= 0x1FFFFF; cnt &= 0x1FFFFF;
while(cnt) while(cnt)
{ {
MMU_writeWord(cpu->proc_ID, dst, MMU_readWord(cpu->proc_ID, src)); MMU_write32(cpu->proc_ID, dst, MMU_read32(cpu->proc_ID, src));
cnt--; cnt--;
dst+=4; dst+=4;
src+=4; src+=4;
@ -402,11 +402,11 @@ u32 fastCopy(armcpu_t* cpu)
break; break;
case 1: case 1:
{ {
u32 val = MMU_readWord(cpu->proc_ID, src); u32 val = MMU_read32(cpu->proc_ID, src);
cnt &= 0x1FFFFF; cnt &= 0x1FFFFF;
while(cnt) while(cnt)
{ {
MMU_writeWord(cpu->proc_ID, dst, val); MMU_write32(cpu->proc_ID, dst, val);
cnt--; cnt--;
dst+=4; dst+=4;
} }
@ -425,7 +425,7 @@ u32 LZ77UnCompVram(armcpu_t* cpu)
int len; int len;
u32 source = cpu->R[0]; u32 source = cpu->R[0];
u32 dest = cpu->R[1]; u32 dest = cpu->R[1];
u32 header = MMU_readWord(cpu->proc_ID, source); u32 header = MMU_read32(cpu->proc_ID, source);
source += 4; source += 4;
if(((source & 0xe000000) == 0) || if(((source & 0xe000000) == 0) ||
@ -439,7 +439,7 @@ u32 LZ77UnCompVram(armcpu_t* cpu)
len = header >> 8; len = header >> 8;
while(len > 0) { while(len > 0) {
u8 d = MMU_readByte(cpu->proc_ID, source++); u8 d = MMU_read8(cpu->proc_ID, source++);
if(d) { if(d) {
for(i1 = 0; i1 < 8; i1++) { for(i1 = 0; i1 < 8; i1++) {
@ -447,18 +447,18 @@ u32 LZ77UnCompVram(armcpu_t* cpu)
int length; int length;
int offset; int offset;
u32 windowOffset; u32 windowOffset;
u16 data = MMU_readByte(cpu->proc_ID, source++) << 8; u16 data = MMU_read8(cpu->proc_ID, source++) << 8;
data |= MMU_readByte(cpu->proc_ID, source++); data |= MMU_read8(cpu->proc_ID, source++);
length = (data >> 12) + 3; length = (data >> 12) + 3;
offset = (data & 0x0FFF); offset = (data & 0x0FFF);
windowOffset = dest + byteCount - offset - 1; windowOffset = dest + byteCount - offset - 1;
for(i2 = 0; i2 < length; i2++) { for(i2 = 0; i2 < length; i2++) {
writeValue |= (MMU_readByte(cpu->proc_ID, windowOffset++) << byteShift); writeValue |= (MMU_read8(cpu->proc_ID, windowOffset++) << byteShift);
byteShift += 8; byteShift += 8;
byteCount++; byteCount++;
if(byteCount == 2) { if(byteCount == 2) {
MMU_writeHWord(cpu->proc_ID, dest, writeValue); MMU_write16(cpu->proc_ID, dest, writeValue);
dest += 2; dest += 2;
byteCount = 0; byteCount = 0;
byteShift = 0; byteShift = 0;
@ -469,11 +469,11 @@ u32 LZ77UnCompVram(armcpu_t* cpu)
return 0; return 0;
} }
} else { } else {
writeValue |= (MMU_readByte(cpu->proc_ID, source++) << byteShift); writeValue |= (MMU_read8(cpu->proc_ID, source++) << byteShift);
byteShift += 8; byteShift += 8;
byteCount++; byteCount++;
if(byteCount == 2) { if(byteCount == 2) {
MMU_writeHWord(cpu->proc_ID, dest, writeValue); MMU_write16(cpu->proc_ID, dest, writeValue);
dest += 2; dest += 2;
byteCount = 0; byteCount = 0;
byteShift = 0; byteShift = 0;
@ -487,11 +487,11 @@ u32 LZ77UnCompVram(armcpu_t* cpu)
} }
} else { } else {
for(i1 = 0; i1 < 8; i1++) { for(i1 = 0; i1 < 8; i1++) {
writeValue |= (MMU_readByte(cpu->proc_ID, source++) << byteShift); writeValue |= (MMU_read8(cpu->proc_ID, source++) << byteShift);
byteShift += 8; byteShift += 8;
byteCount++; byteCount++;
if(byteCount == 2) { if(byteCount == 2) {
MMU_writeHWord(cpu->proc_ID, dest, writeValue); MMU_write16(cpu->proc_ID, dest, writeValue);
dest += 2; dest += 2;
byteShift = 0; byteShift = 0;
byteCount = 0; byteCount = 0;
@ -513,7 +513,7 @@ u32 LZ77UnCompWram(armcpu_t* cpu)
u32 source = cpu->R[0]; u32 source = cpu->R[0];
u32 dest = cpu->R[1]; u32 dest = cpu->R[1];
u32 header = MMU_readWord(cpu->proc_ID, source); u32 header = MMU_read32(cpu->proc_ID, source);
source += 4; source += 4;
if(((source & 0xe000000) == 0) || if(((source & 0xe000000) == 0) ||
@ -523,7 +523,7 @@ u32 LZ77UnCompWram(armcpu_t* cpu)
len = header >> 8; len = header >> 8;
while(len > 0) { while(len > 0) {
u8 d = MMU_readByte(cpu->proc_ID, source++); u8 d = MMU_read8(cpu->proc_ID, source++);
if(d) { if(d) {
for(i1 = 0; i1 < 8; i1++) { for(i1 = 0; i1 < 8; i1++) {
@ -531,19 +531,19 @@ u32 LZ77UnCompWram(armcpu_t* cpu)
int length; int length;
int offset; int offset;
u32 windowOffset; u32 windowOffset;
u16 data = MMU_readByte(cpu->proc_ID, source++) << 8; u16 data = MMU_read8(cpu->proc_ID, source++) << 8;
data |= MMU_readByte(cpu->proc_ID, source++); data |= MMU_read8(cpu->proc_ID, source++);
length = (data >> 12) + 3; length = (data >> 12) + 3;
offset = (data & 0x0FFF); offset = (data & 0x0FFF);
windowOffset = dest - offset - 1; windowOffset = dest - offset - 1;
for(i2 = 0; i2 < length; i2++) { for(i2 = 0; i2 < length; i2++) {
MMU_writeByte(cpu->proc_ID, dest++, MMU_readByte(cpu->proc_ID, windowOffset++)); MMU_write8(cpu->proc_ID, dest++, MMU_read8(cpu->proc_ID, windowOffset++));
len--; len--;
if(len == 0) if(len == 0)
return 0; return 0;
} }
} else { } else {
MMU_writeByte(cpu->proc_ID, dest++, MMU_readByte(cpu->proc_ID, source++)); MMU_write8(cpu->proc_ID, dest++, MMU_read8(cpu->proc_ID, source++));
len--; len--;
if(len == 0) if(len == 0)
return 0; return 0;
@ -552,7 +552,7 @@ u32 LZ77UnCompWram(armcpu_t* cpu)
} }
} else { } else {
for(i1 = 0; i1 < 8; i1++) { for(i1 = 0; i1 < 8; i1++) {
MMU_writeByte(cpu->proc_ID, dest++, MMU_readByte(cpu->proc_ID, source++)); MMU_write8(cpu->proc_ID, dest++, MMU_read8(cpu->proc_ID, source++));
len--; len--;
if(len == 0) if(len == 0)
return 0; return 0;
@ -572,7 +572,7 @@ u32 RLUnCompVram(armcpu_t* cpu)
u32 source = cpu->R[0]; u32 source = cpu->R[0];
u32 dest = cpu->R[1]; u32 dest = cpu->R[1];
u32 header = MMU_readWord(cpu->proc_ID, source); u32 header = MMU_read32(cpu->proc_ID, source);
source += 4; source += 4;
if(((source & 0xe000000) == 0) || if(((source & 0xe000000) == 0) ||
@ -585,10 +585,10 @@ u32 RLUnCompVram(armcpu_t* cpu)
writeValue = 0; writeValue = 0;
while(len > 0) { while(len > 0) {
u8 d = MMU_readByte(cpu->proc_ID, source++); u8 d = MMU_read8(cpu->proc_ID, source++);
int l = d & 0x7F; int l = d & 0x7F;
if(d & 0x80) { if(d & 0x80) {
u8 data = MMU_readByte(cpu->proc_ID, source++); u8 data = MMU_read8(cpu->proc_ID, source++);
l += 3; l += 3;
for(i = 0;i < l; i++) { for(i = 0;i < l; i++) {
writeValue |= (data << byteShift); writeValue |= (data << byteShift);
@ -596,7 +596,7 @@ u32 RLUnCompVram(armcpu_t* cpu)
byteCount++; byteCount++;
if(byteCount == 2) { if(byteCount == 2) {
MMU_writeHWord(cpu->proc_ID, dest, writeValue); MMU_write16(cpu->proc_ID, dest, writeValue);
dest += 2; dest += 2;
byteCount = 0; byteCount = 0;
byteShift = 0; byteShift = 0;
@ -609,11 +609,11 @@ u32 RLUnCompVram(armcpu_t* cpu)
} else { } else {
l++; l++;
for(i = 0; i < l; i++) { for(i = 0; i < l; i++) {
writeValue |= (MMU_readByte(cpu->proc_ID, source++) << byteShift); writeValue |= (MMU_read8(cpu->proc_ID, source++) << byteShift);
byteShift += 8; byteShift += 8;
byteCount++; byteCount++;
if(byteCount == 2) { if(byteCount == 2) {
MMU_writeHWord(cpu->proc_ID, dest, writeValue); MMU_write16(cpu->proc_ID, dest, writeValue);
dest += 2; dest += 2;
byteCount = 0; byteCount = 0;
byteShift = 0; byteShift = 0;
@ -635,7 +635,7 @@ u32 RLUnCompWram(armcpu_t* cpu)
u32 source = cpu->R[0]; u32 source = cpu->R[0];
u32 dest = cpu->R[1]; u32 dest = cpu->R[1];
u32 header = MMU_readWord(cpu->proc_ID, source); u32 header = MMU_read32(cpu->proc_ID, source);
source += 4; source += 4;
if(((source & 0xe000000) == 0) || if(((source & 0xe000000) == 0) ||
@ -645,13 +645,13 @@ u32 RLUnCompWram(armcpu_t* cpu)
len = header >> 8; len = header >> 8;
while(len > 0) { while(len > 0) {
u8 d = MMU_readByte(cpu->proc_ID, source++); u8 d = MMU_read8(cpu->proc_ID, source++);
int l = d & 0x7F; int l = d & 0x7F;
if(d & 0x80) { if(d & 0x80) {
u8 data = MMU_readByte(cpu->proc_ID, source++); u8 data = MMU_read8(cpu->proc_ID, source++);
l += 3; l += 3;
for(i = 0;i < l; i++) { for(i = 0;i < l; i++) {
MMU_writeByte(cpu->proc_ID, dest++, data); MMU_write8(cpu->proc_ID, dest++, data);
len--; len--;
if(len == 0) if(len == 0)
return 0; return 0;
@ -659,7 +659,7 @@ u32 RLUnCompWram(armcpu_t* cpu)
} else { } else {
l++; l++;
for(i = 0; i < l; i++) { for(i = 0; i < l; i++) {
MMU_writeByte(cpu->proc_ID, dest++, MMU_readByte(cpu->proc_ID, source++)); MMU_write8(cpu->proc_ID, dest++, MMU_read8(cpu->proc_ID, source++));
len--; len--;
if(len == 0) if(len == 0)
return 0; return 0;
@ -680,14 +680,14 @@ u32 UnCompHuffman(armcpu_t* cpu)
source = cpu->R[0]; source = cpu->R[0];
dest = cpu->R[1]; dest = cpu->R[1];
header = MMU_readByte(cpu->proc_ID, source); header = MMU_read8(cpu->proc_ID, source);
source += 4; source += 4;
if(((source & 0xe000000) == 0) || if(((source & 0xe000000) == 0) ||
((source + ((header >> 8) & 0x1fffff)) & 0xe000000) == 0) ((source + ((header >> 8) & 0x1fffff)) & 0xe000000) == 0)
return 0; return 0;
treeSize = MMU_readByte(cpu->proc_ID, source++); treeSize = MMU_read8(cpu->proc_ID, source++);
treeStart = source; treeStart = source;
@ -696,11 +696,11 @@ u32 UnCompHuffman(armcpu_t* cpu)
len = header >> 8; len = header >> 8;
mask = 0x80000000; mask = 0x80000000;
data = MMU_readByte(cpu->proc_ID, source); data = MMU_read8(cpu->proc_ID, source);
source += 4; source += 4;
pos = 0; pos = 0;
rootNode = MMU_readByte(cpu->proc_ID, treeStart); rootNode = MMU_read8(cpu->proc_ID, treeStart);
currentNode = rootNode; currentNode = rootNode;
writeData = 0; writeData = 0;
byteShift = 0; byteShift = 0;
@ -719,12 +719,12 @@ u32 UnCompHuffman(armcpu_t* cpu)
// right // right
if(currentNode & 0x40) if(currentNode & 0x40)
writeData = 1; writeData = 1;
currentNode = MMU_readByte(cpu->proc_ID, treeStart+pos+1); currentNode = MMU_read8(cpu->proc_ID, treeStart+pos+1);
} else { } else {
// left // left
if(currentNode & 0x80) if(currentNode & 0x80)
writeData = 1; writeData = 1;
currentNode = MMU_readByte(cpu->proc_ID, treeStart+pos); currentNode = MMU_read8(cpu->proc_ID, treeStart+pos);
} }
if(writeData) { if(writeData) {
@ -739,7 +739,7 @@ u32 UnCompHuffman(armcpu_t* cpu)
if(byteCount == 4) { if(byteCount == 4) {
byteCount = 0; byteCount = 0;
byteShift = 0; byteShift = 0;
MMU_writeByte(cpu->proc_ID, dest, writeValue); MMU_write8(cpu->proc_ID, dest, writeValue);
writeValue = 0; writeValue = 0;
dest += 4; dest += 4;
len -= 4; len -= 4;
@ -748,7 +748,7 @@ u32 UnCompHuffman(armcpu_t* cpu)
mask >>= 1; mask >>= 1;
if(mask == 0) { if(mask == 0) {
mask = 0x80000000; mask = 0x80000000;
data = MMU_readByte(cpu->proc_ID, source); data = MMU_read8(cpu->proc_ID, source);
source += 4; source += 4;
} }
} }
@ -766,12 +766,12 @@ u32 UnCompHuffman(armcpu_t* cpu)
// right // right
if(currentNode & 0x40) if(currentNode & 0x40)
writeData = 1; writeData = 1;
currentNode = MMU_readByte(cpu->proc_ID, treeStart+pos+1); currentNode = MMU_read8(cpu->proc_ID, treeStart+pos+1);
} else { } else {
// left // left
if(currentNode & 0x80) if(currentNode & 0x80)
writeData = 1; writeData = 1;
currentNode = MMU_readByte(cpu->proc_ID, treeStart+pos); currentNode = MMU_read8(cpu->proc_ID, treeStart+pos);
} }
if(writeData) { if(writeData) {
@ -792,7 +792,7 @@ u32 UnCompHuffman(armcpu_t* cpu)
if(byteCount == 4) { if(byteCount == 4) {
byteCount = 0; byteCount = 0;
byteShift = 0; byteShift = 0;
MMU_writeByte(cpu->proc_ID, dest, writeValue); MMU_write8(cpu->proc_ID, dest, writeValue);
dest += 4; dest += 4;
writeValue = 0; writeValue = 0;
len -= 4; len -= 4;
@ -805,7 +805,7 @@ u32 UnCompHuffman(armcpu_t* cpu)
mask >>= 1; mask >>= 1;
if(mask == 0) { if(mask == 0) {
mask = 0x80000000; mask = 0x80000000;
data = MMU_readByte(cpu->proc_ID, source); data = MMU_read8(cpu->proc_ID, source);
source += 4; source += 4;
} }
} }
@ -823,15 +823,15 @@ u32 BitUnPack(armcpu_t* cpu)
dest = cpu->R[1]; dest = cpu->R[1];
header = cpu->R[2]; header = cpu->R[2];
len = MMU_readHWord(cpu->proc_ID, header); len = MMU_read16(cpu->proc_ID, header);
// check address // check address
bits = MMU_readByte(cpu->proc_ID, header+2); bits = MMU_read8(cpu->proc_ID, header+2);
revbits = 8 - bits; revbits = 8 - bits;
// u32 value = 0; // u32 value = 0;
base = MMU_readByte(cpu->proc_ID, header+4); base = MMU_read8(cpu->proc_ID, header+4);
addBase = (base & 0x80000000) ? 1 : 0; addBase = (base & 0x80000000) ? 1 : 0;
base &= 0x7fffffff; base &= 0x7fffffff;
dataSize = MMU_readByte(cpu->proc_ID, header+3); dataSize = MMU_read8(cpu->proc_ID, header+3);
data = 0; data = 0;
bitwritecount = 0; bitwritecount = 0;
@ -840,7 +840,7 @@ u32 BitUnPack(armcpu_t* cpu)
if(len < 0) if(len < 0)
break; break;
mask = 0xff >> revbits; mask = 0xff >> revbits;
b = MMU_readByte(cpu->proc_ID, source); b = MMU_read8(cpu->proc_ID, source);
source++; source++;
bitcount = 0; bitcount = 0;
while(1) { while(1) {
@ -854,7 +854,7 @@ u32 BitUnPack(armcpu_t* cpu)
data |= temp << bitwritecount; data |= temp << bitwritecount;
bitwritecount += dataSize; bitwritecount += dataSize;
if(bitwritecount >= 32) { if(bitwritecount >= 32) {
MMU_writeByte(cpu->proc_ID, dest, data); MMU_write8(cpu->proc_ID, dest, data);
dest += 4; dest += 4;
data = 0; data = 0;
bitwritecount = 0; bitwritecount = 0;
@ -875,7 +875,7 @@ u32 Diff8bitUnFilterWram(armcpu_t* cpu)
source = cpu->R[0]; source = cpu->R[0];
dest = cpu->R[1]; dest = cpu->R[1];
header = MMU_readByte(cpu->proc_ID, source); header = MMU_read8(cpu->proc_ID, source);
source += 4; source += 4;
if(((source & 0xe000000) == 0) || if(((source & 0xe000000) == 0) ||
@ -884,14 +884,14 @@ u32 Diff8bitUnFilterWram(armcpu_t* cpu)
len = header >> 8; len = header >> 8;
data = MMU_readByte(cpu->proc_ID, source++); data = MMU_read8(cpu->proc_ID, source++);
MMU_writeByte(cpu->proc_ID, dest++, data); MMU_write8(cpu->proc_ID, dest++, data);
len--; len--;
while(len > 0) { while(len > 0) {
diff = MMU_readByte(cpu->proc_ID, source++); diff = MMU_read8(cpu->proc_ID, source++);
data += diff; data += diff;
MMU_writeByte(cpu->proc_ID, dest++, data); MMU_write8(cpu->proc_ID, dest++, data);
len--; len--;
} }
return 1; return 1;
@ -906,7 +906,7 @@ u32 Diff16bitUnFilter(armcpu_t* cpu)
source = cpu->R[0]; source = cpu->R[0];
dest = cpu->R[1]; dest = cpu->R[1];
header = MMU_readByte(cpu->proc_ID, source); header = MMU_read8(cpu->proc_ID, source);
source += 4; source += 4;
if(((source & 0xe000000) == 0) || if(((source & 0xe000000) == 0) ||
@ -915,17 +915,17 @@ u32 Diff16bitUnFilter(armcpu_t* cpu)
len = header >> 8; len = header >> 8;
data = MMU_readHWord(cpu->proc_ID, source); data = MMU_read16(cpu->proc_ID, source);
source += 2; source += 2;
MMU_writeHWord(cpu->proc_ID, dest, data); MMU_write16(cpu->proc_ID, dest, data);
dest += 2; dest += 2;
len -= 2; len -= 2;
while(len >= 2) { while(len >= 2) {
u16 diff = MMU_readHWord(cpu->proc_ID, source); u16 diff = MMU_read16(cpu->proc_ID, source);
source += 2; source += 2;
data += diff; data += diff;
MMU_writeHWord(cpu->proc_ID, dest, data); MMU_write16(cpu->proc_ID, dest, data);
dest += 2; dest += 2;
len -= 2; len -= 2;
} }
@ -940,7 +940,7 @@ u32 bios_sqrt(armcpu_t* cpu)
u32 setHaltCR(armcpu_t* cpu) u32 setHaltCR(armcpu_t* cpu)
{ {
MMU_writeByte(cpu->proc_ID, 0x4000300+cpu->proc_ID, cpu->R[0]); MMU_write8(cpu->proc_ID, 0x4000300+cpu->proc_ID, cpu->R[0]);
return 1; return 1;
} }
@ -973,7 +973,7 @@ u32 getCRC16(armcpu_t* cpu)
static u16 val[] = { 0xC0C1,0xC181,0xC301,0xC601,0xCC01,0xD801,0xF001,0xA001 }; static u16 val[] = { 0xC0C1,0xC181,0xC301,0xC601,0xCC01,0xD801,0xF001,0xA001 };
for(i = 0; i < size; i++) for(i = 0; i < size; i++)
{ {
crc = crc ^ MMU_readByte( cpu->proc_ID, datap + i); crc = crc ^ MMU_read8( cpu->proc_ID, datap + i);
for(j = 0; j < 8; j++) { for(j = 0; j < 8; j++) {
int do_bit = 0; int do_bit = 0;

67
desmume/src/thumb_instructions.c
View File

@ -32,6 +32,23 @@
extern BOOL execute; extern BOOL execute;
// Use this macros for reading/writing, so the GDB stub isn't broken
#ifdef GDB_STUB
#define READ32(a,b) cpu->mem_if->read32(a,b)
#define WRITE32(a,b,c) cpu->mem_if->write32(a,b,c)
#define READ16(a,b) cpu->mem_if->read16(a,b)
#define WRITE16(a,b,c) cpu->mem_if->write16(a,b,c)
#define READ8(a,b) cpu->mem_if->read8(a,b)
#define WRITE8(a,b,c) cpu->mem_if->write8(a,b,c)
#else
#define READ32(a,b) MMU_read32(cpu->proc_ID, b)
#define WRITE32(a,b,c) MMU_write32(cpu->proc_ID,b,c)
#define READ16(a,b) MMU_read16(cpu->proc_ID, b)
#define WRITE16(a,b,c) MMU_write16(cpu->proc_ID,b,c)
#define READ8(a,b) MMU_read8(cpu->proc_ID, b)
#define WRITE8(a,b,c) MMU_write8(cpu->proc_ID,b,c)
#endif
static u32 FASTCALL OP_UND_THUMB(armcpu_t *cpu) static u32 FASTCALL OP_UND_THUMB(armcpu_t *cpu)
{ {
execute = FALSE; execute = FALSE;
@ -538,7 +555,7 @@ static u32 FASTCALL OP_LDR_PCREL(armcpu_t *cpu)
{ {
u32 adr = (cpu->R[15]&0xFFFFFFFC) + ((cpu->instruction&0xFF)<<2); u32 adr = (cpu->R[15]&0xFFFFFFFC) + ((cpu->instruction&0xFF)<<2);
cpu->R[REG_NUM(cpu->instruction, 8)] = cpu->mem_if->read32(cpu->mem_if->data, adr); cpu->R[REG_NUM(cpu->instruction, 8)] = READ32(cpu->mem_if->data, adr);
return 3 + MMU.MMU_WAIT32[cpu->proc_ID][(adr>>24)&0xF]; return 3 + MMU.MMU_WAIT32[cpu->proc_ID][(adr>>24)&0xF];
} }
@ -547,7 +564,7 @@ static u32 FASTCALL OP_STR_REG_OFF(armcpu_t *cpu)
{ {
u32 i = cpu->instruction; u32 i = cpu->instruction;
u32 adr = cpu->R[REG_NUM(i, 6)] + cpu->R[REG_NUM(i, 3)]; u32 adr = cpu->R[REG_NUM(i, 6)] + cpu->R[REG_NUM(i, 3)];
cpu->mem_if->write32(cpu->mem_if->data, adr, cpu->R[REG_NUM(i, 0)]); WRITE32(cpu->mem_if->data, adr, cpu->R[REG_NUM(i, 0)]);
return 2 + MMU.MMU_WAIT32[cpu->proc_ID][(adr>>24)&0xF]; return 2 + MMU.MMU_WAIT32[cpu->proc_ID][(adr>>24)&0xF];
} }
@ -556,7 +573,7 @@ static u32 FASTCALL OP_STRH_REG_OFF(armcpu_t *cpu)
{ {
u32 i = cpu->instruction; u32 i = cpu->instruction;
u32 adr = cpu->R[REG_NUM(i, 3)] + cpu->R[REG_NUM(i, 6)]; u32 adr = cpu->R[REG_NUM(i, 3)] + cpu->R[REG_NUM(i, 6)];
cpu->mem_if->write16(cpu->mem_if->data, adr, ((u16)cpu->R[REG_NUM(i, 0)])); WRITE16(cpu->mem_if->data, adr, ((u16)cpu->R[REG_NUM(i, 0)]));
return 2 + MMU.MMU_WAIT16[cpu->proc_ID][(adr>>24)&0xF]; return 2 + MMU.MMU_WAIT16[cpu->proc_ID][(adr>>24)&0xF];
} }
@ -565,7 +582,7 @@ static u32 FASTCALL OP_STRB_REG_OFF(armcpu_t *cpu)
{ {
u32 i = cpu->instruction; u32 i = cpu->instruction;
u32 adr = cpu->R[REG_NUM(i, 3)] + cpu->R[REG_NUM(i, 6)]; u32 adr = cpu->R[REG_NUM(i, 3)] + cpu->R[REG_NUM(i, 6)];
cpu->mem_if->write8(cpu->mem_if->data, adr, ((u8)cpu->R[REG_NUM(i, 0)])); WRITE8(cpu->mem_if->data, adr, ((u8)cpu->R[REG_NUM(i, 0)]));
return 2 + MMU.MMU_WAIT16[cpu->proc_ID][(adr>>24)&0xF]; return 2 + MMU.MMU_WAIT16[cpu->proc_ID][(adr>>24)&0xF];
} }
@ -574,7 +591,7 @@ static u32 FASTCALL OP_LDRSB_REG_OFF(armcpu_t *cpu)
{ {
u32 i = cpu->instruction; u32 i = cpu->instruction;
u32 adr = cpu->R[REG_NUM(i, 3)] + cpu->R[REG_NUM(i, 6)]; u32 adr = cpu->R[REG_NUM(i, 3)] + cpu->R[REG_NUM(i, 6)];
cpu->R[REG_NUM(i, 0)] = (s32)((s8)cpu->mem_if->read8(cpu->mem_if->data, adr)); cpu->R[REG_NUM(i, 0)] = (s32)((s8)READ8(cpu->mem_if->data, adr));
return 3 + MMU.MMU_WAIT16[cpu->proc_ID][(adr>>24)&0xF]; return 3 + MMU.MMU_WAIT16[cpu->proc_ID][(adr>>24)&0xF];
} }
@ -583,7 +600,7 @@ static u32 FASTCALL OP_LDR_REG_OFF(armcpu_t *cpu)
{ {
u32 i = cpu->instruction; u32 i = cpu->instruction;
u32 adr = (cpu->R[REG_NUM(i, 3)] + cpu->R[REG_NUM(i, 6)]); u32 adr = (cpu->R[REG_NUM(i, 3)] + cpu->R[REG_NUM(i, 6)]);
u32 tempValue = cpu->mem_if->read32(cpu->mem_if->data, adr&0xFFFFFFFC); u32 tempValue = READ32(cpu->mem_if->data, adr&0xFFFFFFFC);
adr = (adr&3)*8; adr = (adr&3)*8;
tempValue = (tempValue>>adr) | (tempValue<<(32-adr)); tempValue = (tempValue>>adr) | (tempValue<<(32-adr));
@ -596,7 +613,7 @@ static u32 FASTCALL OP_LDRH_REG_OFF(armcpu_t *cpu)
{ {
u32 i = cpu->instruction; u32 i = cpu->instruction;
u32 adr = cpu->R[REG_NUM(i, 3)] + cpu->R[REG_NUM(i, 6)]; u32 adr = cpu->R[REG_NUM(i, 3)] + cpu->R[REG_NUM(i, 6)];
cpu->R[REG_NUM(i, 0)] = (u32)cpu->mem_if->read16(cpu->mem_if->data, adr); cpu->R[REG_NUM(i, 0)] = (u32)READ16(cpu->mem_if->data, adr);
return 3 + MMU.MMU_WAIT16[cpu->proc_ID][(adr>>24)&0xF]; return 3 + MMU.MMU_WAIT16[cpu->proc_ID][(adr>>24)&0xF];
} }
@ -605,7 +622,7 @@ static u32 FASTCALL OP_LDRB_REG_OFF(armcpu_t *cpu)
{ {
u32 i = cpu->instruction; u32 i = cpu->instruction;
u32 adr = cpu->R[REG_NUM(i, 3)] + cpu->R[REG_NUM(i, 6)]; u32 adr = cpu->R[REG_NUM(i, 3)] + cpu->R[REG_NUM(i, 6)];
cpu->R[REG_NUM(i, 0)] = (u32)cpu->mem_if->read8(cpu->mem_if->data, adr); cpu->R[REG_NUM(i, 0)] = (u32)READ8(cpu->mem_if->data, adr);
return 3 + MMU.MMU_WAIT16[cpu->proc_ID][(adr>>24)&0xF]; return 3 + MMU.MMU_WAIT16[cpu->proc_ID][(adr>>24)&0xF];
} }
@ -614,7 +631,7 @@ static u32 FASTCALL OP_LDRSH_REG_OFF(armcpu_t *cpu)
{ {
u32 i = cpu->instruction; u32 i = cpu->instruction;
u32 adr = cpu->R[REG_NUM(i, 3)] + cpu->R[REG_NUM(i, 6)]; u32 adr = cpu->R[REG_NUM(i, 3)] + cpu->R[REG_NUM(i, 6)];
cpu->R[REG_NUM(i, 0)] = (s32)((s16)cpu->mem_if->read16(cpu->mem_if->data, adr)); cpu->R[REG_NUM(i, 0)] = (s32)((s16)READ16(cpu->mem_if->data, adr));
return 3 + MMU.MMU_WAIT16[cpu->proc_ID][(adr>>24)&0xF]; return 3 + MMU.MMU_WAIT16[cpu->proc_ID][(adr>>24)&0xF];
} }
@ -623,7 +640,7 @@ static u32 FASTCALL OP_STR_IMM_OFF(armcpu_t *cpu)
{ {
u32 i = cpu->instruction; u32 i = cpu->instruction;
u32 adr = cpu->R[REG_NUM(i, 3)] + ((i>>4)&0x7C); u32 adr = cpu->R[REG_NUM(i, 3)] + ((i>>4)&0x7C);
cpu->mem_if->write32(cpu->mem_if->data, adr, cpu->R[REG_NUM(i, 0)]); WRITE32(cpu->mem_if->data, adr, cpu->R[REG_NUM(i, 0)]);
return 2 + MMU.MMU_WAIT32[cpu->proc_ID][(adr>>24)&0xF]; return 2 + MMU.MMU_WAIT32[cpu->proc_ID][(adr>>24)&0xF];
} }
@ -632,7 +649,7 @@ static u32 FASTCALL OP_LDR_IMM_OFF(armcpu_t *cpu)
{ {
u32 i = cpu->instruction; u32 i = cpu->instruction;
u32 adr = cpu->R[REG_NUM(i, 3)] + ((i>>4)&0x7C); u32 adr = cpu->R[REG_NUM(i, 3)] + ((i>>4)&0x7C);
u32 tempValue = cpu->mem_if->read32(cpu->mem_if->data, adr&0xFFFFFFFC); u32 tempValue = READ32(cpu->mem_if->data, adr&0xFFFFFFFC);
adr = (adr&3)*8; adr = (adr&3)*8;
tempValue = (tempValue>>adr) | (tempValue<<(32-adr)); tempValue = (tempValue>>adr) | (tempValue<<(32-adr));
cpu->R[REG_NUM(i, 0)] = tempValue; cpu->R[REG_NUM(i, 0)] = tempValue;
@ -644,7 +661,7 @@ static u32 FASTCALL OP_STRB_IMM_OFF(armcpu_t *cpu)
{ {
u32 i = cpu->instruction; u32 i = cpu->instruction;
u32 adr = cpu->R[REG_NUM(i, 3)] + ((i>>6)&0x1F); u32 adr = cpu->R[REG_NUM(i, 3)] + ((i>>6)&0x1F);
cpu->mem_if->write8(cpu->mem_if->data, adr, (u8)cpu->R[REG_NUM(i, 0)]); WRITE8(cpu->mem_if->data, adr, (u8)cpu->R[REG_NUM(i, 0)]);
return 2 + MMU.MMU_WAIT16[cpu->proc_ID][(adr>>24)&0xF]; return 2 + MMU.MMU_WAIT16[cpu->proc_ID][(adr>>24)&0xF];
} }
@ -653,7 +670,7 @@ static u32 FASTCALL OP_LDRB_IMM_OFF(armcpu_t *cpu)
{ {
u32 i = cpu->instruction; u32 i = cpu->instruction;
u32 adr = cpu->R[REG_NUM(i, 3)] + ((i>>6)&0x1F); u32 adr = cpu->R[REG_NUM(i, 3)] + ((i>>6)&0x1F);
cpu->R[REG_NUM(i, 0)] = cpu->mem_if->read8(cpu->mem_if->data, adr); cpu->R[REG_NUM(i, 0)] = READ8(cpu->mem_if->data, adr);
return 3 + MMU.MMU_WAIT16[cpu->proc_ID][(adr>>24)&0xF]; return 3 + MMU.MMU_WAIT16[cpu->proc_ID][(adr>>24)&0xF];
} }
@ -662,7 +679,7 @@ static u32 FASTCALL OP_STRH_IMM_OFF(armcpu_t *cpu)
{ {
u32 i = cpu->instruction; u32 i = cpu->instruction;
u32 adr = cpu->R[REG_NUM(i, 3)] + ((i>>5)&0x3E); u32 adr = cpu->R[REG_NUM(i, 3)] + ((i>>5)&0x3E);
cpu->mem_if->write16(cpu->mem_if->data, adr, (u16)cpu->R[REG_NUM(i, 0)]); WRITE16(cpu->mem_if->data, adr, (u16)cpu->R[REG_NUM(i, 0)]);
return 2 + MMU.MMU_WAIT16[cpu->proc_ID][(adr>>24)&0xF]; return 2 + MMU.MMU_WAIT16[cpu->proc_ID][(adr>>24)&0xF];
} }
@ -671,7 +688,7 @@ static u32 FASTCALL OP_LDRH_IMM_OFF(armcpu_t *cpu)
{ {
u32 i = cpu->instruction; u32 i = cpu->instruction;
u32 adr = cpu->R[REG_NUM(i, 3)] + ((i>>5)&0x3E); u32 adr = cpu->R[REG_NUM(i, 3)] + ((i>>5)&0x3E);
cpu->R[REG_NUM(i, 0)] = cpu->mem_if->read16(cpu->mem_if->data, adr); cpu->R[REG_NUM(i, 0)] = READ16(cpu->mem_if->data, adr);
return 3 + MMU.MMU_WAIT16[cpu->proc_ID][(adr>>24)&0xF]; return 3 + MMU.MMU_WAIT16[cpu->proc_ID][(adr>>24)&0xF];
} }
@ -680,7 +697,7 @@ static u32 FASTCALL OP_STR_SPREL(armcpu_t *cpu)
{ {
u32 i = cpu->instruction; u32 i = cpu->instruction;
u32 adr = cpu->R[13] + ((i&0xFF)<<2); u32 adr = cpu->R[13] + ((i&0xFF)<<2);
cpu->mem_if->write32(cpu->mem_if->data, adr, cpu->R[REG_NUM(i, 8)]); WRITE32(cpu->mem_if->data, adr, cpu->R[REG_NUM(i, 8)]);
return 2 + MMU.MMU_WAIT16[cpu->proc_ID][(adr>>24)&0xF]; return 2 + MMU.MMU_WAIT16[cpu->proc_ID][(adr>>24)&0xF];
} }
@ -689,7 +706,7 @@ static u32 FASTCALL OP_LDR_SPREL(armcpu_t *cpu)
{ {
u32 i = cpu->instruction; u32 i = cpu->instruction;
u32 adr = cpu->R[13] + ((i&0xFF)<<2); u32 adr = cpu->R[13] + ((i&0xFF)<<2);
cpu->R[REG_NUM(i, 8)] = cpu->mem_if->read32(cpu->mem_if->data, adr); cpu->R[REG_NUM(i, 8)] = READ32(cpu->mem_if->data, adr);
return 3 + MMU.MMU_WAIT32[cpu->proc_ID][(adr>>24)&0xF]; return 3 + MMU.MMU_WAIT32[cpu->proc_ID][(adr>>24)&0xF];
} }
@ -733,7 +750,7 @@ static u32 FASTCALL OP_PUSH(armcpu_t *cpu)
for(j = 0; j<8; ++j) for(j = 0; j<8; ++j)
if(BIT_N(i, 7-j)) if(BIT_N(i, 7-j))
{ {
cpu->mem_if->write32(cpu->mem_if->data, adr, cpu->R[7-j]); WRITE32(cpu->mem_if->data, adr, cpu->R[7-j]);
c += MMU.MMU_WAIT32[cpu->proc_ID][(adr>>24)&0xF]; c += MMU.MMU_WAIT32[cpu->proc_ID][(adr>>24)&0xF];
adr -= 4; adr -= 4;
} }
@ -748,14 +765,14 @@ static u32 FASTCALL OP_PUSH_LR(armcpu_t *cpu)
u32 adr = cpu->R[13] - 4; u32 adr = cpu->R[13] - 4;
u32 c = 0, j; u32 c = 0, j;
cpu->mem_if->write32(cpu->mem_if->data, adr, cpu->R[14]); WRITE32(cpu->mem_if->data, adr, cpu->R[14]);
c += MMU.MMU_WAIT32[cpu->proc_ID][(adr>>24)&0xF]; c += MMU.MMU_WAIT32[cpu->proc_ID][(adr>>24)&0xF];
adr -= 4; adr -= 4;
for(j = 0; j<8; ++j) for(j = 0; j<8; ++j)
if(BIT_N(i, 7-j)) if(BIT_N(i, 7-j))
{ {
cpu->mem_if->write32(cpu->mem_if->data, adr, cpu->R[7-j]); WRITE32(cpu->mem_if->data, adr, cpu->R[7-j]);
c += MMU.MMU_WAIT32[cpu->proc_ID][(adr>>24)&0xF]; c += MMU.MMU_WAIT32[cpu->proc_ID][(adr>>24)&0xF];
adr -= 4; adr -= 4;
} }
@ -773,7 +790,7 @@ static u32 FASTCALL OP_POP(armcpu_t *cpu)
for(j = 0; j<8; ++j) for(j = 0; j<8; ++j)
if(BIT_N(i, j)) if(BIT_N(i, j))
{ {
cpu->R[j] = cpu->mem_if->read32(cpu->mem_if->data, adr); cpu->R[j] = READ32(cpu->mem_if->data, adr);
c += MMU.MMU_WAIT32[cpu->proc_ID][(adr>>24)&0xF]; c += MMU.MMU_WAIT32[cpu->proc_ID][(adr>>24)&0xF];
adr += 4; adr += 4;
} }
@ -792,12 +809,12 @@ static u32 FASTCALL OP_POP_PC(armcpu_t *cpu)
for(j = 0; j<8; ++j) for(j = 0; j<8; ++j)
if(BIT_N(i, j)) if(BIT_N(i, j))
{ {
cpu->R[j] = cpu->mem_if->read32(cpu->mem_if->data, adr); cpu->R[j] = READ32(cpu->mem_if->data, adr);
c += MMU.MMU_WAIT32[cpu->proc_ID][(adr>>24)&0xF]; c += MMU.MMU_WAIT32[cpu->proc_ID][(adr>>24)&0xF];
adr += 4; adr += 4;
} }
v = cpu->mem_if->read32(cpu->mem_if->data, adr); v = READ32(cpu->mem_if->data, adr);
c += MMU.MMU_WAIT32[cpu->proc_ID][(adr>>24)&0xF]; c += MMU.MMU_WAIT32[cpu->proc_ID][(adr>>24)&0xF];
cpu->R[15] = v & 0xFFFFFFFE; cpu->R[15] = v & 0xFFFFFFFE;
cpu->next_instruction = v & 0xFFFFFFFE; cpu->next_instruction = v & 0xFFFFFFFE;
@ -823,7 +840,7 @@ static u32 FASTCALL OP_STMIA_THUMB(armcpu_t *cpu)
for(j = 0; j<8; ++j) for(j = 0; j<8; ++j)
if(BIT_N(i, j)) if(BIT_N(i, j))
{ {
cpu->mem_if->write32(cpu->mem_if->data, adr, cpu->R[j]); WRITE32(cpu->mem_if->data, adr, cpu->R[j]);
c += MMU.MMU_WAIT32[cpu->proc_ID][(adr>>24)&0xF]; c += MMU.MMU_WAIT32[cpu->proc_ID][(adr>>24)&0xF];
adr += 4; adr += 4;
} }
@ -840,7 +857,7 @@ static u32 FASTCALL OP_LDMIA_THUMB(armcpu_t *cpu)
for(j = 0; j<8; ++j) for(j = 0; j<8; ++j)
if(BIT_N(i, j)) if(BIT_N(i, j))
{ {
cpu->R[j] = cpu->mem_if->read32(cpu->mem_if->data, adr); cpu->R[j] = READ32(cpu->mem_if->data, adr);
c += MMU.MMU_WAIT32[cpu->proc_ID][(adr>>24)&0xF]; c += MMU.MMU_WAIT32[cpu->proc_ID][(adr>>24)&0xF];
adr += 4; adr += 4;
} }

2
desmume/src/thumb_instructions.h
View File

@ -24,7 +24,7 @@
#include "armcpu.h" #include "armcpu.h"
extern u32 (* FASTCALL thumb_instructions_set[1024])(armcpu_t * cpu); extern u32 (FASTCALL* thumb_instructions_set[1024])(armcpu_t * cpu);
#endif #endif

8
desmume/src/windows/disView.c
View File

@ -91,7 +91,7 @@ LRESULT DesViewBox_OnPaint(CDesView * win, WPARAM wParam, LPARAM lParam)
for(u32 i = 0; i < nbligne; ++i) for(u32 i = 0; i < nbligne; ++i)
{ {
u32 ins = MMU_readWord(win->cpu->proc_ID, adr); u32 ins = MMU_read32(win->cpu->proc_ID, adr);
des_arm_instructions_set[INDEX(ins)](adr, ins, txt); des_arm_instructions_set[INDEX(ins)](adr, ins, txt);
sprintf(text, "%04X:%04X %08X %s", (int)(adr>>16), (int)(adr&0xFFFF), (int)ins, txt); sprintf(text, "%04X:%04X %08X %s", (int)(adr>>16), (int)(adr&0xFFFF), (int)ins, txt);
DrawText(mem_dc, text, -1, &rect, DT_TOP | DT_LEFT | DT_NOPREFIX); DrawText(mem_dc, text, -1, &rect, DT_TOP | DT_LEFT | DT_NOPREFIX);
@ -118,7 +118,7 @@ LRESULT DesViewBox_OnPaint(CDesView * win, WPARAM wParam, LPARAM lParam)
for(u32 i = 0; i < nbligne; ++i) for(u32 i = 0; i < nbligne; ++i)
{ {
u32 ins = MMU_readHWord(win->cpu->proc_ID, adr); u32 ins = MMU_read16(win->cpu->proc_ID, adr);
des_thumb_instructions_set[ins>>6](adr, ins, txt); des_thumb_instructions_set[ins>>6](adr, ins, txt);
sprintf(text, "%04X:%04X %04X %s", (int)(adr>>16), (int)(adr&0xFFFF), (int)ins, txt); sprintf(text, "%04X:%04X %04X %s", (int)(adr>>16), (int)(adr&0xFFFF), (int)ins, txt);
DrawText(mem_dc, text, -1, &rect, DT_TOP | DT_LEFT | DT_NOPREFIX); DrawText(mem_dc, text, -1, &rect, DT_TOP | DT_LEFT | DT_NOPREFIX);
@ -448,7 +448,7 @@ LRESULT DisViewBox_OnPaint(disview_struct *win, WPARAM wParam, LPARAM lParam)
for(i = 0; i < nbligne; ++i) for(i = 0; i < nbligne; ++i)
{ {
u32 ins = MMU_readWord(win->cpu->proc_ID, adr); u32 ins = MMU_read32(win->cpu->proc_ID, adr);
des_arm_instructions_set[INDEX(ins)](adr, ins, txt); des_arm_instructions_set[INDEX(ins)](adr, ins, txt);
sprintf(text, "%04X:%04X %08X %s", (int)(adr>>16), (int)(adr&0xFFFF), (int)ins, txt); sprintf(text, "%04X:%04X %08X %s", (int)(adr>>16), (int)(adr&0xFFFF), (int)ins, txt);
DrawText(mem_dc, text, -1, &rect, DT_TOP | DT_LEFT | DT_NOPREFIX); DrawText(mem_dc, text, -1, &rect, DT_TOP | DT_LEFT | DT_NOPREFIX);
@ -482,7 +482,7 @@ LRESULT DisViewBox_OnPaint(disview_struct *win, WPARAM wParam, LPARAM lParam)
for(i = 0; i < nbligne; ++i) for(i = 0; i < nbligne; ++i)
{ {
u32 ins = MMU_readHWord(win->cpu->proc_ID, adr); u32 ins = MMU_read16(win->cpu->proc_ID, adr);
des_thumb_instructions_set[ins>>6](adr, ins, txt); des_thumb_instructions_set[ins>>6](adr, ins, txt);
sprintf(text, "%04X:%04X %04X %s", (int)(adr>>16), (int)(adr&0xFFFF), (int)ins, txt); sprintf(text, "%04X:%04X %04X %s", (int)(adr>>16), (int)(adr&0xFFFF), (int)ins, txt);
DrawText(mem_dc, text, -1, &rect, DT_TOP | DT_LEFT | DT_NOPREFIX); DrawText(mem_dc, text, -1, &rect, DT_TOP | DT_LEFT | DT_NOPREFIX);

24
desmume/src/windows/main.c
View File

@ -590,14 +590,18 @@ int WINAPI WinMain (HINSTANCE hThisInstance,
int nFunsterStil) int nFunsterStil)
{ {
#ifdef GDB_STUB
gdbstub_handle_t arm9_gdb_stub; gdbstub_handle_t arm9_gdb_stub;
gdbstub_handle_t arm7_gdb_stub; gdbstub_handle_t arm7_gdb_stub;
struct armcpu_memory_iface *arm9_memio = &arm9_base_memory_iface; struct armcpu_memory_iface *arm9_memio = &arm9_base_memory_iface;
struct armcpu_memory_iface *arm7_memio = &arm7_base_memory_iface; struct armcpu_memory_iface *arm7_memio = &arm7_base_memory_iface;
struct armcpu_ctrl_iface *arm9_ctrl_iface; struct armcpu_ctrl_iface *arm9_ctrl_iface;
struct armcpu_ctrl_iface *arm7_ctrl_iface; struct armcpu_ctrl_iface *arm7_ctrl_iface;
#endif
struct configured_features my_config; struct configured_features my_config;
MSG messages; /* Here messages to the application are saved */ MSG messages; /* Here messages to the application are saved */
char text[80]; char text[80];
cwindow_struct MainWindow; cwindow_struct MainWindow;
@ -650,6 +654,7 @@ int WINAPI WinMain (HINSTANCE hThisInstance,
LogStart(); LogStart();
#endif #endif
#ifdef GDB_STUB
if ( my_config.arm9_gdb_port != 0) { if ( my_config.arm9_gdb_port != 0) {
arm9_gdb_stub = createStub_gdb( my_config.arm9_gdb_port, arm9_gdb_stub = createStub_gdb( my_config.arm9_gdb_port,
&arm9_memio, &arm9_direct_memory_iface); &arm9_memio, &arm9_direct_memory_iface);
@ -670,22 +675,25 @@ int WINAPI WinMain (HINSTANCE hThisInstance,
} }
} }
NDS_Init( arm9_memio, &arm9_ctrl_iface, NDS_Init( arm9_memio, &arm9_ctrl_iface,
arm7_memio, &arm7_ctrl_iface); arm7_memio, &arm7_ctrl_iface);
#else
NDS_Init ();
#endif
/* /*
* Activate the GDB stubs * Activate the GDB stubs
* This has to come after the NDS_Init where the cpus are set up. * This has to come after the NDS_Init where the cpus are set up.
*/ */
if ( my_config.arm9_gdb_port != 0) { #ifdef GDB_STUB
activateStub_gdb( arm9_gdb_stub, arm9_ctrl_iface); if ( my_config.arm9_gdb_port != 0) {
} activateStub_gdb( arm9_gdb_stub, arm9_ctrl_iface);
if ( my_config.arm7_gdb_port != 0) { }
activateStub_gdb( arm7_gdb_stub, arm7_ctrl_iface); if ( my_config.arm7_gdb_port != 0) {
} activateStub_gdb( arm7_gdb_stub, arm7_ctrl_iface);
}
#endif
GetPrivateProfileString("General", "Language", "0", text, 80, IniName); GetPrivateProfileString("General", "Language", "0", text, 80, IniName);
CheckLanguage(IDC_LANGENGLISH+atoi(text)); CheckLanguage(IDC_LANGENGLISH+atoi(text));

16
desmume/src/windows/memView.c
View File

@ -97,7 +97,7 @@ LRESULT MemViewBox_OnPaint(CMemView * win, WPARAM wParam, LPARAM lParam)
if(win->representation == 0) if(win->representation == 0)
for(j=0; j<16; ++j) for(j=0; j<16; ++j)
{ {
sprintf(text, "%02X", MMU_readByte(win->cpu, adr+j)); sprintf(text, "%02X", MMU_read8(win->cpu, adr+j));
DrawText(mem_dc, text, -1, &r, DT_TOP | DT_LEFT | DT_NOPREFIX); DrawText(mem_dc, text, -1, &r, DT_TOP | DT_LEFT | DT_NOPREFIX);
r.left+=3*fontsize.cx; r.left+=3*fontsize.cx;
} }
@ -105,14 +105,14 @@ LRESULT MemViewBox_OnPaint(CMemView * win, WPARAM wParam, LPARAM lParam)
if(win->representation == 1) if(win->representation == 1)
for(j=0; j<16; j+=2) for(j=0; j<16; j+=2)
{ {
sprintf(text, "%04X", MMU_readHWord(win->cpu, adr+j)); sprintf(text, "%04X", MMU_read16(win->cpu, adr+j));
DrawText(mem_dc, text, -1, &r, DT_TOP | DT_LEFT | DT_NOPREFIX); DrawText(mem_dc, text, -1, &r, DT_TOP | DT_LEFT | DT_NOPREFIX);
r.left+=5*fontsize.cx; r.left+=5*fontsize.cx;
} }
else else
for(j=0; j<16; j+=4) for(j=0; j<16; j+=4)
{ {
sprintf(text, "%08X", (int)MMU_readWord(win->cpu, adr+j)); sprintf(text, "%08X", (int)MMU_read32(win->cpu, adr+j));
DrawText(mem_dc, text, -1, &r, DT_TOP | DT_LEFT | DT_NOPREFIX); DrawText(mem_dc, text, -1, &r, DT_TOP | DT_LEFT | DT_NOPREFIX);
r.left+=9*fontsize.cx; r.left+=9*fontsize.cx;
} }
@ -121,7 +121,7 @@ LRESULT MemViewBox_OnPaint(CMemView * win, WPARAM wParam, LPARAM lParam)
for(j=0; j<16; ++j) for(j=0; j<16; ++j)
{ {
u8 c = MMU_readByte(win->cpu, adr+j); u8 c = MMU_read8(win->cpu, adr+j);
if(c >= 32 && c <= 127) { if(c >= 32 && c <= 127) {
text[j] = (char)c; text[j] = (char)c;
} }
@ -347,7 +347,7 @@ LRESULT MemViewBox_OnPaint(memview_struct * win, WPARAM wParam, LPARAM lParam)
if(win->representation == 0) if(win->representation == 0)
for(j=0; j<16; ++j) for(j=0; j<16; ++j)
{ {
sprintf(text, "%02X", MMU_readByte(win->cpu, adr+j)); sprintf(text, "%02X", MMU_read8(win->cpu, adr+j));
DrawText(mem_dc, text, -1, &r, DT_TOP | DT_LEFT | DT_NOPREFIX); DrawText(mem_dc, text, -1, &r, DT_TOP | DT_LEFT | DT_NOPREFIX);
r.left+=3*fontsize.cx; r.left+=3*fontsize.cx;
} }
@ -355,14 +355,14 @@ LRESULT MemViewBox_OnPaint(memview_struct * win, WPARAM wParam, LPARAM lParam)
if(win->representation == 1) if(win->representation == 1)
for(j=0; j<16; j+=2) for(j=0; j<16; j+=2)
{ {
sprintf(text, "%04X", MMU_readHWord(win->cpu, adr+j)); sprintf(text, "%04X", MMU_read16(win->cpu, adr+j));
DrawText(mem_dc, text, -1, &r, DT_TOP | DT_LEFT | DT_NOPREFIX); DrawText(mem_dc, text, -1, &r, DT_TOP | DT_LEFT | DT_NOPREFIX);
r.left+=5*fontsize.cx; r.left+=5*fontsize.cx;
} }
else else
for(j=0; j<16; j+=4) for(j=0; j<16; j+=4)
{ {
sprintf(text, "%08X", (int)MMU_readWord(win->cpu, adr+j)); sprintf(text, "%08X", (int)MMU_read32(win->cpu, adr+j));
DrawText(mem_dc, text, -1, &r, DT_TOP | DT_LEFT | DT_NOPREFIX); DrawText(mem_dc, text, -1, &r, DT_TOP | DT_LEFT | DT_NOPREFIX);
r.left+=9*fontsize.cx; r.left+=9*fontsize.cx;
} }
@ -371,7 +371,7 @@ LRESULT MemViewBox_OnPaint(memview_struct * win, WPARAM wParam, LPARAM lParam)
for(j=0; j<16; ++j) for(j=0; j<16; ++j)
{ {
u8 c = MMU_readByte(win->cpu, adr+j); u8 c = MMU_read8(win->cpu, adr+j);
if(c >= 32 && c <= 127) { if(c >= 32 && c <= 127) {
text[j] = (char)c; text[j] = (char)c;
} }