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MMU : preparing big cleanup (use #define USE_OLD 0 in MMU.c to help me with that)

This commit is contained in:
damdoum 2007-02-16 13:46:34 +00:00
parent 5442bf1d78
commit 549e1f72cb
5 changed files with 1386 additions and 273 deletions
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9
desmume/src/GPU.h
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@ -512,20 +512,21 @@ extern GraphicsInterface_struct GFXDummy;
void GPU_setVideoProp(GPU *, u32 p);
void GPU_setBGProp(GPU *, u16 num, u16 p);
void GPU_scrollX(GPU *, u8 num, u16 v);
void GPU_scrollY(GPU *, u8 num, u16 v);
void GPU_scrollXY(GPU *, u8 num, u32 v);
void GPU_setX(GPU *, u8 num, u32 v);
void GPU_setXH(GPU *, u8 num, u16 v);
void GPU_setXL(GPU *, u8 num, u16 v);
void GPU_setY(GPU *, u8 num, u32 v);
void GPU_setYH(GPU *, u8 num, u16 v);
void GPU_setYL(GPU *, u8 num, u16 v);
void GPU_setPA(GPU *, u8 num, u16 v);
void GPU_setPB(GPU *, u8 num, u16 v);
void GPU_setPC(GPU *, u8 num, u16 v);
void GPU_setPD(GPU *, u8 num, u16 v);
void GPU_scrollXY(GPU *, u8 num, u32 v);
void GPU_setX(GPU *, u8 num, u32 v);
void GPU_setY(GPU *, u8 num, u32 v);
void GPU_setPAPB(GPU *, u8 num, u32 v);
void GPU_setPCPD(GPU *, u8 num, u32 v);

1474
desmume/src/MMU.c
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File diff suppressed because it is too large Load Diff

17
desmume/src/gl_vertex.c
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@ -25,38 +25,41 @@
static u16 vx=0,vy=0,vz=0;
//#define print(a) printf a
#define print(a)
INLINE void gl_VTX_one() {
float vfx,vfy,vfz;
vfx = vx / 4096.;
vfy = vy / 4096.;
vfz = vz / 4096.;
printf ("\tVTX (x=%.12f,y=%.12f,z=%.12f)\n",vfx,vfy,vfz);
print(("\tVTX (x=%.12f,y=%.12f,z=%.12f)\n",vfx,vfy,vfz));
}
void gl_VTX_begin(u32 val) {
//see 4000500h - Cmd 40h - BEGIN_VTXS - Start of Vertex List (W)
vx=vy=vz=0;
printf ("VTX_begin : ");
print(("VTX_begin : "));
switch(val) {
case 0 : // separate triangles (3 vertices for each triangle)
printf ("GL_TRIANGLES\n");
print(("GL_TRIANGLES\n"));
break;
case 1 : // separate quads (4 vertices for each triangle)
printf ("GL_QUADS\n");
print(("GL_QUADS\n"));
break;
// strips : 1st triangle or quad defined by all vertices
// next ones share a segment (so 2 vertices less)
case 2 : // triangle strips (1st : 3, next : 1)
printf ("GL_TRIANGLE_STRIP\n");
print(("GL_TRIANGLE_STRIP\n"));
break;
case 3 : // quad strips (1st : 4, next : 2)
printf ("GL_QUAD_STRIP\n");
print(("GL_QUAD_STRIP\n"));
break;
}
}
void gl_VTX_end() {
//see 4000504h - Cmd 41h - END_VTXS - End of Vertex List (W)
printf ("VTX_end.\n");
print(("VTX_end.\n"));
}

139
desmume/src/registers.h
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@ -1,52 +1,66 @@
#ifndef REGISTERS_H
#define REGISTERS_H
// Display Engine A
#define REG_DISPA_DISPCNT 0x04000000
#define REG_REGION_MASK 0x0FFFEF80
#define REG_BASE_DISPx 0x04000000
#define REG_BASE_DISPA 0x04000000
#define REG_BASE_DISPB 0x04001000
#define REG_BASE_DMA 0x04000080
#define REG_BASE_SIORTCTIMERS 0x04000100
#define REG_BASE_ROMIPC 0x04000180
#define REG_BASE_MEMIRQ 0x04000200
#define REG_BASE_MATH 0x04000280
#define REG_BASE_OTHER 0x04000300
#define REG_BASE_RCVPORTS 0x04100000
#define REG_DISPB 0x00001000
// core A and B specific
#define REG_DISPx_DISPCNT 0x04000000
#define REG_DISPx_VCOUNT 0x04000006
#define REG_DISPx_BG0CNT 0x04000008
#define REG_DISPx_BG1CNT 0x0400000A
#define REG_DISPx_BG2CNT 0x0400000C
#define REG_DISPx_BG3CNT 0x0400000E
#define REG_DISPx_BG0HOFS 0x04000010
#define REG_DISPx_BG0VOFS 0x04000012
#define REG_DISPx_BG1HOFS 0x04000014
#define REG_DISPx_BG1VOFS 0x04000016
#define REG_DISPx_BG2HOFS 0x04000018
#define REG_DISPx_BG2VOFS 0x0400001A
#define REG_DISPx_BG3HOFS 0x0400001C
#define REG_DISPx_BG3VOFS 0x0400001E
#define REG_DISPx_BG2PA 0x04000020
#define REG_DISPx_BG2PB 0x04000022
#define REG_DISPx_BG2PC 0x04000024
#define REG_DISPx_BG2PD 0x04000026
#define REG_DISPx_BG2XL 0x04000028
#define REG_DISPx_BG2XH 0x0400002A
#define REG_DISPx_BG2YL 0x0400002C
#define REG_DISPx_BG2YH 0x0400002E
#define REG_DISPx_BG3PA 0x04000030
#define REG_DISPx_BG3PB 0x04000032
#define REG_DISPx_BG3PC 0x04000034
#define REG_DISPx_BG3PD 0x04000036
#define REG_DISPx_BG3XL 0x04000038
#define REG_DISPx_BG3XH 0x0400003A
#define REG_DISPx_BG3YL 0x0400003C
#define REG_DISPx_BG3YH 0x0400003E
#define REG_DISPx_WIN0H 0x04000040
#define REG_DISPx_WIN1H 0x04000042
#define REG_DISPx_WIN0V 0x04000044
#define REG_DISPx_WIN1V 0x04000046
#define REG_DISPx_WININ 0x04000048
#define REG_DISPx_WINOUT 0x0400004A
#define REG_DISPx_MOSAIC 0x0400004C
#define REG_DISPx_BLDCNT 0x04000050
#define REG_DISPx_BLDALPHA 0x04000052
#define REG_DISPx_BLDY 0x04000054
#define REG_DISPx_MASTERBRIGHT 0x0400006C
// core A specific
#define REG_DISPA_DISPSTAT 0x04000004
#define REG_DISPA_VCOUNT 0x04000006
#define REG_DISPA_BG0CNT 0x04000008
#define REG_DISPA_BG1CNT 0x0400000A
#define REG_DISPA_BG2CNT 0x0400000C
#define REG_DISPA_BG3CNT 0x0400000E
#define REG_DISPA_BG0HOFS 0x04000010
#define REG_DISPA_BG0VOFS 0x04000012
#define REG_DISPA_BG1HOFS 0x04000014
#define REG_DISPA_BG1VOFS 0x04000016
#define REG_DISPA_BG2HOFS 0x04000018
#define REG_DISPA_BG2VOFS 0x0400001A
#define REG_DISPA_BG3HOFS 0x0400001C
#define REG_DISPA_BG3VOFS 0x0400001E
#define REG_DISPA_BG2PA 0x04000020
#define REG_DISPA_BG2PB 0x04000022
#define REG_DISPA_BG2PC 0x04000024
#define REG_DISPA_BG2PD 0x04000026
#define REG_DISPA_BG2XL 0x04000028
#define REG_DISPA_BG2XH 0x0400002A
#define REG_DISPA_BG2YL 0x0400002C
#define REG_DISPA_BG2YH 0x0400002E
#define REG_DISPA_BG3PA 0x04000030
#define REG_DISPA_BG3PB 0x04000032
#define REG_DISPA_BG3PC 0x04000034
#define REG_DISPA_BG3PD 0x04000036
#define REG_DISPA_BG3XL 0x04000038
#define REG_DISPA_BG3XH 0x0400003A
#define REG_DISPA_BG3YL 0x0400003C
#define REG_DISPA_BG3YH 0x0400003E
#define REG_DISPA_WIN0H 0x04000040
#define REG_DISPA_WIN1H 0x04000042
#define REG_DISPA_WIN0V 0x04000044
#define REG_DISPA_WIN1V 0x04000046
#define REG_DISPA_WININ 0x04000048
#define REG_DISPA_WINOUT 0x0400004A
#define REG_DISPA_MOSAIC 0x0400004C
#define REG_DISPA_BLDCNT 0x04000050
#define REG_DISPA_BLDALPHA 0x04000052
#define REG_DISPA_BLDY 0x04000054
#define REG_DISPA_DISP3DCNT 0x04000060
#define REG_DISPA_DISPCAPCNT 0x04000064
#define REG_DISPA_DISPMMEMFIFO 0x04000068
#define REG_DISPA_MASTERBRIGHT 0x0400006C
// DMA
#define REG_DMA0SAD 0x040000B0
@ -142,47 +156,6 @@
#define REG_POWCNT2 0x04000304
#define REG_BIOSPROT 0x04000308
#define REG_DISPB_DISPCNT 0x04001000
#define REG_DISPB_BG0CNT 0x04001008
#define REG_DISPB_BG1CNT 0x0400100A
#define REG_DISPB_BG2CNT 0x0400100C
#define REG_DISPB_BG3CNT 0x0400100E
#define REG_DISPB_BG0HOFS 0x04001010
#define REG_DISPB_BG0VOFS 0x04001012
#define REG_DISPB_BG1HOFS 0x04001014
#define REG_DISPB_BG1VOFS 0x04001016
#define REG_DISPB_BG2HOFS 0x04001018
#define REG_DISPB_BG2VOFS 0x0400101A
#define REG_DISPB_BG3HOFS 0x0400101C
#define REG_DISPB_BG3VOFS 0x0400101E
#define REG_DISPB_BG2PA 0x04001020
#define REG_DISPB_BG2PB 0x04001022
#define REG_DISPB_BG2PC 0x04001024
#define REG_DISPB_BG2PD 0x04001026
#define REG_DISPB_BG2XL 0x04001028
#define REG_DISPB_BG2XH 0x0400102A
#define REG_DISPB_BG2YL 0x0400102C
#define REG_DISPB_BG2YH 0x0400102E
#define REG_DISPB_BG3PA 0x04001030
#define REG_DISPB_BG3PB 0x04001032
#define REG_DISPB_BG3PC 0x04001034
#define REG_DISPB_BG3PD 0x04001036
#define REG_DISPB_BG3XL 0x04001038
#define REG_DISPB_BG3XH 0x0400103A
#define REG_DISPB_BG3YL 0x0400103C
#define REG_DISPB_BG3YH 0x0400103E
#define REG_DISPB_WIN0H 0x04001040
#define REG_DISPB_WIN1H 0x04001042
#define REG_DISPB_WIN0V 0x04001044
#define REG_DISPB_WIN1V 0x04001046
#define REG_DISPB_WININ 0x04001048
#define REG_DISPB_WINOUT 0x0400104A
#define REG_DISPB_MOSAIC 0x0400104C
#define REG_DISPB_BLDCNT 0x04001050
#define REG_DISPB_BLDALPHA 0x04001052
#define REG_DISPB_BLDY 0x04001054
#define REG_DISPB_MASTERBRIGHT 0x0400106C
// Receive ports
#define REG_IPCFIFORECV 0x04100000
#define REG_GCDATAIN 0x04100010

4
desmume/src/saves.c
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@ -282,9 +282,9 @@ int savestate_load (const char *file_name) {
MMU_write16(ARMCPU_ARM9, 0x04000304, MMU_read16(ARMCPU_ARM9, 0x04000304));
// This should regenerate the graphics configuration
for (i = REG_DISPA_DISPCNT; i<=REG_DISPA_MASTERBRIGHT; i+=2)
for (i = REG_BASE_DISPA; i<=REG_BASE_DISPA + 0x7F; i+=2)
MMU_write16(ARMCPU_ARM9, i, MMU_read16(ARMCPU_ARM9, i));
for (i = REG_DISPB_DISPCNT; i<=REG_DISPB_MASTERBRIGHT; i+=2)
for (i = REG_BASE_DISPB; i<=REG_BASE_DISPB + 0x7F; i+=2)
MMU_write16(ARMCPU_ARM9, i, MMU_read16(ARMCPU_ARM9, i));
gzclose (file);