Riccardom patch:
armcpu.cpp: move some debug stuff under #if 0. Disassembler.cpp, Render3d.cpp: make some functions static (I didn't removed the #if'ed code... not sure what it was used for...)
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@ -3308,7 +3308,7 @@ static char * OP_BKPT(u32 adr, u32 i, char * txt)
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//----------------CDP-----------------------
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//----------------CDP-----------------------
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char * OP_CDP(u32 adr, u32 i, char * txt)
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static char * OP_CDP(u32 adr, u32 i, char * txt)
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{
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{
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sprintf(txt, "CDP-------------------------------");
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sprintf(txt, "CDP-------------------------------");
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return txt;
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return txt;
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@ -417,6 +417,7 @@ armcpu_prefetch()
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return MMU.MMU_WAIT16[PROCNUM][(armcpu->instruct_adr>>24)&0xF];
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return MMU.MMU_WAIT16[PROCNUM][(armcpu->instruct_adr>>24)&0xF];
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}
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}
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#if 0 /* not used */
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static BOOL FASTCALL test_EQ(Status_Reg CPSR) { return ( CPSR.bits.Z); }
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static BOOL FASTCALL test_EQ(Status_Reg CPSR) { return ( CPSR.bits.Z); }
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static BOOL FASTCALL test_NE(Status_Reg CPSR) { return (!CPSR.bits.Z); }
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static BOOL FASTCALL test_NE(Status_Reg CPSR) { return (!CPSR.bits.Z); }
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static BOOL FASTCALL test_CS(Status_Reg CPSR) { return ( CPSR.bits.C); }
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static BOOL FASTCALL test_CS(Status_Reg CPSR) { return ( CPSR.bits.C); }
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@ -445,6 +446,7 @@ static BOOL (FASTCALL* test_conditions[])(Status_Reg CPSR)= {
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};
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};
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#define TEST_COND2(cond, CPSR) \
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#define TEST_COND2(cond, CPSR) \
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(cond<15&&test_conditions[cond](CPSR))
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(cond<15&&test_conditions[cond](CPSR))
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#endif
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BOOL armcpu_irqExeption(armcpu_t *armcpu)
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BOOL armcpu_irqExeption(armcpu_t *armcpu)
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@ -20,9 +20,9 @@
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#include "render3D.h"
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#include "render3D.h"
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void NDS_nullFunc1 (void){}
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static void NDS_nullFunc1 (void){}
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char NDS_nullFunc2 (void){ return 1; }
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static char NDS_nullFunc2 (void){ return 1; }
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void NDS_nullFunc3 (int,unsigned short*) {}
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static void NDS_nullFunc3 (int,unsigned short*) {}
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GPU3DInterface gpu3DNull = {
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GPU3DInterface gpu3DNull = {
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NDS_nullFunc2, //NDS_3D_Init
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NDS_nullFunc2, //NDS_3D_Init
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