diff --git a/desmume/src/Disassembler.cpp b/desmume/src/Disassembler.cpp
index 3aacbf018..ceba6b095 100644
--- a/desmume/src/Disassembler.cpp
+++ b/desmume/src/Disassembler.cpp
@@ -3308,7 +3308,7 @@ static char * OP_BKPT(u32 adr, u32 i, char * txt)
 
 //----------------CDP-----------------------
 
-char *  OP_CDP(u32 adr, u32 i, char * txt)
+static char *  OP_CDP(u32 adr, u32 i, char * txt)
 {
      sprintf(txt, "CDP-------------------------------");
      return txt;
diff --git a/desmume/src/armcpu.cpp b/desmume/src/armcpu.cpp
index c6f8f9199..89b319c32 100644
--- a/desmume/src/armcpu.cpp
+++ b/desmume/src/armcpu.cpp
@@ -417,6 +417,7 @@ armcpu_prefetch()
 	return MMU.MMU_WAIT16[PROCNUM][(armcpu->instruct_adr>>24)&0xF];
 }
 
+#if 0 /* not used */
 static BOOL FASTCALL test_EQ(Status_Reg CPSR) { return ( CPSR.bits.Z); }
 static BOOL FASTCALL test_NE(Status_Reg CPSR) { return (!CPSR.bits.Z); }
 static BOOL FASTCALL test_CS(Status_Reg CPSR) { return ( CPSR.bits.C); }
@@ -445,6 +446,7 @@ static BOOL (FASTCALL* test_conditions[])(Status_Reg CPSR)= {
 };
 #define TEST_COND2(cond, CPSR) \
 	(cond<15&&test_conditions[cond](CPSR))
+#endif
 
 
 BOOL armcpu_irqExeption(armcpu_t *armcpu)
diff --git a/desmume/src/render3D.cpp b/desmume/src/render3D.cpp
index dcaa3a9f5..dc6324c48 100644
--- a/desmume/src/render3D.cpp
+++ b/desmume/src/render3D.cpp
@@ -20,9 +20,9 @@
 
 #include "render3D.h"
 
-void NDS_nullFunc1		(void){}
-char NDS_nullFunc2		(void){ return 1; }
-void NDS_nullFunc3		(int,unsigned short*) {}
+static void NDS_nullFunc1		(void){}
+static char NDS_nullFunc2		(void){ return 1; }
+static void NDS_nullFunc3		(int,unsigned short*) {}
 
 GPU3DInterface gpu3DNull = { 
 	NDS_nullFunc2, //NDS_3D_Init