mirror of https://github.com/bsnes-emu/bsnes.git
153 lines
4.2 KiB
C++
153 lines
4.2 KiB
C++
#pragma once
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//Zilog Z80
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namespace Processor {
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struct Z80 {
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struct Bus {
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virtual auto read(uint16 addr) -> uint8 = 0;
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virtual auto write(uint16 addr, uint8 data) -> void = 0;
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virtual auto in(uint8 addr) -> uint8 = 0;
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virtual auto out(uint8 addr, uint8 data) -> void = 0;
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};
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virtual auto step(uint clocks) -> void = 0;
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//z80.cpp
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auto power() -> void;
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auto reset() -> void;
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auto parity(uint8) const -> bool;
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//memory.cpp
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auto wait(uint clocks = 1) -> void;
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auto opcode() -> uint8;
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auto operand() -> uint8;
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auto operands() -> uint16;
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auto displace(uint16&) -> uint16;
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auto read(uint16 addr) -> uint8;
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auto write(uint16 addr, uint8 data) -> void;
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auto in(uint8 addr) -> uint8;
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auto out(uint8 addr, uint8 data) -> void;
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//instruction.cpp
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auto trap(uint8 prefix, uint8 code) -> void;
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auto instruction() -> void;
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auto instruction__(uint8 code) -> void;
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auto instructionCB(uint8 code) -> void;
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auto instructionED(uint8 code) -> void;
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//instructions.cpp
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auto ADD(uint8, uint8, bool = false) -> uint8;
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auto AND(uint8, uint8) -> uint8;
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auto OR (uint8, uint8) -> uint8;
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auto SUB(uint8, uint8, bool = false) -> uint8;
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auto XOR(uint8, uint8) -> uint8;
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auto instructionADC_a_irr(uint16&) -> void;
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auto instructionADC_a_r(uint8&) -> void;
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auto instructionADD_a_irr(uint16&) -> void;
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auto instructionADD_a_r(uint8&) -> void;
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auto instructionAND_a_irr(uint16&) -> void;
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auto instructionAND_a_r(uint8&) -> void;
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auto instructionCP_a_irr(uint16& x) -> void;
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auto instructionCP_a_n() -> void;
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auto instructionCP_a_r(uint8& x) -> void;
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auto instructionDI() -> void;
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auto instructionEI() -> void;
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auto instructionHALT() -> void;
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auto instructionIM_o(uint2) -> void;
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auto instructionIN_a_in() -> void;
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auto instructionJP_c_nn(bool) -> void;
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auto instructionJR_c_e(bool) -> void;
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auto instructionLD_inn_a() -> void;
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auto instructionLD_irr_n(uint16&) -> void;
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auto instructionLD_irr_r(uint16&, uint8&) -> void;
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auto instructionLD_r_n(uint8&) -> void;
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auto instructionLD_r_irr(uint8&, uint16&) -> void;
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auto instructionLD_r_r(uint8&, uint8&) -> void;
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auto instructionLD_rr_nn(uint16&) -> void;
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auto instructionNOP() -> void;
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auto instructionOR_a_irr(uint16&) -> void;
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auto instructionOR_a_r(uint8&) -> void;
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auto instructionSBC_a_irr(uint16&) -> void;
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auto instructionSBC_a_r(uint8&) -> void;
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auto instructionSUB_a_irr(uint16&) -> void;
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auto instructionSUB_a_r(uint8&) -> void;
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auto instructionXOR_a_irr(uint16&) -> void;
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auto instructionXOR_a_r(uint8&) -> void;
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//disassembler.cpp
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auto disassemble(uint16 pc) -> string;
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auto disassemble__(uint16 pc, uint8 prefix, uint8 code) -> string;
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auto disassembleCB(uint16 pc, uint8 prefix, uint8 code) -> string;
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auto disassembleED(uint16 pc, uint8 prefix, uint8 code) -> string;
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struct Registers {
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union {
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uint16_t af;
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struct { uint8_t order_msb2(a, f); };
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union {
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BooleanBitField<uint16_t, 0> c; //carry
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BooleanBitField<uint16_t, 1> n; //add / subtract
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BooleanBitField<uint16_t, 2> p; //parity
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BooleanBitField<uint16_t, 2> v; //overflow
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BooleanBitField<uint16_t, 3> x; //unused (copy of bit 3 of result)
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BooleanBitField<uint16_t, 4> h; //half-carry
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BooleanBitField<uint16_t, 5> y; //unused (copy of bit 5 of result)
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BooleanBitField<uint16_t, 6> z; //zero
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BooleanBitField<uint16_t, 7> s; //sign
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} p;
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};
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union {
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uint16_t bc;
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struct { uint8_t order_msb2(b, c); };
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};
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union {
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uint16_t de;
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struct { uint8_t order_msb2(d, e); };
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};
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union {
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uint16_t hl;
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struct { uint8_t order_msb2(h, l); };
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};
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union {
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uint16_t ix;
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struct { uint8_t order_msb2(ixh, ixl); };
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};
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union {
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uint16_t iy;
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struct { uint8_t order_msb2(iyh, iyl); };
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};
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union {
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uint16_t ir;
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struct { uint8_t order_msb2(i, r); };
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};
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uint16_t sp;
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uint16_t pc;
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boolean halt; //HALT instruction executed
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boolean iff1; //interrupt flip-flop 1
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boolean iff2; //interrupt flip-flop 2
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uint2 im; //interrupt mode (0-2)
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uint8 prefix;
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uint8 flag;
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} r;
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Bus* bus = nullptr;
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private:
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uint64 instructionsExecuted = 0;
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};
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}
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