bsnes/higan/processor
Tim Allen 2fbbccf985 Update to v101r16 release.
byuu says:

Changelog:

  - Z80: implemented 113 new instructions (all the easy
    LD/ADC/ADD/AND/OR/SBC/SUB/XOR ones)
  - Z80: used alternative to castable<To, With> type (manual cast inside
    instruction() register macros)
  - Z80: debugger: used register macros to reduce typing and increase
    readability
  - Z80: debugger: smarter way of handling multiple DD/FD prefixes
    (using gotos, yay!)
  - ruby: fixed crash with Windows input driver on exit (from SuperMikeMan)

I have no idea how the P/V flag is supposed to work on AND/OR/XOR, so
that's probably wrong for now. HALT is also mostly a dummy function for
now. But I typically implement those inside instruction(), so it
probably won't need to be changed? We'll see.
2016-09-06 10:09:33 +10:00
..
arm Update to v099r13 release. 2016-06-29 21:10:28 +10:00
gsu Update to v099r12 release. 2016-06-28 20:43:47 +10:00
hg51b Update to v098r06 release. 2016-04-22 23:35:51 +10:00
lr35902 Update to v098r17 release. 2016-06-06 08:10:01 +10:00
m68k Update to v101r15 release. 2016-09-04 23:51:27 +10:00
r6502 Update to v099r12 release. 2016-06-28 20:43:47 +10:00
r65816 Update to v100r07 release. 2016-07-17 13:24:28 +10:00
spc700 Update to v100r15 release. 2016-07-31 12:11:20 +10:00
upd96050 Update to v099r12 release. 2016-06-28 20:43:47 +10:00
v30mz Update to v100r01 release. 2016-07-08 22:31:35 +10:00
z80 Update to v101r16 release. 2016-09-06 10:09:33 +10:00
GNUmakefile Update to v100r03 release. 2016-07-10 15:28:26 +10:00
processor.hpp Update to v097r01 release. 2016-01-23 18:29:34 +11:00