Lior Halphon
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f1ec42d4ba
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H/GDMA was 4 times faster than it should have been. Made it also more accurate. Fixes #56
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2018-04-13 14:41:39 +03:00 |
Lior Halphon
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a9fbbd3894
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Merge branch 'master' of https://github.com/LIJI32/SameBoy
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2018-03-29 21:07:04 +03:00 |
Lior Halphon
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e380a00b67
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Fixed another timing regression with the CB opcodes
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2018-03-29 21:06:53 +03:00 |
Kyle Swanson
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7ffe132e79
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fix typo
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2018-03-28 21:38:48 -07:00 |
Lior Halphon
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f5493e023d
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Fixed a timing regression in the CB opcodes
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2018-03-27 20:21:24 +03:00 |
Lior Halphon
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7543461c24
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Increasing PC in OAM triggers the OAM bug
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2018-03-27 16:36:39 +03:00 |
Lior Halphon
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4986930511
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Mostly complete emulation of the OAM bug. Passes oam_bug-2.
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2018-03-27 15:46:00 +03:00 |
Lior Halphon
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9093f22293
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More accurate emulation of the OAM bug
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2018-03-24 14:46:51 +03:00 |
Lior Halphon
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d343152fca
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Basic emulation of the OAM bug
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2018-03-24 00:32:19 +03:00 |
Lior Halphon
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3e5e17d1a3
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Fixed CB [hl] opcodes timings
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2018-03-23 12:35:37 +03:00 |
Lior Halphon
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3883b7d86a
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Merge branch 'master' into timing
# Conflicts:
# Core/display.c
# Core/z80_cpu.c
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2018-03-19 23:46:33 +02:00 |
Lior Halphon
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b50c97f4a7
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Prevent starting HDMA in the middle of an instruction, making both the CPU and DMA access memory at the same time. Closes #47
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2018-03-19 20:01:31 +02:00 |
Lior Halphon
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0dc30f081a
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CGB halt interrupt timing
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2018-03-17 23:21:14 +02:00 |
Lior Halphon
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544ca2be4c
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Changing the timings of memory writes so they’re not effectively one T-cycle late. This screws up APU’s cycle accuracy for now.
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2018-03-05 21:17:37 +02:00 |
Lior Halphon
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b702d56547
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Merge branch 'master' into timing
# Conflicts:
# Core/display.c
# Core/z80_cpu.c
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2018-03-01 21:22:33 +02:00 |
Lior Halphon
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90a943d05a
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Emulate an HDMA quirk required to properly emulate Aevilia
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2018-02-25 22:32:41 +02:00 |
Lior Halphon
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ef670986c6
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Rewrote PPU (currently only emulates DMG correctly) to use the new timing mechanism. Removed “future interrupts” (No longer required because SameBoy is now T-cycle based)
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2018-02-25 00:48:45 +02:00 |
Lior Halphon
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42ab746a66
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Starting to remove the delayed interrupts hack – done for timer interrupt, broken for display interrupts
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2018-02-23 15:33:44 +02:00 |
Lior Halphon
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5974092c94
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Bugfix
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2018-02-20 23:04:35 +02:00 |
Lior Halphon
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19c382c9e0
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Fixed ei_sequence test
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2017-12-03 21:07:34 +02:00 |
Lior Halphon
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be038dc8e7
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Refinement to the last fix
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2017-09-20 03:08:54 +03:00 |
Lior Halphon
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57e7782ac4
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Interrupt servicing is now more accurate. Fixes mooneye-gb’s ie_push (all models) and Pinball Deluxe (!!!) for CGB mode
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2017-09-20 02:49:45 +03:00 |
Lior Halphon
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14f267b4fa
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Another whoops
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2017-09-09 19:31:05 +03:00 |
Lior Halphon
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1e90400916
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Reimplemented delayed/future interrupts, currently correct only for CGB.
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2017-09-09 13:32:12 +03:00 |
Lior Halphon
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0f643e01b7
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Removing the delayed interrupt mechanism, research is not complete enough for implementation
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2017-09-08 12:58:35 +03:00 |
Lior Halphon
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54eb51d8db
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Refined timer interrupt timing
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2017-09-02 22:08:20 +03:00 |
nattthebear
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eb7492c6c6
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Fix undefined behavior (sequence point modification). GCC 4.6.4 compiles the code incorrectly without this fix.
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2017-07-16 21:08:07 -04:00 |
Lior Halphon
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a925ef130d
|
Stabilizing API: New joypad, debugger and reset APIs; internal APIs and direct struct access are no longer available without defining GB_INTERNAL. The SDL port uses the new “public” APIs, as well as most of the non-debug Cocoa code.
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2017-04-17 20:16:17 +03:00 |
Lior Halphon
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399e88d5fe
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STAT timing and LCD interrupts rewritten, should be more accurate.
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2017-02-19 02:22:50 +02:00 |
Lior Halphon
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74d00b84b7
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Treat STOP as a 2-byte instruction
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2017-02-17 00:21:02 +02:00 |
Lior Halphon
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3fbc2c5716
|
DI should not be delayed.
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2017-02-15 19:04:53 +02:00 |
Lior Halphon
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2d51d13479
|
Various optimizations
|
2016-10-22 02:18:29 +03:00 |
Lior Halphon
|
0991705379
|
Refined HALT bug behavior, fixed Robocop
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2016-09-22 01:51:09 +03:00 |
Lior Halphon
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6f2b36cacb
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The HALT bug also happens on CGBs, regardless of DMG mode.
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2016-09-20 22:59:25 +03:00 |
Lior Halphon
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f049284324
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Emulate the HALT bug on a DMG
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2016-09-20 01:22:21 +03:00 |
Lior Halphon
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1a3a96762b
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CPU cleanup
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2016-09-18 23:50:04 +03:00 |
Lior Halphon
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f4c5cf20bc
|
Cleanup of ret_cc
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2016-09-16 13:27:32 +03:00 |
Lior Halphon
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43be91f032
|
Slightly more readable code.
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2016-09-13 01:20:18 +03:00 |
Lior Halphon
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a746c726ee
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Added basic automatic ROM tester
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2016-09-03 03:39:32 +03:00 |
Lior Halphon
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806d0775a4
|
Added backtrace command to debugger
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2016-08-09 22:48:53 +03:00 |
Lior Halphon
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e95d2c4abe
|
Fixed DI instruction on CGB
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2016-08-06 17:16:38 +03:00 |
Lior Halphon
|
4a50000e83
|
Corrected timing for many instructions
|
2016-08-06 14:00:35 +03:00 |
Lior Halphon
|
d098458ee4
|
Major improvements to accuracy: Fixed instruction timing, DMA timing, and IO reg masking. Passes most of mooneye-gb acceptance tests.
|
2016-08-05 16:36:38 +03:00 |
Lior Halphon
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aa6438fa06
|
Async debugger commands
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2016-07-18 00:46:45 +03:00 |
Lior Halphon
|
70bd90740a
|
Mass name and type changes. Save states are now compatible between 32- and 64-bit systems. Maybe.
|
2016-06-18 20:29:11 +03:00 |
Lior Halphon
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e6c4b4d1b2
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Seems like I forgot to finish implementing the stop instruction!
|
2016-06-14 14:12:13 +03:00 |
Lior Halphon
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71ef40f4b6
|
"Standardized" the finish/next call depth as debugger "hooks"
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2016-04-10 22:36:54 +03:00 |
Lior Halphon
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bf6dff30cb
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Corrected debugger's finish behavior's on interrupt handlers
|
2016-04-10 20:58:14 +03:00 |
Lior Halphon
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f1e9623371
|
Initial public commit
|
2016-04-01 21:27:01 +03:00 |