2010-08-09 13:28:56 +00:00
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#ifdef SUPERFX_CPP
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2012-04-29 06:16:44 +00:00
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void SuperFX::step(unsigned clocks) {
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2010-08-09 13:28:56 +00:00
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if(regs.romcl) {
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regs.romcl -= min(clocks, regs.romcl);
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if(regs.romcl == 0) {
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regs.sfr.r = 0;
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2011-01-16 13:17:45 +00:00
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regs.romdr = bus_read((regs.rombr << 16) + regs.r[14]);
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2010-08-09 13:28:56 +00:00
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}
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}
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if(regs.ramcl) {
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regs.ramcl -= min(clocks, regs.ramcl);
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if(regs.ramcl == 0) {
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2011-01-16 13:17:45 +00:00
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bus_write(0x700000 + (regs.rambr << 16) + regs.ramar, regs.ramdr);
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2010-08-09 13:28:56 +00:00
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}
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}
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2012-04-29 06:16:44 +00:00
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Coprocessor::step(clocks);
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2010-08-09 13:28:56 +00:00
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synchronize_cpu();
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}
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void SuperFX::rombuffer_sync() {
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2012-04-29 06:16:44 +00:00
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if(regs.romcl) step(regs.romcl);
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2010-08-09 13:28:56 +00:00
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}
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void SuperFX::rombuffer_update() {
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regs.sfr.r = 1;
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regs.romcl = memory_access_speed;
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}
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uint8 SuperFX::rombuffer_read() {
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rombuffer_sync();
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return regs.romdr;
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}
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void SuperFX::rambuffer_sync() {
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2012-04-29 06:16:44 +00:00
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if(regs.ramcl) step(regs.ramcl);
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2010-08-09 13:28:56 +00:00
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}
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uint8 SuperFX::rambuffer_read(uint16 addr) {
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rambuffer_sync();
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2011-01-16 13:17:45 +00:00
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return bus_read(0x700000 + (regs.rambr << 16) + addr);
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2010-08-09 13:28:56 +00:00
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}
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void SuperFX::rambuffer_write(uint16 addr, uint8 data) {
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rambuffer_sync();
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regs.ramcl = memory_access_speed;
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regs.ramar = addr;
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regs.ramdr = data;
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}
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void SuperFX::r14_modify(uint16 data) {
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regs.r[14].data = data;
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rombuffer_update();
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}
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void SuperFX::r15_modify(uint16 data) {
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regs.r[15].data = data;
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r15_modified = true;
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}
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void SuperFX::update_speed() {
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//force SuperFX1 mode?
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if(clockmode == 1) {
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cache_access_speed = 2;
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memory_access_speed = 6;
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return;
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}
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//force SuperFX2 mode?
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if(clockmode == 2) {
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cache_access_speed = 1;
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memory_access_speed = 5;
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regs.cfgr.ms0 = 0; //cannot use high-speed multiplication in 21MHz mode
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return;
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}
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//default: allow S-CPU to select mode
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cache_access_speed = (regs.clsr ? 1 : 2);
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memory_access_speed = (regs.clsr ? 5 : 6);
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if(regs.clsr) regs.cfgr.ms0 = 0; //cannot use high-speed multiplication in 21MHz mode
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}
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void SuperFX::timing_reset() {
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update_speed();
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r15_modified = false;
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regs.romcl = 0;
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regs.romdr = 0;
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regs.ramcl = 0;
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regs.ramar = 0;
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regs.ramdr = 0;
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}
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#endif
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