Update to v088r07 release.

byuu says:

(r05 and r06 were save points between large core modifications)

I would really appreciate extensive regression testing (especially
around SuperFX, Cx4, ST018, DSP-n, ST-01n, NES, GB) at this point.
The most critical core changes should be completed now. And it was an
unbelievable amount of restructuring.

Changelog:
- SuperFX core moved to Processor::GSU
- SNES::CPU core moved to Processor::R65816
- SNES::SMP core moved to Processor::SPC700
- NES::CPU core renamed to Processor::R6502
- use filestream to load RAM files from interface
- save states store SHA256 instead of CRC32 (CRC32 usage removed
  entirely from bsnes)
- nes/ -> fc/ and NES -> FC
- snes/ -> sfc/ and SNES -> SFC
- SuperFamicom::MappedRAM::copy uses stream instead of data+size
- Linux port uses gcc-4.7 (still using only gcc-4.6 subset, so you can
  make a gcc-4.6 symlink for now if you like.)
- all profiles and all targets compile and work properly

All eight instruction set cores have been moved to processor/ now.
Consistency's a wonderful thing.
The last remnants of NES/SNES are now limited to target-ui code; and the
nall/(system) folder names.
I'm building with gcc-4.7 on my Linux box now because the resultant
binaries are up to 20% faster (seriously) than gcc-4.6.

bsnes/Makefile

@@ -1,9 +1,9 @@
 include nall/Makefile
 
-nes  := nes
-snes := snes
-gb   := gb
-gba  := gba
+fc  := fc
+sfc := sfc
+gb  := gb
+gba := gba
 
 profile := accuracy
 target  := ui

bsnes/base/base.hpp

@@ -1,7 +1,7 @@
 #ifndef BASE_HPP
 #define BASE_HPP
 
-static const char Version[] = "088.04";
+static const char Version[] = "088.07";
 
 #include <nall/platform.hpp>
 #include <nall/algorithm.hpp>
@@ -14,6 +14,7 @@ static const char Version[] = "088.04";
 #include <nall/property.hpp>
 #include <nall/random.hpp>
 #include <nall/serializer.hpp>
+#include <nall/sha256.hpp>
 #include <nall/stdint.hpp>
 #include <nall/string.hpp>
 #include <nall/utility.hpp>

bsnes/fc/Makefile

@@ -0,0 +1,16 @@
+fc_objects := fc-interface fc-system fc-scheduler fc-input
+fc_objects += fc-memory fc-cartridge fc-cpu fc-apu fc-ppu
+fc_objects += fc-cheat fc-video
+objects += $(fc_objects)
+
+obj/fc-interface.o: $(fc)/interface/interface.cpp $(call rwildcard,$(fc)/interface/)
+obj/fc-system.o: $(fc)/system/system.cpp $(call rwildcard,$(fc)/system/)
+obj/fc-scheduler.o: $(fc)/scheduler/scheduler.cpp $(call rwildcard,$(fc)/scheduler/)
+obj/fc-input.o: $(fc)/input/input.cpp $(call rwildcard,$(fc)/input/)
+obj/fc-memory.o: $(fc)/memory/memory.cpp $(call rwildcard,$(fc)/memory/)
+obj/fc-cartridge.o: $(fc)/cartridge/cartridge.cpp $(call rwildcard,$(fc)/cartridge/)
+obj/fc-cpu.o: $(fc)/cpu/cpu.cpp $(call rwildcard,$(fc)/cpu/)
+obj/fc-apu.o: $(fc)/apu/apu.cpp $(call rwildcard,$(fc)/apu/)
+obj/fc-ppu.o: $(fc)/ppu/ppu.cpp $(call rwildcard,$(fc)/ppu/)
+obj/fc-cheat.o: $(fc)/cheat/cheat.cpp $(call rwildcard,$(fc)/cheat/)
+obj/fc-video.o: $(fc)/video/video.cpp $(call rwildcard,$(fc)/video/)

bsnes/fc/apu/apu.cpp

@@ -1,4 +1,4 @@
-#include <nes/nes.hpp>
+#include <fc/fc.hpp>
 
 namespace Famicom {
 

bsnes/fc/cartridge/cartridge.cpp

@@ -1,4 +1,4 @@
-#include <nes/nes.hpp>
+#include <fc/fc.hpp>
 
 namespace Famicom {
 

bsnes/fc/cheat/cheat.cpp

@@ -1,4 +1,4 @@
-#include <nes/nes.hpp>
+#include <fc/fc.hpp>
 
 namespace Famicom {
 

bsnes/fc/cpu/cpu.cpp

@@ -1,4 +1,4 @@
-#include <nes/nes.hpp>
+#include <fc/fc.hpp>
 
 namespace Famicom {
 
@@ -37,7 +37,7 @@ void CPU::add_clocks(unsigned clocks) {
 }
 
 void CPU::power() {
-  RP2A03::power();
+  R6502::power();
 
   for(unsigned addr = 0; addr < 0x0800; addr++) ram[addr] = 0xff;
   ram[0x0008] = 0xf7;
@@ -47,7 +47,7 @@ void CPU::power() {
 }
 
 void CPU::reset() {
-  RP2A03::reset();
+  R6502::reset();
   create(CPU::Enter, 21477272);
 
   regs.pc  = bus.read(0xfffc) << 0;

bsnes/fc/cpu/cpu.hpp

@@ -1,4 +1,4 @@
-struct CPU : Processor::RP2A03, Thread {
+struct CPU : Processor::R6502, Thread {
   uint8 ram[0x0800];
 
   struct Status {

bsnes/fc/cpu/serialization.cpp

@@ -1,5 +1,5 @@
 void CPU::serialize(serializer &s) {
-  RP2A03::serialize(s);
+  R6502::serialize(s);
   Thread::serialize(s);
 
   s.array(ram);

bsnes/fc/fc.hpp

@@ -1,13 +1,13 @@
-#ifndef NES_HPP
-#define NES_HPP
+#ifndef FC_HPP
+#define FC_HPP
 
 #include <base/base.hpp>
-#include <processor/rp2a03/rp2a03.hpp>
+#include <processor/r6502/r6502.hpp>
 
 namespace Famicom {
   namespace Info {
     static const char Name[] = "bnes";
-    static const unsigned SerializerVersion = 1;
+    static const unsigned SerializerVersion = 2;
   }
 }
 
@@ -46,17 +46,17 @@ namespace Famicom {
     }
   };
 
-  #include <nes/system/system.hpp>
-  #include <nes/scheduler/scheduler.hpp>
-  #include <nes/input/input.hpp>
-  #include <nes/memory/memory.hpp>
-  #include <nes/cartridge/cartridge.hpp>
-  #include <nes/cpu/cpu.hpp>
-  #include <nes/apu/apu.hpp>
-  #include <nes/ppu/ppu.hpp>
-  #include <nes/cheat/cheat.hpp>
-  #include <nes/video/video.hpp>
-  #include <nes/interface/interface.hpp>
+  #include <fc/system/system.hpp>
+  #include <fc/scheduler/scheduler.hpp>
+  #include <fc/input/input.hpp>
+  #include <fc/memory/memory.hpp>
+  #include <fc/cartridge/cartridge.hpp>
+  #include <fc/cpu/cpu.hpp>
+  #include <fc/apu/apu.hpp>
+  #include <fc/ppu/ppu.hpp>
+  #include <fc/cheat/cheat.hpp>
+  #include <fc/video/video.hpp>
+  #include <fc/interface/interface.hpp>
 }
 
 #endif

bsnes/fc/input/input.cpp

@@ -1,4 +1,4 @@
-#include <nes/nes.hpp>
+#include <fc/fc.hpp>
 
 namespace Famicom {
 

bsnes/fc/interface/interface.cpp

@@ -1,4 +1,4 @@
-#include <nes/nes.hpp>
+#include <fc/fc.hpp>
 
 namespace Famicom {
 

bsnes/fc/memory/memory.cpp

@@ -1,4 +1,4 @@
-#include <nes/nes.hpp>
+#include <fc/fc.hpp>
 
 namespace Famicom {
 

bsnes/fc/ppu/ppu.cpp

@@ -1,4 +1,4 @@
-#include <nes/nes.hpp>
+#include <fc/fc.hpp>
 
 namespace Famicom {
 

bsnes/fc/scheduler/scheduler.cpp

@@ -1,4 +1,4 @@
-#include <nes/nes.hpp>
+#include <fc/fc.hpp>
 
 namespace Famicom {
 

bsnes/fc/system/serialization.cpp

@@ -1,13 +1,14 @@
 serializer System::serialize() {
   serializer s(serialize_size);
 
-  unsigned signature = 0x31545342, version = Info::SerializerVersion, crc32 = 0;
-  char description[512];
+  unsigned signature = 0x31545342, version = Info::SerializerVersion;
+  char hash[64], description[512];
+  memcpy(&hash, (const char*)cartridge.sha256(), 64);
   memset(&description, 0, sizeof description);
 
   s.integer(signature);
   s.integer(version);
-  s.integer(crc32);
+  s.array(hash);
   s.array(description);
 
   serialize_all(s);
@@ -15,17 +16,16 @@ serializer System::serialize() {
 }
 
 bool System::unserialize(serializer &s) {
-  unsigned signature, version, crc32;
-  char description[512];
+  unsigned signature, version;
+  char hash[64], description[512];
 
   s.integer(signature);
   s.integer(version);
-  s.integer(crc32);
+  s.array(hash);
   s.array(description);
 
   if(signature != 0x31545342) return false;
   if(version != Info::SerializerVersion) return false;
-//if(crc32 != 0) return false;
 
   power();
   serialize_all(s);
@@ -47,12 +47,12 @@ void System::serialize_all(serializer &s) {
 void System::serialize_init() {
   serializer s;
 
-  unsigned signature = 0, version = 0, crc32 = 0;
-  char description[512];
+  unsigned signature = 0, version = 0;
+  char hash[64], description[512];
 
   s.integer(signature);
   s.integer(version);
-  s.integer(crc32);
+  s.array(hash);
   s.array(description);
 
   serialize_all(s);

bsnes/fc/system/system.cpp

@@ -1,4 +1,4 @@
-#include <nes/nes.hpp>
+#include <fc/fc.hpp>
 
 namespace Famicom {
 

bsnes/fc/video/video.cpp

@@ -1,4 +1,4 @@
-#include <nes/nes.hpp>
+#include <fc/fc.hpp>
 
 #define VIDEO_CPP
 namespace Famicom {

bsnes/gb/system/serialization.cpp

@@ -3,13 +3,14 @@
 serializer System::serialize() {
   serializer s(serialize_size);
 
-  unsigned signature = 0x31545342, version = Info::SerializerVersion, crc32 = 0;
-  char description[512];
+  unsigned signature = 0x31545342, version = Info::SerializerVersion;
+  char hash[64], description[512];
+  memcpy(&hash, (const char*)cartridge.sha256(), 64);
   memset(&description, 0, sizeof description);
 
   s.integer(signature);
   s.integer(version);
-  s.integer(crc32);
+  s.array(hash);
   s.array(description);
 
   serialize_all(s);
@@ -17,17 +18,16 @@ serializer System::serialize() {
 }
 
 bool System::unserialize(serializer &s) {
-  unsigned signature, version, crc32;
-  char description[512];
+  unsigned signature, version;
+  char hash[64], description[512];
 
   s.integer(signature);
   s.integer(version);
-  s.integer(crc32);
+  s.array(hash);
   s.array(description);
 
   if(signature != 0x31545342) return false;
   if(version != Info::SerializerVersion) return false;
-//if(crc32 != 0) return false;
 
   power();
   serialize_all(s);
@@ -50,11 +50,11 @@ void System::serialize_init() {
   serializer s;
 
   unsigned signature = 0, version = 0, crc32 = 0;
-  char description[512];
+  char hash[64], description[512];
 
   s.integer(signature);
   s.integer(version);
-  s.integer(crc32);
+  s.array(hash);
   s.array(description);
 
   serialize_all(s);

bsnes/gba/cartridge/cartridge.cpp

@@ -100,18 +100,42 @@ void Cartridge::write(uint8 *data, uint32 addr, uint32 size, uint32 word) {
   }
 }
 
+#define RAM_ANALYZE
+
 uint32 Cartridge::read(uint32 addr, uint32 size) {
+  #ifdef RAM_ANALYZE
+  if((addr & 0x0e000000) == 0x0e000000) {
+    static bool once = true;
+    if(once) once = false, print("* SRAM/FlashROM read detected\n");
+  }
+  #endif
+
   if(has_sram     && (addr & 0x0e000000 ) == 0x0e000000 ) return read(ram.data, addr & ram.mask, size);
   if(has_eeprom   && (addr & eeprom.mask) == eeprom.test) return eeprom.read();
-  if(has_flashrom && (addr & 0x0f000000 ) == 0x0e000000 ) return flashrom.read(addr);
+  if(has_flashrom && (addr & 0x0e000000 ) == 0x0e000000 ) return flashrom.read(addr);
   if(addr < 0x0e000000) return read(rom.data, addr & 0x01ffffff, size);
   return cpu.pipeline.fetch.instruction;
 }
 
 void Cartridge::write(uint32 addr, uint32 size, uint32 word) {
+  #ifdef RAM_ANALYZE
+  if((addr & 0x0e000000) == 0x0e000000) {
+    static bool once = true;
+    if(once) once = false, print("* SRAM/FlashROM write detected\n");
+  }
+  if((addr & 0x0f000000) == 0x0d000000) {
+    static bool once = true;
+    if(once) once = false, print("* EEPROM write detected\n");
+  }
+  if((addr & 0x0e00ffff) == 0x0e005555 && (word & 0xff) == 0xaa) {
+    static bool once = true;
+    if(once) once = false, print("* FlashROM write detected\n");
+  }
+  #endif
+
   if(has_sram     && (addr & 0x0e000000 ) == 0x0e000000 ) return write(ram.data, addr & ram.mask, size, word);
   if(has_eeprom   && (addr & eeprom.mask) == eeprom.test) return eeprom.write(word & 1);
-  if(has_flashrom && (addr & 0x0f000000 ) == 0x0e000000 ) return flashrom.write(addr, word);
+  if(has_flashrom && (addr & 0x0e000000 ) == 0x0e000000 ) return flashrom.write(addr, word);
 }
 
 Cartridge::Cartridge() {

bsnes/gba/gba.hpp

@@ -7,7 +7,7 @@
 namespace GameBoyAdvance {
   namespace Info {
     static const char Name[] = "bgba";
-    static const unsigned SerializerVersion = 1;
+    static const unsigned SerializerVersion = 2;
   }
 }
 

bsnes/gba/system/serialization.cpp

@@ -1,13 +1,14 @@
 serializer System::serialize() {
   serializer s(serialize_size);
 
-  unsigned signature = 0x31545342, version = Info::SerializerVersion, crc32 = 0;
-  char description[512];
+  unsigned signature = 0x31545342, version = Info::SerializerVersion;
+  char hash[64], description[512];
+  memcpy(&hash, (const char*)cartridge.sha256(), 64);
   memset(&description, 0, sizeof description);
 
   s.integer(signature);
   s.integer(version);
-  s.integer(crc32);
+  s.array(hash);
   s.array(description);
 
   serialize_all(s);
@@ -15,17 +16,16 @@ serializer System::serialize() {
 }
 
 bool System::unserialize(serializer &s) {
-  unsigned signature, version, crc32;
-  char description[512];
+  unsigned signature, version;
+  char hash[64], description[512];
 
   s.integer(signature);
   s.integer(version);
-  s.integer(crc32);
+  s.array(hash);
   s.array(description);
 
   if(signature != 0x31545342) return false;
   if(version != Info::SerializerVersion) return false;
-//if(crc32 != 0) return false;
 
   power();
   serialize_all(s);
@@ -49,12 +49,12 @@ void System::serialize_all(serializer &s) {
 void System::serialize_init() {
   serializer s;
 
-  unsigned signature = 0, version = 0, crc32 = 0;
-  char description[512];
+  unsigned signature = 0, version = 0;
+  char hash[64], description[512];
 
   s.integer(signature);
   s.integer(version);
-  s.integer(crc32);
+  s.array(hash);
   s.array(description);
 
   serialize_all(s);

bsnes/nall/Makefile

@@ -35,9 +35,9 @@ ifeq ($(compiler),)
   ifeq ($(platform),win)
     compiler := gcc
   else ifeq ($(platform),osx)
-    compiler := gcc-mp-4.6
+    compiler := gcc-mp-4.7
   else
-    compiler := gcc-4.6
+    compiler := gcc-4.7
   endif
 endif
 

bsnes/nall/stream/file.hpp

@@ -6,6 +6,9 @@
 namespace nall {
 
 struct filestream : stream {
+  using stream::read;
+  using stream::write;
+
   bool seekable() const { return true; }
   bool readable() const { return true; }
   bool writable() const { return pwritable; }

bsnes/nall/stream/gzip.hpp

@@ -6,6 +6,9 @@
 namespace nall {
 
 struct gzipstream : memorystream {
+  using stream::read;
+  using stream::write;
+
   gzipstream(const stream &stream) {
     unsigned size = stream.size();
     uint8_t *data = new uint8_t[size];

bsnes/nall/stream/http.hpp

@@ -6,6 +6,9 @@
 namespace nall {
 
 struct httpstream : stream {
+  using stream::read;
+  using stream::write;
+
   bool seekable() const { return true; }
   bool readable() const { return true; }
   bool writable() const { return true; }

bsnes/nall/stream/memory.hpp

@@ -6,6 +6,9 @@
 namespace nall {
 
 struct memorystream : stream {
+  using stream::read;
+  using stream::write;
+
   bool seekable() const { return true; }
   bool readable() const { return true; }
   bool writable() const { return pwritable; }

bsnes/nall/stream/mmap.hpp

@@ -6,6 +6,9 @@
 namespace nall {
 
 struct mmapstream : stream {
+  using stream::read;
+  using stream::write;
+
   bool seekable() const { return true; }
   bool readable() const { return true; }
   bool writable() const { return pwritable; }

bsnes/nall/stream/stream.hpp

@@ -44,7 +44,7 @@ struct stream {
     return data;
   }
 
-  virtual void read(uint8_t *data, unsigned length) const {
+  void read(uint8_t *data, unsigned length) const {
     while(length--) *data++ = read();
   }
 

bsnes/nall/stream/vector.hpp

@@ -7,6 +7,9 @@
 namespace nall {
 
 struct vectorstream : stream {
+  using stream::read;
+  using stream::write;
+
   bool seekable() const { return true; }
   bool readable() const { return true; }
   bool writable() const { return pwritable; }

bsnes/nall/stream/zip.hpp

@@ -6,6 +6,9 @@
 namespace nall {
 
 struct zipstream : memorystream {
+  using stream::read;
+  using stream::write;
+
   zipstream(const stream &stream, const string &filter = "*") {
     unsigned size = stream.size();
     uint8_t *data = new uint8_t[size];

bsnes/nes/Makefile

@@ -1,16 +0,0 @@
-nes_objects := nes-interface nes-system nes-scheduler nes-input
-nes_objects += nes-memory nes-cartridge nes-cpu nes-apu nes-ppu
-nes_objects += nes-cheat nes-video
-objects += $(nes_objects)
-
-obj/nes-interface.o: $(nes)/interface/interface.cpp $(call rwildcard,$(nes)/interface/)
-obj/nes-system.o: $(nes)/system/system.cpp $(call rwildcard,$(nes)/system/)
-obj/nes-scheduler.o: $(nes)/scheduler/scheduler.cpp $(call rwildcard,$(nes)/scheduler/)
-obj/nes-input.o: $(nes)/input/input.cpp $(call rwildcard,$(nes)/input/)
-obj/nes-memory.o: $(nes)/memory/memory.cpp $(call rwildcard,$(nes)/memory/)
-obj/nes-cartridge.o: $(nes)/cartridge/cartridge.cpp $(call rwildcard,$(nes)/cartridge/)
-obj/nes-cpu.o: $(nes)/cpu/cpu.cpp $(call rwildcard,$(nes)/cpu/)
-obj/nes-apu.o: $(nes)/apu/apu.cpp $(call rwildcard,$(nes)/apu/)
-obj/nes-ppu.o: $(nes)/ppu/ppu.cpp $(call rwildcard,$(nes)/ppu/)
-obj/nes-cheat.o: $(nes)/cheat/cheat.cpp $(call rwildcard,$(nes)/cheat/)
-obj/nes-video.o: $(nes)/video/video.cpp $(call rwildcard,$(nes)/video/)

bsnes/processor/Makefile

@@ -1,14 +1,20 @@
 processor_objects :=
 processor_objects += $(if $(findstring arm,$(processors)),processor-arm)
+processor_objects += $(if $(findstring gsu,$(processors)),processor-gsu)
 processor_objects += $(if $(findstring hg51b,$(processors)),processor-hg51b)
 processor_objects += $(if $(findstring lr35902,$(processors)),processor-lr35902)
-processor_objects += $(if $(findstring rp2a03,$(processors)),processor-rp2a03)
+processor_objects += $(if $(findstring r6502,$(processors)),processor-r6502)
+processor_objects += $(if $(findstring r65816,$(processors)),processor-r65816)
+processor_objects += $(if $(findstring spc700,$(processors)),processor-spc700)
 processor_objects += $(if $(findstring upd96050,$(processors)),processor-upd96050)
 objects += $(processor_objects)
 
 processor := processor
 obj/processor-arm.o:      $(processor)/arm/arm.cpp $(call rwildcard,$(processor)/arm)
+obj/processor-gsu.o:      $(processor)/gsu/gsu.cpp $(call rwildcard,$(processor)/gsu)
 obj/processor-hg51b.o:    $(processor)/hg51b/hg51b.cpp $(call rwildcard,$(processor)/hg51b)
 obj/processor-lr35902.o:  $(processor)/lr35902/lr35902.cpp $(call rwildcard,$(processor)/lr35902)
-obj/processor-rp2a03.o:   $(processor)/rp2a03/rp2a03.cpp $(call rwildcard,$(processor)/rp2a03)
+obj/processor-r6502.o:    $(processor)/r6502/r6502.cpp $(call rwildcard,$(processor)/r6502)
+obj/processor-r65816.o:   $(processor)/r65816/r65816.cpp $(call rwildcard,$(processor)/r65816)
+obj/processor-spc700.o:   $(processor)/spc700/spc700.cpp $(call rwildcard,$(processor)/spc700)
 obj/processor-upd96050.o: $(processor)/upd96050/upd96050.cpp $(call rwildcard,$(processor)/upd96050)

bsnes/processor/gsu/gsu.cpp

@@ -0,0 +1,33 @@
+#include <processor/processor.hpp>
+#include "gsu.hpp"
+
+namespace Processor {
+
+#include "instructions.cpp"
+#include "table.cpp"
+#include "serialization.cpp"
+
+void GSU::power() {
+}
+
+void GSU::reset() {
+  for(auto &r : regs.r) r = 0x0000;
+  regs.sfr   = 0x0000;
+  regs.pbr   = 0x00;
+  regs.rombr = 0x00;
+  regs.rambr = 0;
+  regs.cbr   = 0x0000;
+  regs.scbr  = 0x00;
+  regs.scmr  = 0x00;
+  regs.colr  = 0x00;
+  regs.por   = 0x00;
+  regs.bramr = 0;
+  regs.vcr   = 0x04;
+  regs.cfgr  = 0x00;
+  regs.clsr  = 0;
+  regs.pipeline = 0x01;  //nop
+  regs.ramaddr = 0x0000;
+  regs.reset();
+}
+
+}

bsnes/processor/gsu/gsu.hpp

@@ -0,0 +1,118 @@
+#ifndef PROCESSOR_GSU_HPP
+#define PROCESSOR_GSU_HPP
+
+namespace Processor {
+
+struct GSU {
+  #include "registers.hpp"
+
+  virtual void step(unsigned clocks) = 0;
+
+  virtual void stop() = 0;
+  virtual uint8 color(uint8 source) = 0;
+  virtual void plot(uint8 x, uint8 y) = 0;
+  virtual uint8 rpix(uint8 x, uint8 y) = 0;
+
+  virtual uint8 pipe() = 0;
+  virtual void rombuffer_sync() = 0;
+  virtual uint8 rombuffer_read() = 0;
+  virtual void rambuffer_sync() = 0;
+  virtual uint8 rambuffer_read(uint16 addr) = 0;
+  virtual void rambuffer_write(uint16 addr, uint8 data) = 0;
+  virtual void cache_flush() = 0;
+
+  void power();
+  void reset();
+  void serialize(serializer&);
+
+  //table.cpp
+  void (GSU::*opcode_table[1024])();
+  void initialize_opcode_table();
+
+  //instructions.cpp
+  template<int> void op_adc_i();
+  template<int> void op_adc_r();
+  template<int> void op_add_i();
+  template<int> void op_add_r();
+  void op_alt1();
+  void op_alt2();
+  void op_alt3();
+  template<int> void op_and_i();
+  template<int> void op_and_r();
+  void op_asr();
+  void op_bge();
+  void op_bcc();
+  void op_bcs();
+  void op_beq();
+  template<int> void op_bic_i();
+  template<int> void op_bic_r();
+  void op_blt();
+  void op_bmi();
+  void op_bne();
+  void op_bpl();
+  void op_bra();
+  void op_bvc();
+  void op_bvs();
+  void op_cache();
+  void op_cmode();
+  template<int> void op_cmp_r();
+  void op_color();
+  template<int> void op_dec_r();
+  void op_div2();
+  void op_fmult();
+  template<int> void op_from_r();
+  void op_getb();
+  void op_getbl();
+  void op_getbh();
+  void op_getbs();
+  void op_getc();
+  void op_hib();
+  template<int> void op_ibt_r();
+  template<int> void op_inc_r();
+  template<int> void op_iwt_r();
+  template<int> void op_jmp_r();
+  template<int> void op_ldb_ir();
+  template<int> void op_ldw_ir();
+  template<int> void op_link();
+  template<int> void op_ljmp_r();
+  template<int> void op_lm_r();
+  template<int> void op_lms_r();
+  void op_lmult();
+  void op_lob();
+  void op_loop();
+  void op_lsr();
+  void op_merge();
+  template<int> void op_mult_i();
+  template<int> void op_mult_r();
+  void op_nop();
+  void op_not();
+  template<int> void op_or_i();
+  template<int> void op_or_r();
+  void op_plot();
+  void op_ramb();
+  void op_rol();
+  void op_romb();
+  void op_ror();
+  void op_rpix();
+  template<int> void op_sbc_r();
+  void op_sbk();
+  void op_sex();
+  template<int> void op_sm_r();
+  template<int> void op_sms_r();
+  template<int> void op_stb_ir();
+  void op_stop();
+  template<int> void op_stw_ir();
+  template<int> void op_sub_i();
+  template<int> void op_sub_r();
+  void op_swap();
+  template<int> void op_to_r();
+  template<int> void op_umult_i();
+  template<int> void op_umult_r();
+  template<int> void op_with_r();
+  template<int> void op_xor_i();
+  template<int> void op_xor_r();
+};
+
+}
+
+#endif

bsnes/processor/gsu/instructions.cpp

@@ -1,10 +1,8 @@
-#ifdef SUPERFX_CPP
-
 //$00 stop
-void SuperFX::op_stop() {
+void GSU::op_stop() {
   if(regs.cfgr.irq == 0) {
     regs.sfr.irq = 1;
-    cpu.regs.irq = 1;
+    stop();
   }
 
   regs.sfr.g = 0;
@@ -13,12 +11,12 @@ void SuperFX::op_stop() {
 }
 
 //$01 nop
-void SuperFX::op_nop() {
+void GSU::op_nop() {
   regs.reset();
 }
 
 //$02 cache
-void SuperFX::op_cache() {
+void GSU::op_cache() {
   if(regs.cbr != (regs.r[15] & 0xfff0)) {
     regs.cbr = regs.r[15] & 0xfff0;
     cache_flush();
@@ -27,7 +25,7 @@ void SuperFX::op_cache() {
 }
 
 //$03 lsr
-void SuperFX::op_lsr() {
+void GSU::op_lsr() {
   regs.sfr.cy = (regs.sr() & 1);
   regs.dr() = regs.sr() >> 1;
   regs.sfr.s = (regs.dr() & 0x8000);
@@ -36,7 +34,7 @@ void SuperFX::op_lsr() {
 }
 
 //$04 rol
-void SuperFX::op_rol() {
+void GSU::op_rol() {
   bool carry = (regs.sr() & 0x8000);
   regs.dr() = (regs.sr() << 1) | regs.sfr.cy;
   regs.sfr.s  = (regs.dr() & 0x8000);
@@ -46,73 +44,73 @@ void SuperFX::op_rol() {
 }
 
 //$05 bra e
-void SuperFX::op_bra() {
+void GSU::op_bra() {
   regs.r[15] += (int8)pipe();
 }
 
 //$06 blt e
-void SuperFX::op_blt() {
+void GSU::op_blt() {
   int e = (int8)pipe();
   if((regs.sfr.s ^ regs.sfr.ov) == 0) regs.r[15] += e;
 }
 
 //$07 bge e
-void SuperFX::op_bge() {
+void GSU::op_bge() {
   int e = (int8)pipe();
   if((regs.sfr.s ^ regs.sfr.ov) == 1) regs.r[15] += e;
 }
 
 //$08 bne e
-void SuperFX::op_bne() {
+void GSU::op_bne() {
   int e = (int8)pipe();
   if(regs.sfr.z == 0) regs.r[15] += e;
 }
 
 //$09 beq e
-void SuperFX::op_beq() {
+void GSU::op_beq() {
   int e = (int8)pipe();
   if(regs.sfr.z == 1) regs.r[15] += e;
 }
 
 //$0a bpl e
-void SuperFX::op_bpl() {
+void GSU::op_bpl() {
   int e = (int8)pipe();
   if(regs.sfr.s == 0) regs.r[15] += e;
 }
 
 //$0b bmi e
-void SuperFX::op_bmi() {
+void GSU::op_bmi() {
   int e = (int8)pipe();
   if(regs.sfr.s == 1) regs.r[15] += e;
 }
 
 //$0c bcc e
-void SuperFX::op_bcc() {
+void GSU::op_bcc() {
   int e = (int8)pipe();
   if(regs.sfr.cy == 0) regs.r[15] += e;
 }
 
 //$0d bcs e
-void SuperFX::op_bcs() {
+void GSU::op_bcs() {
   int e = (int8)pipe();
   if(regs.sfr.cy == 1) regs.r[15] += e;
 }
 
 //$0e bvc e
-void SuperFX::op_bvc() {
+void GSU::op_bvc() {
   int e = (int8)pipe();
   if(regs.sfr.ov == 0) regs.r[15] += e;
 }
 
 //$0f bvs e
-void SuperFX::op_bvs() {
+void GSU::op_bvs() {
   int e = (int8)pipe();
   if(regs.sfr.ov == 1) regs.r[15] += e;
 }
 
 //$10-1f(b0): to rN
 //$10-1f(b1): move rN
-template<int n> void SuperFX::op_to_r() {
+template<int n> void GSU::op_to_r() {
   if(regs.sfr.b == 0) {
     regs.dreg = n;
   } else {
@@ -122,14 +120,14 @@ template<int n> void SuperFX::op_to_r() {
 }
 
 //$20-2f: with rN
-template<int n> void SuperFX::op_with_r() {
+template<int n> void GSU::op_with_r() {
   regs.sreg = n;
   regs.dreg = n;
   regs.sfr.b = 1;
 }
 
 //$30-3b(alt0): stw (rN)
-template<int n> void SuperFX::op_stw_ir() {
+template<int n> void GSU::op_stw_ir() {
   regs.ramaddr = regs.r[n];
   rambuffer_write(regs.ramaddr ^ 0, regs.sr() >> 0);
   rambuffer_write(regs.ramaddr ^ 1, regs.sr() >> 8);
@@ -137,14 +135,14 @@ template<int n> void SuperFX::op_stw_ir() {
 }
 
 //$30-3b(alt1): stb (rN)
-template<int n> void SuperFX::op_stb_ir() {
+template<int n> void GSU::op_stb_ir() {
   regs.ramaddr = regs.r[n];
   rambuffer_write(regs.ramaddr, regs.sr());
   regs.reset();
 }
 
 //$3c loop
-void SuperFX::op_loop() {
+void GSU::op_loop() {
   regs.r[12]--;
   regs.sfr.s = (regs.r[12] & 0x8000);
   regs.sfr.z = (regs.r[12] == 0);
@@ -153,26 +151,26 @@ void SuperFX::op_loop() {
 }
 
 //$3d alt1
-void SuperFX::op_alt1() {
+void GSU::op_alt1() {
   regs.sfr.b = 0;
   regs.sfr.alt1 = 1;
 }
 
 //$3e alt2
-void SuperFX::op_alt2() {
+void GSU::op_alt2() {
   regs.sfr.b = 0;
   regs.sfr.alt2 = 1;
 }
 
 //$3f alt3
-void SuperFX::op_alt3() {
+void GSU::op_alt3() {
   regs.sfr.b = 0;
   regs.sfr.alt1 = 1;
   regs.sfr.alt2 = 1;
 }
 
 //$40-4b(alt0): ldw (rN)
-template<int n> void SuperFX::op_ldw_ir() {
+template<int n> void GSU::op_ldw_ir() {
   regs.ramaddr = regs.r[n];
   uint16_t data;
   data  = rambuffer_read(regs.ramaddr ^ 0) << 0;
@@ -182,21 +180,21 @@ template<int n> void SuperFX::op_ldw_ir() {
 }
 
 //$40-4b(alt1): ldb (rN)
-template<int n> void SuperFX::op_ldb_ir() {
+template<int n> void GSU::op_ldb_ir() {
   regs.ramaddr = regs.r[n];
   regs.dr() = rambuffer_read(regs.ramaddr);
   regs.reset();
 }
 
 //$4c(alt0): plot
-void SuperFX::op_plot() {
+void GSU::op_plot() {
   plot(regs.r[1], regs.r[2]);
   regs.r[1]++;
   regs.reset();
 }
 
 //$4c(alt1): rpix
-void SuperFX::op_rpix() {
+void GSU::op_rpix() {
   regs.dr() = rpix(regs.r[1], regs.r[2]);
   regs.sfr.s = (regs.dr() & 0x8000);
   regs.sfr.z = (regs.dr() == 0);
@@ -204,7 +202,7 @@ void SuperFX::op_rpix() {
 }
 
 //$4d: swap
-void SuperFX::op_swap() {
+void GSU::op_swap() {
   regs.dr() = (regs.sr() >> 8) | (regs.sr() << 8);
   regs.sfr.s = (regs.dr() & 0x8000);
   regs.sfr.z = (regs.dr() == 0);
@@ -212,19 +210,19 @@ void SuperFX::op_swap() {
 }
 
 //$4e(alt0): color
-void SuperFX::op_color() {
+void GSU::op_color() {
   regs.colr = color(regs.sr());
   regs.reset();
 }
 
 //$4e(alt1): cmode
-void SuperFX::op_cmode() {
+void GSU::op_cmode() {
   regs.por = regs.sr();
   regs.reset();
 }
 
 //$4f: not
-void SuperFX::op_not() {
+void GSU::op_not() {
   regs.dr() = ~regs.sr();
   regs.sfr.s = (regs.dr() & 0x8000);
   regs.sfr.z = (regs.dr() == 0);
@@ -232,7 +230,7 @@ void SuperFX::op_not() {
 }
 
 //$50-5f(alt0): add rN
-template<int n> void SuperFX::op_add_r() {
+template<int n> void GSU::op_add_r() {
   int r = regs.sr() + regs.r[n];
   regs.sfr.ov = ~(regs.sr() ^ regs.r[n]) & (regs.r[n] ^ r) & 0x8000;
   regs.sfr.s  = (r & 0x8000);
@@ -243,7 +241,7 @@ template<int n> void SuperFX::op_add_r() {
 }
 
 //$50-5f(alt1): adc rN
-template<int n> void SuperFX::op_adc_r() {
+template<int n> void GSU::op_adc_r() {
   int r = regs.sr() + regs.r[n] + regs.sfr.cy;
   regs.sfr.ov = ~(regs.sr() ^ regs.r[n]) & (regs.r[n] ^ r) & 0x8000;
   regs.sfr.s  = (r & 0x8000);
@@ -254,7 +252,7 @@ template<int n> void SuperFX::op_adc_r() {
 }
 
 //$50-5f(alt2): add #N
-template<int n> void SuperFX::op_add_i() {
+template<int n> void GSU::op_add_i() {
   int r = regs.sr() + n;
   regs.sfr.ov = ~(regs.sr() ^ n) & (n ^ r) & 0x8000;
   regs.sfr.s  = (r & 0x8000);
@@ -265,7 +263,7 @@ template<int n> void SuperFX::op_add_i() {
 }
 
 //$50-5f(alt3): adc #N
-template<int n> void SuperFX::op_adc_i() {
+template<int n> void GSU::op_adc_i() {
   int r = regs.sr() + n + regs.sfr.cy;
   regs.sfr.ov = ~(regs.sr() ^ n) & (n ^ r) & 0x8000;
   regs.sfr.s  = (r & 0x8000);
@@ -276,7 +274,7 @@ template<int n> void SuperFX::op_adc_i() {
 }
 
 //$60-6f(alt0): sub rN
-template<int n> void SuperFX::op_sub_r() {
+template<int n> void GSU::op_sub_r() {
   int r = regs.sr() - regs.r[n];
   regs.sfr.ov = (regs.sr() ^ regs.r[n]) & (regs.sr() ^ r) & 0x8000;
   regs.sfr.s  = (r & 0x8000);
@@ -287,7 +285,7 @@ template<int n> void SuperFX::op_sub_r() {
 }
 
 //$60-6f(alt1): sbc rN
-template<int n> void SuperFX::op_sbc_r() {
+template<int n> void GSU::op_sbc_r() {
   int r = regs.sr() - regs.r[n] - !regs.sfr.cy;
   regs.sfr.ov = (regs.sr() ^ regs.r[n]) & (regs.sr() ^ r) & 0x8000;
   regs.sfr.s  = (r & 0x8000);
@@ -298,7 +296,7 @@ template<int n> void SuperFX::op_sbc_r() {
 }
 
 //$60-6f(alt2): sub #N
-template<int n> void SuperFX::op_sub_i() {
+template<int n> void GSU::op_sub_i() {
   int r = regs.sr() - n;
   regs.sfr.ov = (regs.sr() ^ n) & (regs.sr() ^ r) & 0x8000;
   regs.sfr.s  = (r & 0x8000);
@@ -309,7 +307,7 @@ template<int n> void SuperFX::op_sub_i() {
 }
 
 //$60-6f(alt3): cmp rN
-template<int n> void SuperFX::op_cmp_r() {
+template<int n> void GSU::op_cmp_r() {
   int r = regs.sr() - regs.r[n];
   regs.sfr.ov = (regs.sr() ^ regs.r[n]) & (regs.sr() ^ r) & 0x8000;
   regs.sfr.s  = (r & 0x8000);
@@ -319,7 +317,7 @@ template<int n> void SuperFX::op_cmp_r() {
 }
 
 //$70: merge
-void SuperFX::op_merge() {
+void GSU::op_merge() {
   regs.dr() = (regs.r[7] & 0xff00) | (regs.r[8] >> 8);
   regs.sfr.ov = (regs.dr() & 0xc0c0);
   regs.sfr.s  = (regs.dr() & 0x8080);
@@ -329,7 +327,7 @@ void SuperFX::op_merge() {
 }
 
 //$71-7f(alt0): and rN
-template<int n> void SuperFX::op_and_r() {
+template<int n> void GSU::op_and_r() {
   regs.dr() = regs.sr() & regs.r[n];
   regs.sfr.s = (regs.dr() & 0x8000);
   regs.sfr.z = (regs.dr() == 0);
@@ -337,7 +335,7 @@ template<int n> void SuperFX::op_and_r() {
 }
 
 //$71-7f(alt1): bic rN
-template<int n> void SuperFX::op_bic_r() {
+template<int n> void GSU::op_bic_r() {
   regs.dr() = regs.sr() & ~regs.r[n];
   regs.sfr.s = (regs.dr() & 0x8000);
   regs.sfr.z = (regs.dr() == 0);
@@ -345,7 +343,7 @@ template<int n> void SuperFX::op_bic_r() {
 }
 
 //$71-7f(alt2): and #N
-template<int n> void SuperFX::op_and_i() {
+template<int n> void GSU::op_and_i() {
   regs.dr() = regs.sr() & n;
   regs.sfr.s = (regs.dr() & 0x8000);
   regs.sfr.z = (regs.dr() == 0);
@@ -353,7 +351,7 @@ template<int n> void SuperFX::op_and_i() {
 }
 
 //$71-7f(alt3): bic #N
-template<int n> void SuperFX::op_bic_i() {
+template<int n> void GSU::op_bic_i() {
   regs.dr() = regs.sr() & ~n;
   regs.sfr.s = (regs.dr() & 0x8000);
   regs.sfr.z = (regs.dr() == 0);
@@ -361,56 +359,56 @@ template<int n> void SuperFX::op_bic_i() {
 }
 
 //$80-8f(alt0): mult rN
-template<int n> void SuperFX::op_mult_r() {
+template<int n> void GSU::op_mult_r() {
   regs.dr() = (int8)regs.sr() * (int8)regs.r[n];
   regs.sfr.s = (regs.dr() & 0x8000);
   regs.sfr.z = (regs.dr() == 0);
   regs.reset();
-  if(!regs.cfgr.ms0) add_clocks(2);
+  if(!regs.cfgr.ms0) step(2);
 }
 
 //$80-8f(alt1): umult rN
-template<int n> void SuperFX::op_umult_r() {
+template<int n> void GSU::op_umult_r() {
   regs.dr() = (uint8)regs.sr() * (uint8)regs.r[n];
   regs.sfr.s = (regs.dr() & 0x8000);
   regs.sfr.z = (regs.dr() == 0);
   regs.reset();
-  if(!regs.cfgr.ms0) add_clocks(2);
+  if(!regs.cfgr.ms0) step(2);
 }
 
 //$80-8f(alt2): mult #N
-template<int n> void SuperFX::op_mult_i() {
+template<int n> void GSU::op_mult_i() {
   regs.dr() = (int8)regs.sr() * (int8)n;
   regs.sfr.s = (regs.dr() & 0x8000);
   regs.sfr.z = (regs.dr() == 0);
   regs.reset();
-  if(!regs.cfgr.ms0) add_clocks(2);
+  if(!regs.cfgr.ms0) step(2);
 }
 
 //$80-8f(alt3): umult #N
-template<int n> void SuperFX::op_umult_i() {
+template<int n> void GSU::op_umult_i() {
   regs.dr() = (uint8)regs.sr() * (uint8)n;
   regs.sfr.s = (regs.dr() & 0x8000);
   regs.sfr.z = (regs.dr() == 0);
   regs.reset();
-  if(!regs.cfgr.ms0) add_clocks(2);
+  if(!regs.cfgr.ms0) step(2);
 }
 
 //$90: sbk
-void SuperFX::op_sbk() {
+void GSU::op_sbk() {
   rambuffer_write(regs.ramaddr ^ 0, regs.sr() >> 0);
   rambuffer_write(regs.ramaddr ^ 1, regs.sr() >> 8);
   regs.reset();
 }
 
 //$91-94: link #N
-template<int n> void SuperFX::op_link() {
+template<int n> void GSU::op_link() {
   regs.r[11] = regs.r[15] + n;
   regs.reset();
 }
 
 //$95: sex
-void SuperFX::op_sex() {
+void GSU::op_sex() {
   regs.dr() = (int8)regs.sr();
   regs.sfr.s = (regs.dr() & 0x8000);
   regs.sfr.z = (regs.dr() == 0);
@@ -418,7 +416,7 @@ void SuperFX::op_sex() {
 }
 
 //$96(alt0): asr
-void SuperFX::op_asr() {
+void GSU::op_asr() {
   regs.sfr.cy = (regs.sr() & 1);
   regs.dr() = (int16_t)regs.sr() >> 1;
   regs.sfr.s = (regs.dr() & 0x8000);
@@ -427,7 +425,7 @@ void SuperFX::op_asr() {
 }
 
 //$96(alt1): div2
-void SuperFX::op_div2() {
+void GSU::op_div2() {
   regs.sfr.cy = (regs.sr() & 1);
   regs.dr() = ((int16_t)regs.sr() >> 1) + ((regs.sr() + 1) >> 16);
   regs.sfr.s = (regs.dr() & 0x8000);
@@ -436,7 +434,7 @@ void SuperFX::op_div2() {
 }
 
 //$97: ror
-void SuperFX::op_ror() {
+void GSU::op_ror() {
   bool carry = (regs.sr() & 1);
   regs.dr() = (regs.sfr.cy << 15) | (regs.sr() >> 1);
   regs.sfr.s  = (regs.dr() & 0x8000);
@@ -446,13 +444,13 @@ void SuperFX::op_ror() {
 }
 
 //$98-9d(alt0): jmp rN
-template<int n> void SuperFX::op_jmp_r() {
+template<int n> void GSU::op_jmp_r() {
   regs.r[15] = regs.r[n];
   regs.reset();
 }
 
 //$98-9d(alt1): ljmp rN
-template<int n> void SuperFX::op_ljmp_r() {
+template<int n> void GSU::op_ljmp_r() {
   regs.pbr = regs.r[n] & 0x7f;
   regs.r[15] = regs.sr();
   regs.cbr = regs.r[15] & 0xfff0;
@@ -461,7 +459,7 @@ template<int n> void SuperFX::op_ljmp_r() {
 }
 
 //$9e: lob
-void SuperFX::op_lob() {
+void GSU::op_lob() {
   regs.dr() = regs.sr() & 0xff;
   regs.sfr.s = (regs.dr() & 0x80);
   regs.sfr.z = (regs.dr() == 0);
@@ -469,18 +467,18 @@ void SuperFX::op_lob() {
 }
 
 //$9f(alt0): fmult
-void SuperFX::op_fmult() {
+void GSU::op_fmult() {
   uint32_t result = (int16_t)regs.sr() * (int16_t)regs.r[6];
   regs.dr() = result >> 16;
   regs.sfr.s  = (regs.dr() & 0x8000);
   regs.sfr.cy = (result & 0x8000);
   regs.sfr.z  = (regs.dr() == 0);
   regs.reset();
-  add_clocks(4 + (regs.cfgr.ms0 << 2));
+  step(4 + (regs.cfgr.ms0 << 2));
 }
 
 //$9f(alt1): lmult
-void SuperFX::op_lmult() {
+void GSU::op_lmult() {
   uint32_t result = (int16_t)regs.sr() * (int16_t)regs.r[6];
   regs.r[4] = result;
   regs.dr() = result >> 16;
@@ -488,17 +486,17 @@ void SuperFX::op_lmult() {
   regs.sfr.cy = (result & 0x8000);
   regs.sfr.z  = (regs.dr() == 0);
   regs.reset();
-  add_clocks(4 + (regs.cfgr.ms0 << 2));
+  step(4 + (regs.cfgr.ms0 << 2));
 }
 
 //$a0-af(alt0): ibt rN,#pp
-template<int n> void SuperFX::op_ibt_r() {
+template<int n> void GSU::op_ibt_r() {
   regs.r[n] = (int8)pipe();
   regs.reset();
 }
 
 //$a0-af(alt1): lms rN,(yy)
-template<int n> void SuperFX::op_lms_r() {
+template<int n> void GSU::op_lms_r() {
   regs.ramaddr = pipe() << 1;
   uint16_t data;
   data  = rambuffer_read(regs.ramaddr ^ 0) << 0;
@@ -508,7 +506,7 @@ template<int n> void SuperFX::op_lms_r() {
 }
 
 //$a0-af(alt2): sms (yy),rN
-template<int n> void SuperFX::op_sms_r() {
+template<int n> void GSU::op_sms_r() {
   regs.ramaddr = pipe() << 1;
   rambuffer_write(regs.ramaddr ^ 0, regs.r[n] >> 0);
   rambuffer_write(regs.ramaddr ^ 1, regs.r[n] >> 8);
@@ -517,7 +515,7 @@ template<int n> void SuperFX::op_sms_r() {
 
 //$b0-bf(b0): from rN
 //$b0-bf(b1): moves rN
-template<int n> void SuperFX::op_from_r() {
+template<int n> void GSU::op_from_r() {
   if(regs.sfr.b == 0) {
     regs.sreg = n;
   } else {
@@ -530,7 +528,7 @@ template<int n> void SuperFX::op_from_r() {
 }
 
 //$c0: hib
-void SuperFX::op_hib() {
+void GSU::op_hib() {
   regs.dr() = regs.sr() >> 8;
   regs.sfr.s = (regs.dr() & 0x80);
   regs.sfr.z = (regs.dr() == 0);
@@ -538,7 +536,7 @@ void SuperFX::op_hib() {
 }
 
 //$c1-cf(alt0): or rN
-template<int n> void SuperFX::op_or_r() {
+template<int n> void GSU::op_or_r() {
   regs.dr() = regs.sr() | regs.r[n];
   regs.sfr.s = (regs.dr() & 0x8000);
   regs.sfr.z = (regs.dr() == 0);
@@ -546,7 +544,7 @@ template<int n> void SuperFX::op_or_r() {
 }
 
 //$c1-cf(alt1): xor rN
-template<int n> void SuperFX::op_xor_r() {
+template<int n> void GSU::op_xor_r() {
   regs.dr() = regs.sr() ^ regs.r[n];
   regs.sfr.s = (regs.dr() & 0x8000);
   regs.sfr.z = (regs.dr() == 0);
@@ -554,7 +552,7 @@ template<int n> void SuperFX::op_xor_r() {
 }
 
 //$c1-cf(alt2): or #N
-template<int n> void SuperFX::op_or_i() {
+template<int n> void GSU::op_or_i() {
   regs.dr() = regs.sr() | n;
   regs.sfr.s = (regs.dr() & 0x8000);
   regs.sfr.z = (regs.dr() == 0);
@@ -562,7 +560,7 @@ template<int n> void SuperFX::op_or_i() {
 }
 
 //$c1-cf(alt3): xor #N
-template<int n> void SuperFX::op_xor_i() {
+template<int n> void GSU::op_xor_i() {
   regs.dr() = regs.sr() ^ n;
   regs.sfr.s = (regs.dr() & 0x8000);
   regs.sfr.z = (regs.dr() == 0);
@@ -570,7 +568,7 @@ template<int n> void SuperFX::op_xor_i() {
 }
 
 //$d0-de: inc rN
-template<int n> void SuperFX::op_inc_r() {
+template<int n> void GSU::op_inc_r() {
   regs.r[n]++;
   regs.sfr.s = (regs.r[n] & 0x8000);
   regs.sfr.z = (regs.r[n] == 0);
@@ -578,27 +576,27 @@ template<int n> void SuperFX::op_inc_r() {
 }
 
 //$df(alt0): getc
-void SuperFX::op_getc() {
+void GSU::op_getc() {
   regs.colr = color(rombuffer_read());
   regs.reset();
 }
 
 //$df(alt2): ramb
-void SuperFX::op_ramb() {
+void GSU::op_ramb() {
   rambuffer_sync();
   regs.rambr = regs.sr();
   regs.reset();
 }
 
 //$df(alt3): romb
-void SuperFX::op_romb() {
+void GSU::op_romb() {
   rombuffer_sync();
   regs.rombr = regs.sr() & 0x7f;
   regs.reset();
 }
 
 //$e0-ee: dec rN
-template<int n> void SuperFX::op_dec_r() {
+template<int n> void GSU::op_dec_r() {
   regs.r[n]--;
   regs.sfr.s = (regs.r[n] & 0x8000);
   regs.sfr.z = (regs.r[n] == 0);
@@ -606,31 +604,31 @@ template<int n> void SuperFX::op_dec_r() {
 }
 
 //$ef(alt0): getb
-void SuperFX::op_getb() {
+void GSU::op_getb() {
   regs.dr() = rombuffer_read();
   regs.reset();
 }
 
 //$ef(alt1): getbh
-void SuperFX::op_getbh() {
+void GSU::op_getbh() {
   regs.dr() = (rombuffer_read() << 8) | (regs.sr() & 0x00ff);
   regs.reset();
 }
 
 //$ef(alt2): getbl
-void SuperFX::op_getbl() {
+void GSU::op_getbl() {
   regs.dr() = (regs.sr() & 0xff00) | (rombuffer_read() << 0);
   regs.reset();
 }
 
 //$ef(alt3): getbs
-void SuperFX::op_getbs() {
+void GSU::op_getbs() {
   regs.dr() = (int8)rombuffer_read();
   regs.reset();
 }
 
 //$f0-ff(alt0): iwt rN,#xx
-template<int n> void SuperFX::op_iwt_r() {
+template<int n> void GSU::op_iwt_r() {
   uint16_t data;
   data  = pipe() << 0;
   data |= pipe() << 8;
@@ -639,7 +637,7 @@ template<int n> void SuperFX::op_iwt_r() {
 }
 
 //$f0-ff(alt1): lm rN,(xx)
-template<int n> void SuperFX::op_lm_r() {
+template<int n> void GSU::op_lm_r() {
   regs.ramaddr  = pipe() << 0;
   regs.ramaddr |= pipe() << 8;
   uint16_t data;
@@ -650,12 +648,10 @@ template<int n> void SuperFX::op_lm_r() {
 }
 
 //$f0-ff(alt2): sm (xx),rN
-template<int n> void SuperFX::op_sm_r() {
+template<int n> void GSU::op_sm_r() {
   regs.ramaddr  = pipe() << 0;
   regs.ramaddr |= pipe() << 8;
   rambuffer_write(regs.ramaddr ^ 0, regs.r[n] >> 0);
   rambuffer_write(regs.ramaddr ^ 1, regs.r[n] >> 8);
   regs.reset();
 }
-
-#endif

bsnes/processor/gsu/registers.hpp

@@ -1,11 +1,11 @@
 //accepts a callback binding so r14 writes can trigger ROM buffering transparently
 struct reg16_t {
   uint16 data;
-  function<void (uint16)> on_modify;
+  function<void (uint16)> modify;
 
   inline operator unsigned() const { return data; }
   inline uint16 assign(uint16 i) {
-    if(on_modify) on_modify(i);
+    if(modify) modify(i);
     else data = i;
     return data;
   }

bsnes/processor/gsu/serialization.cpp

@@ -1,13 +1,4 @@
-#ifdef SUPERFX_CPP
-
-void SuperFX::serialize(serializer &s) {
-  Thread::serialize(s);
-
-  //superfx.hpp
-  s.integer(clockmode);
-  s.integer(instruction_counter);
-
-  //core/registers.hpp
+void GSU::serialize(serializer &s) {
   s.integer(regs.pipeline);
   s.integer(regs.ramaddr);
 
@@ -86,11 +77,4 @@ void SuperFX::serialize(serializer &s) {
     s.integer(pixelcache[i].bitpend);
     s.array(pixelcache[i].data);
   }
-
-  //timing/timing.hpp
-  s.integer(cache_access_speed);
-  s.integer(memory_access_speed);
-  s.integer(r15_modified);
 }
-
-#endif

bsnes/processor/gsu/table.cpp

@@ -1,6 +1,4 @@
-#ifdef SUPERFX_CPP
-
-void SuperFX::initialize_opcode_table() {
+void GSU::initialize_opcode_table() {
   #define op4(id, name) \
     op(id+ 0, name< 1>) op(id+ 1, name< 2>) op(id+ 2, name< 3>) op(id+ 3, name< 4>)
 
@@ -35,7 +33,7 @@ void SuperFX::initialize_opcode_table() {
   // ALT0
   //======
 
-  #define op(id, name) opcode_table[  0 + id] = &SuperFX::op_##name;
+  #define op(id, name) opcode_table[  0 + id] = &GSU::op_##name;
   op   (0x00, stop)
   op   (0x01, nop)
   op   (0x02, cache)
@@ -92,7 +90,7 @@ void SuperFX::initialize_opcode_table() {
   // ALT1
   //======
 
-  #define op(id, name) opcode_table[256 + id] = &SuperFX::op_##name;
+  #define op(id, name) opcode_table[256 + id] = &GSU::op_##name;
   op   (0x00, stop)
   op   (0x01, nop)
   op   (0x02, cache)
@@ -149,7 +147,7 @@ void SuperFX::initialize_opcode_table() {
   // ALT2
   //======
 
-  #define op(id, name) opcode_table[512 + id] = &SuperFX::op_##name;
+  #define op(id, name) opcode_table[512 + id] = &GSU::op_##name;
   op   (0x00, stop)
   op   (0x01, nop)
   op   (0x02, cache)
@@ -206,7 +204,7 @@ void SuperFX::initialize_opcode_table() {
   // ALT3
   //======
 
-  #define op(id, name) opcode_table[768 + id] = &SuperFX::op_##name;
+  #define op(id, name) opcode_table[768 + id] = &GSU::op_##name;
   op   (0x00, stop)
   op   (0x01, nop)
   op   (0x02, cache)
@@ -266,5 +264,3 @@ void SuperFX::initialize_opcode_table() {
   #undef op15h
   #undef op16
 }
-
-#endif

bsnes/processor/r6502/disassembler.cpp

@@ -1,4 +1,4 @@
-string RP2A03::disassemble() {
+string R6502::disassemble() {
   string output = { hex<4>(regs.pc), "  " };
 
   auto abs = [&]() -> string { return { "$", hex<2>(debugger_read(regs.pc + 2)), hex<2>(debugger_read(regs.pc + 1)) }; };