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Update to v074r04 release. 

byuu says:

SuperFXBus was inheriting from Bus, in other words using a copy of the
same memory mapping subsystem.
I've removed that and made it a simple mask, since only ROM+RAM are
mapped there.
This commit is contained in:
Tim Allen 2011-01-17 00:17:45 +11:00
parent 2d73086569
commit a937f9b79b
10 changed files with 56 additions and 85 deletions
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53
bsnes/snes/chip/superfx/bus/bus.cpp
View File

@ -1,63 +1,10 @@
#ifdef SUPERFX_CPP
SuperFXBus superfxbus;
namespace memory {
SuperFXGSUROM gsurom;
SuperFXGSURAM gsuram;
SuperFXCPUROM fxrom;
SuperFXCPURAM fxram;
}
void SuperFXBus::init() {
map(MapMode::Linear, 0x00, 0x3f, 0x0000, 0x7fff, { &SuperFXGSUROM::read, &memory::gsurom }, { &SuperFXGSUROM::write, &memory::gsurom }, 0, memory::gsurom.size());
map(MapMode::Linear, 0x00, 0x3f, 0x8000, 0xffff, { &SuperFXGSUROM::read, &memory::gsurom }, { &SuperFXGSUROM::write, &memory::gsurom }, 0, memory::gsurom.size());
map(MapMode::Linear, 0x40, 0x5f, 0x0000, 0xffff, { &SuperFXGSUROM::read, &memory::gsurom }, { &SuperFXGSUROM::write, &memory::gsurom }, 0, memory::gsurom.size());
map(MapMode::Linear, 0x60, 0x7f, 0x0000, 0xffff, { &SuperFXGSURAM::read, &memory::gsuram }, { &SuperFXGSURAM::write, &memory::gsuram }, 0, memory::gsuram.size());
}
//ROM / RAM access from the SuperFX CPU
unsigned SuperFXGSUROM::size() const {
return memory::cartrom.size();
}
uint8 SuperFXGSUROM::read(unsigned addr) {
while(!superfx.regs.scmr.ron && scheduler.sync != Scheduler::SynchronizeMode::All) {
superfx.add_clocks(6);
superfx.synchronize_cpu();
}
return memory::cartrom.read(addr);
}
void SuperFXGSUROM::write(unsigned addr, uint8 data) {
while(!superfx.regs.scmr.ron && scheduler.sync != Scheduler::SynchronizeMode::All) {
superfx.add_clocks(6);
superfx.synchronize_cpu();
}
memory::cartrom.write(addr, data);
}
unsigned SuperFXGSURAM::size() const {
return memory::cartram.size();
}
uint8 SuperFXGSURAM::read(unsigned addr) {
while(!superfx.regs.scmr.ran && scheduler.sync != Scheduler::SynchronizeMode::All) {
superfx.add_clocks(6);
superfx.synchronize_cpu();
}
return memory::cartram.read(addr);
}
void SuperFXGSURAM::write(unsigned addr, uint8 data) {
while(!superfx.regs.scmr.ran && scheduler.sync != Scheduler::SynchronizeMode::All) {
superfx.add_clocks(6);
superfx.synchronize_cpu();
}
memory::cartram.write(addr, data);
}
//ROM / RAM access from the S-CPU
unsigned SuperFXCPUROM::size() const {

18
bsnes/snes/chip/superfx/bus/bus.hpp
View File

@ -1,19 +1,3 @@
struct SuperFXBus : Bus {
void init();
};
struct SuperFXGSUROM : Memory {
unsigned size() const;
uint8 read(unsigned);
void write(unsigned, uint8);
};
struct SuperFXGSURAM : Memory {
unsigned size() const;
uint8 read(unsigned);
void write(unsigned, uint8);
};
struct SuperFXCPUROM : Memory {
unsigned size() const;
uint8 read(unsigned);
@ -27,8 +11,6 @@ struct SuperFXCPURAM : Memory {
};
namespace memory {
extern SuperFXGSUROM gsurom;
extern SuperFXGSURAM gsuram;
extern SuperFXCPUROM fxrom;
extern SuperFXCPURAM fxram;
}

6
bsnes/snes/chip/superfx/core/core.cpp
View File

@ -66,7 +66,7 @@ uint8 SuperFX::rpix(uint8 x, uint8 y) {
for(unsigned n = 0; n < bpp; n++) {
unsigned byte = ((n >> 1) << 4) + (n & 1); // = [n]{ 0, 1, 16, 17, 32, 33, 48, 49 };
add_clocks(memory_access_speed);
data |= ((superfxbus.read(addr + byte) >> x) & 1) << n;
data |= ((bus_read(addr + byte) >> x) & 1) << n;
}
return data;
@ -95,10 +95,10 @@ void SuperFX::pixelcache_flush(pixelcache_t &cache) {
if(cache.bitpend != 0xff) {
add_clocks(memory_access_speed);
data &= cache.bitpend;
data |= superfxbus.read(addr + byte) & ~cache.bitpend;
data |= bus_read(addr + byte) & ~cache.bitpend;
}
add_clocks(memory_access_speed);
superfxbus.write(addr + byte, data);
bus_write(addr + byte, data);
}
cache.bitpend = 0x00;

4
bsnes/snes/chip/superfx/disasm/disasm.cpp
View File

@ -36,8 +36,8 @@ void SuperFX::disassemble_opcode(char *output) {
case id+ 8: case id+ 9: case id+10: case id+11: case id+12: case id+13: case id+14: case id+15
#define op0 regs.pipeline
#define op1 superfxbus.read((regs.pbr << 16) + regs.r[15] + 0)
#define op2 superfxbus.read((regs.pbr << 16) + regs.r[15] + 1)
#define op1 bus_read((regs.pbr << 16) + regs.r[15] + 0)
#define op2 bus_read((regs.pbr << 16) + regs.r[15] + 1)
void SuperFX::disassemble_alt0(char *output) {
char t[256] = "";

45
bsnes/snes/chip/superfx/memory/memory.cpp
View File

@ -1,5 +1,41 @@
#ifdef SUPERFX_CPP
uint8 SuperFX::bus_read(unsigned addr) {
if((addr & 0xc00000) == 0x000000) { //$00-3f:0000-7fff, $00-3f:8000-ffff
while(!regs.scmr.ron && scheduler.sync != Scheduler::SynchronizeMode::All) {
add_clocks(6);
synchronize_cpu();
}
return memory::cartrom.read((((addr & 0x3f0000) >> 1) | (addr & 0x7fff)) & rom_mask);
}
if((addr & 0xe00000) == 0x400000) { //$40-5f:0000-ffff
while(!regs.scmr.ron && scheduler.sync != Scheduler::SynchronizeMode::All) {
add_clocks(6);
synchronize_cpu();
}
return memory::cartrom.read(addr & rom_mask);
}
if((addr & 0xe00000) == 0x600000) { //$60-7f:0000-ffff
while(!regs.scmr.ran && scheduler.sync != Scheduler::SynchronizeMode::All) {
add_clocks(6);
synchronize_cpu();
}
return memory::cartram.read(addr & ram_mask);
}
}
void SuperFX::bus_write(unsigned addr, uint8 data) {
if((addr & 0xe00000) == 0x600000) { //$60-7f:0000-ffff
while(!regs.scmr.ran && scheduler.sync != Scheduler::SynchronizeMode::All) {
add_clocks(6);
synchronize_cpu();
}
return memory::cartram.write(addr & ram_mask, data);
}
}
uint8 SuperFX::op_read(uint16 addr) {
uint16 offset = addr - regs.cbr;
if(offset < 512) {
@ -8,7 +44,7 @@ uint8 SuperFX::op_read(uint16 addr) {
unsigned sp = (regs.pbr << 16) + ((regs.cbr + dp) & 0xfff0);
for(unsigned n = 0; n < 16; n++) {
add_clocks(memory_access_speed);
cache.buffer[dp++] = superfxbus.read(sp++);
cache.buffer[dp++] = bus_read(sp++);
}
cache.valid[offset >> 4] = true;
} else {
@ -21,12 +57,12 @@ uint8 SuperFX::op_read(uint16 addr) {
//$[00-5f]:[0000-ffff] ROM
rombuffer_sync();
add_clocks(memory_access_speed);
return superfxbus.read((regs.pbr << 16) + addr);
return bus_read((regs.pbr << 16) + addr);
} else {
//$[60-7f]:[0000-ffff] RAM
rambuffer_sync();
add_clocks(memory_access_speed);
return superfxbus.read((regs.pbr << 16) + addr);
return bus_read((regs.pbr << 16) + addr);
}
}
@ -60,6 +96,9 @@ void SuperFX::cache_mmio_write(uint16 addr, uint8 data) {
}
void SuperFX::memory_reset() {
rom_mask = memory::cartrom.size() - 1;
ram_mask = memory::cartram.size() - 1;
for(unsigned n = 0; n < 512; n++) cache.buffer[n] = 0x00;
for(unsigned n = 0; n < 32; n++) cache.valid[n] = false;
for(unsigned n = 0; n < 2; n++) {

5
bsnes/snes/chip/superfx/memory/memory.hpp
View File

@ -1,3 +1,8 @@
unsigned rom_mask; //rom_size - 1
unsigned ram_mask; //ram_size - 1
uint8 bus_read(unsigned addr);
void bus_write(unsigned addr, uint8 data);
uint8 op_read(uint16 addr);
alwaysinline uint8 peekpipe();
alwaysinline uint8 pipe();

1
bsnes/snes/chip/superfx/superfx.cpp
View File

@ -53,7 +53,6 @@ void SuperFX::power() {
void SuperFX::reset() {
create(SuperFX::Enter, system.cpu_frequency());
superfxbus.init();
instruction_counter = 0;
for(unsigned n = 0; n < 16; n++) regs.r[n] = 0x0000;

1
bsnes/snes/chip/superfx/superfx.hpp
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@ -22,4 +22,3 @@ private:
};
extern SuperFX superfx;
extern SuperFXBus superfxbus;

6
bsnes/snes/chip/superfx/timing/timing.cpp
View File

@ -5,14 +5,14 @@ void SuperFX::add_clocks(unsigned clocks) {
regs.romcl -= min(clocks, regs.romcl);
if(regs.romcl == 0) {
regs.sfr.r = 0;
regs.romdr = superfxbus.read((regs.rombr << 16) + regs.r[14]);
regs.romdr = bus_read((regs.rombr << 16) + regs.r[14]);
}
}
if(regs.ramcl) {
regs.ramcl -= min(clocks, regs.ramcl);
if(regs.ramcl == 0) {
superfxbus.write(0x700000 + (regs.rambr << 16) + regs.ramar, regs.ramdr);
bus_write(0x700000 + (regs.rambr << 16) + regs.ramar, regs.ramdr);
}
}
@ -40,7 +40,7 @@ void SuperFX::rambuffer_sync() {
uint8 SuperFX::rambuffer_read(uint16 addr) {
rambuffer_sync();
return superfxbus.read(0x700000 + (regs.rambr << 16) + addr);
return bus_read(0x700000 + (regs.rambr << 16) + addr);
}
void SuperFX::rambuffer_write(uint16 addr, uint8 data) {

2
bsnes/snes/snes.hpp
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@ -1,7 +1,7 @@
namespace SNES {
namespace Info {
static const char Name[] = "bsnes";
static const char Version[] = "074.03";
static const char Version[] = "074.04";
static const unsigned SerializerVersion = 17;
}
}