97 lines
2.0 KiB
C#
97 lines
2.0 KiB
C#
using BizHawk.Common;
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using BizHawk.Common.NumberExtensions;
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namespace BizHawk.Emulation.Cores.Atari.A7800Hawk
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{
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// Rescue on Fractalus has unique RAM mapping
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public sealed class MapperFractalus : MapperBase
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{
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private byte[] RAM = new byte[0x800];
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public override byte ReadMemory(ushort addr)
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{
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if (addr >= 0x1000 && addr < 0x1800)
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{
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//could be hsbios RAM here
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if (Core._hsbios != null)
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{
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return Core._hsram[addr - 0x1000];
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}
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return 0xFF;
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}
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if (addr < 0x4000)
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{
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// could be either RAM mirror or ROM
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if (addr >= 0x3000 && Core._hsbios != null)
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{
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return Core._hsbios[addr - 0x3000];
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}
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return Core.RAM[0x800 + addr & 0x7FF];
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}
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// cartridge and other OPSYS
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if (Core._rom.Length >= 0x10000 - addr
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&& Core.A7800_control_register.Bit(2))
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{
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return Core._rom[Core._rom.Length - (0x10000 - addr)];
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}
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if (addr >= 0x10000-Core._bios.Length && !Core.A7800_control_register.Bit(2))
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{
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return Core._bios[addr - (0x10000 - Core._bios.Length)];
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}
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if (addr >= 0x4000 && addr <0x5000)
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{
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int tempRet1 = ((addr >> 8) & 0xE) >> 1;
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int tempRet2 = addr & 0xFF;
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return RAM[(tempRet1 << 8) + tempRet2];
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}
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return 0x00;
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}
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public override void WriteMemory(ushort addr, byte value)
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{
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if (addr >= 0x1000 && addr < 0x1800)
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{
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//could be hsbios RAM here
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if (Core._hsbios != null)
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{
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Core._hsram[addr - 0x1000] = value;
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}
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}
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else if (addr < 0x4000)
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{
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// could be either RAM mirror or ROM
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if (addr >= 0x3000 && Core._hsbios != null)
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{
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}
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else
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{
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Core.RAM[0x800 + addr & 0x7FF] = value;
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}
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}
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else
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{
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if (addr >= 0x4000 && addr < 0x5000)
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{
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int tempRet1 = ((addr >> 8) & 0xE) >> 1;
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int tempRet2 = addr & 0xFF;
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RAM[(tempRet1 << 8) + tempRet2] = value;
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}
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}
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}
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public override void SyncState(Serializer ser)
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{
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ser.Sync(nameof(RAM), ref RAM, false);
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}
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}
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}
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